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A fast-switching low-loss field-stop insulated gate bipolar transistor with a dual control gate (DIGBT) of a semi-insulating polycrytalline silicon (SIPOS) material is proposed in this paper. Because the SIPOS has uniform high resistance, it has an approximate linear electric potential distribution. When DIGBT conducts, the higher electric potential on SIPOS causes the P-type drift region (P-drift) to generate an inversion layer of electrons, adjusting the number of carriers and making the generation of non-equilibrium carriers no longer dependent on the doping concentration in P-drift (Nd) but on the electric potential distribution on SIPOS. Therefore, it can solve the contradiction among the breakdown voltage, forward voltage drop [VCE(sat)], turn-off time (toff), and turn-off loss (Eoff) caused by the Nd. Through Technology Computer Aided Design (TCAD) simulation, the VCE(sat) of DIGBT is 30.6% lower than that of SJFS IGBT. Meanwhile, DIGBT reduces the toff by 62.8% while reducing the Eoff by 83.0% compared to SJFS IGBT. In addition, the static latch-up I–V and the forward biased safe operating area of the DIGBT have been significantly improved. This paper adjusts the number of carriers through the characteristics of SIPOS material, enabling the above-mentioned physical phenomena to be applied in insulated gate bipolar transistor power devices and achieving device performance breakthroughs. [ABSTRACT FROM AUTHOR]

The power module of the Insulated Gate Bipolar Transistor (IGBT) is the core component of the traction transmission system of high-speed trains. The module's junction temperature is a critical factor in determining device reliability. Existing temperature monitoring methods based on the electro-thermal coupling model have limitations, such as ignoring device interactions and high computational complexity. To address these issues, an analysis of the parameters influencing IGBT failure is conducted, and a temperature monitoring method based on the Macro-Micro Attention Long Short-Term Memory (MMALSTM) recursive neural network is proposed, which takes the forward voltage drop and collector current as features. Compared with the traditional electricalthermal coupling model method, it requires fewer monitoring parameters and eliminates the complex loss calculation and equivalent thermal resistance network establishment process. The simulation model of a highspeed train traction system has been established to explore the accuracy and efficiency of MMALSTM-based prediction methods for IGBT power module junction temperature. The simulation outcomes, which deviate only 3.2% from the theoretical calculation results of the electric-thermal coupling model, confirm the reliability of this approach for predicting the temperature of IGBT power modules. [ABSTRACT FROM AUTHOR]

The conventional reverse-conducting lateral insulated-gate bipolar transistor (LIGBT) is mainly used as an inverter in industry, but its snapback effect and trade-off property are not ideal. Based on this, a compound LIGBT embedded separated conduction region, called SCR-LIGBT, is proposed for performance optimization. The electrical properties are investigated by numerical simulation. This device is a hybrid structure of LIGBT and laterally diffused metal–oxide–semiconductor (LDMOS). The LDMOS region is sandwiched by the LIGBT region, and they are isolated by a thin oxide layer. The triple gate is constructed by the trench gate of the LIGBT regions and the planar gate of the LDMOS region. The trench gate also acts as a side gate of the LDMOS region. The planar gate is a dummy gate which is directly connected to the emitter in the LDMOS region. At the forward conduction region, the conduction current is switched from unipolar mode (LDMOS domain) to bipolar mode (LIGBT domain) without snapback, due to the separated conduction regions. At the reverse conduction region, the parasitic P-base/n-drift/N-collector diode and the MOS diode of the LDMOS region realize reverse conduction capability. During the turn-off process, the LDMOS region is used to extract excess electrons. Under the same forward voltage of 1.18 V, the turn-off energy loss of the SCR-LIGBT is 37.3% lower than that of the conventional LIGBT. As a result, the SCR-LIGBT achieves a snapback-free and superior trade-off relationship between the on-state voltage drop ( V ON ) and turn-off energy loss E OFF of the device, and it improves the integration of the chip, with improved reliability. [ABSTRACT FROM AUTHOR]

The efficiency of the system decreases with increasing switching frequency in high-power density industrial driving applications. In order to increase the system efficiency, reliability, and power quality in a high-power drive system, power losses are becoming more crucial to calculate precisely in the industrial drive. In this study, the switching and conduction losses in a 370 kW industrial motor driver with 1000V DC bus voltage are calculated with the information obtained from the datasheets and modeled in detail for three different insulated-gate bipolar transistor (IGBT)/diode modules on the MATLAB/Simulink environment. Thanks to the obtained model, the losses can be optimized for different switching frequencies, and the performance of the system in terms of losses and efficiency can be examined in the case of using different IGBT/diode modules. [ABSTRACT FROM AUTHOR]

Insulated gate bipolar transistor (IGBT) is a work element in modern power electronics converters. The ability of the IGBT transistor, which is utilised in power converter circuits, to block high voltages, is one of its most crucial features. Large-scale solar power generations are incorporated into the AC grid via voltage-source converters (VSC). Many other applications also utilise voltage-source converters (VSCs). IGBTs are an integral part of voltage-source converters. Fault in IGBT-based VSCs has an impact on the functionality of all VSC-based systems. So, the fault-proof operation of IGBT is highly desirable. This article presents a methodology to detect the premature IGBT breakdown fault (PIBDF) in a photovoltaic (PV)-grid-connected three-phase three-level Voltage Source Converter (VSC). The work has been done using an analysis that is based on the Fast Fourier Transform (FFT) technique applied to the output phase voltage of VSC. Then for different fault percentage values, the effects on the DC as well as the fundamental frequency component and harmonic distortions have been investigated. Some specific features of the subharmonic components have been studied under the normal and faulty conditions of the IGBT. Further study shows that there are few features suitable for fault identification. [ABSTRACT FROM AUTHOR]

Online aging monitoring is the basis for high reliability operation of Insulated gate bipolar transistors (IGBTs). Most monitoring methods focus on the package-related aging. Leakage current (Ileak) has been proposed as a potential chip-related aging (CRA) indicator for IGBTs. However, this method has not been implemented online due to the difficulty in accurate online leakage current measurement. An effective online CRA monitoring method is still required for IGBTs. A novel online CRA monitoring method based on Ileak for IGBTs is proposed in this article. First, an online Ileak measurement circuit is proposed. Second, based on this circuit, an aging monitoring strategy is presented. Finally, accelerating aging tests validate the effectiveness of the proposed method. The on-state voltage drop is selected as an aging indicator for comparison. The proposed method has three advantages. The online CRA monitoring is achieved. It can be used in slight aging situation with high sensitivity because Ileak is linear to the CRA levels. The measurement circuit required by this method is simple and low-cost. [ABSTRACT FROM AUTHOR]

Conventional planar- and trench-gate silicon carbide insulated-gate bipolar transistors (SiC C-IGBT and T-IGBT) suffer from higher turn- OFF loss (${E}_{\text {off}}$) and ON-state voltage drop [ ${V}_{\text {ce(sat)}}$ ]. An improved hybrid-channel injection enhanced modulation 4H-SiC IGBT (HC-IGBT) is proposed and investigated to overcome these shortcomings in this article. The proposed IGBT structure is considered 3-D because the gate wraps around a raised emitter-to-collector channel, instead of residing on top of the channel in the conventional 2-D planar-gate structure. Therefore, multiple gates are ganged together through the same gate electrode to enable more electrons in the “ON” state and provide more path to remove extra holes in the “OFF” state. Comparing with C-IGBT and T-IGBT structure, HC-IGBT gains an improvement of 108% and 21% in a differential specific ON-resistance as well as a turn- OFF loss reduction of 11% and 16%. The industrial figure of merit (IFOM $= {V}_{\text {ce(sat)}}\,\,\times \,\,{E}_{\text {off}}$) of HC-IGBT is reduced by 21% and 22% compared with C-IGBT and T-IGBT, respectively. Meanwhile, the Baliga’s figure of merit (BFOM $= {V}_{\text {BR}}^{{2}}/{R}_{\text {on,sp}}$) shows about 63% and 15% larger than that of C-IGBT and T-IGBT. These results show that HC-IGBT structure has much superior tradeoff between the ON-state voltage drop and turn- OFF loss, indicating the potential for ultrahigh-voltage power electronic of the future. [ABSTRACT FROM AUTHOR]

A novel reverse-conducting insulated gate bipolar transistor (RC-IGBT) with two different collector trench (DCT) is proposed. One of the collector trenches is filled with heavily doped N-type polysilicon (N-poly) and the other is filled with heavily doped N- and P-poly. An electron accumulation layer is formed along the sidewall of trench owing to built-in potential difference between the N-poly and the N-drift region. The electron accumulation layer and collector trenches block the electric field, which behaves just like the N-buffer layer of the conventional RC-IGBT (Con. RC-IGBT). Similarly, due to potential difference between the P-poly and N-drift region, a high-density hole inversion layer is formed to narrow the electron current path as a high resistance. The DCT RC-IGBT achieves snapback-free in a small cell pitch without additional control. Moreover, the DCT RC-IGBT shows better tradeoff between turn-off loss and ON-state voltage drop than that of con. RC-IGBT. For the same forward voltage drop, the turn-off loss is reduced by 26%. [ABSTRACT FROM AUTHOR]

In this paper, an asymmetric semi-superjunction (SJ) insulated gate bipolar transistor (IGBT) is proposed and investigated. The buffer layer of proposed device is split into two unequal segments with decreasing order of doping in x-direction. One segment is moderately doped, named B N (+) , while other is low doped known as B N (-) . Region B N (-) offers maximum flow of carriers, resulting in increase of collector current density with similar breakdown voltage (BV). In off-state, excess electric field exists due to high voltage. This needs to be restricted which is achieved by B N (+) region. In semi-SJ device drift resistance is reduced which gives a better performance in the off-state, leading to the lower turn-off loss. Outcomes of TCAD simulation result show a 50.6% reduction in on-state resistance without degrading the BV. Furthermore, 48.8% and 20.3% reduction in turn-off loss and forward voltage drop, respectively, are also observed. [ABSTRACT FROM AUTHOR]

A novel snapback-free RC-LIGBT with integrated self-biased N-MOSFET is proposed and investigated by simulation. The device features an integrated self-biased N-MOSFET(ISM) on the anode active region. One side of the ISM is shorted to the P + anode electrode of RC-LIGBT and the other side is connected to the N + anode via a floating ohmic contact. The adaptively turn-on/off of the ISM contributes to improve the static and dynamic performance of the ISM RC-LIGBT. In the forward-state, due to the off-state of the ISM, the snapback could be effectively suppressed without requiring extra device area compared to the SSA (separated shorted anode) and STA (segmented trenches in the anode) LIGBTs. In the reverse conduction, the ISM is turned on and the parasitic NPN in the ISM is punched through, which provides a current path for the reverse current. Meanwhile, during the turn-off and reverse recovery states, the ISM turns on, providing a rapid electron extraction path. Thus, a superior tradeoff between the on-state voltage drop (Von) and turnoff loss (Eoff) as well as an improved reverse recovery characteristic can be obtained. Compared to the STA device, the proposed ISM RC-LIGBT reduces Eoff by 21.5% without snapback. Its reverse recovery charge is reduced by 53.7%/58.6% compared to that of the SSA LIGBT with Lb = 40/60 μm at the same Von. Due to the prominent static and dynamic characteristic, the power loss of ISM RC-LIGBT in a completed switching cycle is reduced. [ABSTRACT FROM AUTHOR]

Thermal stress of the power semiconductor is one of the most important indicators for the reliability assessment of power electronics-based power systems. The mapping of the Insulated-Gate Bipolar Transistor (IGBT) junction temperature is usually required to analyze the thermal stress and loss dissipation. However, it is difficult to identify inherent mechanisms of the bond-wire and solder layer failure modes in IGBT power modules. In order to solve the problem, an online method to identify inherent mechanisms of the bond-wire and solder layer failure modes in IGBT power modules is proposed. This method can separate the root causes of the bond-wire lift-off and solder layer fatigue by measuring the on-state voltage drop through a sinusoidal loading current based on an H-bridge circuit, together with its corresponding control and measurement. By comparing the on-state voltage drop at the intersection current and the peak current of the converter, the wear-out conditions of the IGBT power modules can be monitored in real-time with the determination of different failure modes. Finally, experimental results are presented in order to verify the effectiveness and feasibility of the proposed method. [ABSTRACT FROM AUTHOR]

Junction temperature monitoring and bond wire detection are crucial for the condition monitoring and protection of insulated gate bipolar transistor (IGBT) and freewheeling diode (FWD). on-state voltage drop is one of the most popular parameters for junction temperature estimation and bond wire detection. However, there is still a lack of cost-effective on-state voltage drop measuring techniques for both IGBT and FWD with a fast response. This article proposes an in situ junction temperature monitoring and bond wire detecting method based on IGBT and FWD on-state voltage drops. The proposed technique can measure the on-state voltage drops of IGBT and FWD online with high accuracy and fast response. The on-state voltage drops of IGBT and FWD under low load current are linearly dependent on their junction temperatures. Besides, the on-state voltage drops under high load current are closely related to the bond wire degradation. Therefore, the junction temperatures and bond wire conditions of both IGBT and FWD can be monitored based on the on-state voltage drops during a period of alternating current. The experiment results validate the feasibility of the proposed on-state voltage drop-based method for junction temperature monitoring and bond wire detecting. The proposed method has characteristics of high response speed, noninvasiveness for normal converter operating, and simple structure. [ABSTRACT FROM AUTHOR]

This article proposes an RC-IGBT structure with N-Si/n-Ge heterojunction (NNH-IGBT) to suppress snapback effect. Because the proposed N-Si/n-Ge heterojunction acts as a gradually reverse bias diode to suppress the electron flow into the N-short region, so the snapback effect can be suppressed. For the same ${\mathrm{\scriptstyle {ON}}}$ -state voltage drop (${V}_{\text {CE}}$), the turn-off loss (${E}_{\mathrm{\scriptstyle {OFF}}}$) of the NNH-IGBT is lower than the conventional RC-IGBT (Con-RC-IGBT). In addition, the reverse recovery speed of NNH-IGBT is nearly identical to the Con-RC-IGBT. Because of the use of heterojunction, the NNH-IGBT is suitable for operate to suppress the snapback effect, especially at low temperatures. [ABSTRACT FROM AUTHOR]

The bond wires failure is one of the most common failure modes of the insulated gate bipolar transistor (IGBT) module, which will cause an increase in the overall ON-state voltage drop $V_{\mathrm {CE}}$ , and it is generally believed to not affect the junction-to-case thermal resistance $R_{\mathrm {th}jc}$. The measured $V_{\mathrm {CE}}$ mainly consists of two parts: the voltage drop of the IGBT chip $V_{\mathrm {CE\_{}Chip}}$ and that of the bond wire $V_{\mathrm {CE\_{}wire}}$ ; the influence of bond wires failure on $V_{\mathrm {CE}}$ should be discussed and explained in two parts. However, these actual measurement parameters are not considered before. In this article, the impact mechanism of bond wires failure on electrothermal characteristics of the IGBT module is analyzed with the help of realistic simulation models and experiment verification. The results show that the bond wires failure only affects $V_{\mathrm {CE\_{}wire}}$ , and the impact on $V_{\mathrm {CE\_{}Chip}}$ is small, which can be ignored. Meanwhile, the increase in the virtual junction temperature is not caused by the increase in the power loss of the IGBT chip but by the increase in the current density of bond feet, which is caused by the decrease in the effective contact area. Besides, the measured $R_{\mathrm {th}jc}$ is not the intrinsic thermal resistance but slightly smaller than the intrinsic thermal resistance, and it decreases as the bond wires failure. Furthermore, the proposed mechanism can provide method guidance for the separation strategy of concurrent failure modes of IGBT modules only by monitoring the ON-state voltage drop. [ABSTRACT FROM AUTHOR]

The gate voltage overshoot during the turn-on transient in the trench gate U-shaped (TGU) channel silicon-on-insulator lateral insulated gate bipolar transistor (SOI-LIGBT) is investigated and novel structures are proposed for the first time with numerical simulation in this article. The TGU SOI-LIGBT features two U-shaped trench gates, G1 and G2, connected together. The U-shaped trench for G2 serves as a hole barrier trench. A large number of holes accumulate in the U-shaped region during the turn-on transient because of the U-shaped architecture and the hole-blocking effect of G2. The displacement current induced by the nonuniform distributed holes overcharges the gate and leads to high di/dt. In this article, the novel structures (Novel-1 and Novel-2) with G2 partially filled by the polysilicon are proposed for the improvement in gate voltage overshoot while keeping superior turn-on loss (${E}_{ \mathrm{ON}}$). The novel structures (Novel-1 and Novel-2) can suppress the hole accumulation and slow down the rising of the electric potential in the silicon region near the G2. The di/dt can be lowered and the displacement current that overcharges G2 can be effectively shielded. Compared with the conventional TGU structure, the di/dt of the Novel-2 are improved by 56.3% at the same ${E}_{ \mathrm{ON}}$ of 2.4 mJ/cm2. [ABSTRACT FROM AUTHOR]

The circular Rogowski coil with a rectangular section is the most common and basic measuring unit of current. However, in some situations, a noncircular Rogowski coil is more suitable because of the limited space to be embedded in and the demand for decreasing the size of the Rogowski coil. Circular Rogowski coil is usually wound uniformly to guarantee the positional accuracy and anti-interference ability considering the very good symmetry. However, for noncircular Rogowski coil, the turns arrangement is usually designed based on experience due to the lack of theoretic direction. This article first proposed a method of turns arrangement of the noncircular Rogowski coil with a rectangular section, which the positional accuracy and anti-interference ability can be achieved at the same time. By establishing the equivalent relation between mutual inductance and electric potential, the turns density of the noncircular Rogowski coil can be acquired by solving the charge density on its equivalent electrodes. The turns density is proven to be unique. For a given turn number, the turns arrangement of the noncircular Rogowski coil can be obtained by discretizing the turns density. As an example of the method, a square Rogowski coil, which can be used in chip current measurement in Press Pack insulated gate bipolar transistors (IGBTs), is particularly designed and contrasted with the traditional square Rogowski coil with turns equidistantly arranged to verify the great positional accuracy and anti-interference ability. The results of the calculation and experiment show that this method is very effective. [ABSTRACT FROM AUTHOR]

A novel fast-switching silicon-on-insulator lateral insulated gate bipolar transistor (SOI LIGBT) is proposed and investigated in this article. The proposed device introduces trench barriers (TBs) at the collector end based on shorted anode (SA) structure to eliminate the snapback effect. The introduced TB structure can make the flow path of electron current be compressed and extended when the SA LIGBT is turned on so that the opening of collector p+/n-junction is prior to that of collector n+/n-junction. At the same time, it retains the ability to extract unbalanced electrons when the SA LIGBT is turned off. Through the TCAD simulation, the obtained results show that snapback-free can be realized by changing trench depth and pitch between TB structures. Compared with the separated SA (SSA) LIGBT, the forward voltage drop of the proposed LIGBT is reduced by 13.9% with snapback-free and much shorter collector region, which also retains the ability to extract unbalanced electrons. Thus, under the same forward voltage drop of 1.49 V, the turn-off time, and loss of the proposed LIGBT is 20.3% and 21.1% lower than those of the conventional (Conv.) LIGBT, respectively. In general, the tradeoff between turn-off time and forward voltage drop of the proposed LIGBT has much better performance. [ABSTRACT FROM AUTHOR]

The performance of theoretical ultrahigh-voltage power semiconductor devices has been predicted by means of numerical simulations using the Sentaurus technology computer-aided design tool. A general silicon carbide punch-through insulated-gate bipolar transistor (IGBT) structure has been implemented with suitable physics-based models and parameters to reflect the device characteristics in a wide range of device blocking voltages from 20 to 50 kV. The models for 20 kV class IGBTs have been implicitly validated by means of published experimental results. Mixed-mode simulations were performed that predicted total switching energy loss densities of 335, 629, 906, and 999 mJ/cm2 for 20, 30, 40, and 50 kV class devices, respectively, at 25 °C, JC = 20 A/cm2, and an ambipolar carrier lifetime of 20 μs. While the IGBT on-state forward voltage drop reduces, the switching losses increase with higher charge-carrier lifetime for a given current density (e.g., 20 A/cm2). The large span of simulation results will be used as an input support to the design of future high-power converters. [ABSTRACT FROM AUTHOR]

Insulated gate bipolar transistors (IGBT) short‐circuit (SC) protection is one of the most important protection methods for IGBT converter equipment. The fast detection and protection response time could reduce the permanent damage of devices, and extend their use life cycle. At present, the collector emitter voltage vce desaturation method is widely used in the commercial IGBT drive circuit, which has blanking time of fault detection and protection. In this paper, an improved adaptive vce SC detection and protection is proposed to realize the blanking time adjustment under different SC conditions. By the determination of the di/dt characteristics of the current variation on the parasitic inductance between the power emitter and the Kelvin emitter of IGBT modules, the execution time of the two detection methods can be set. According to the switch process and the SC type, the corresponding logic processing will be carried out to realize the fast detection of different SC conditions. The circuit scheme without blanking time detection and protection is designed, and the circuit is modelled and simulated by Pspice. The IGBT driving circuit SC test without blanking time detection and soft turn‐off protection has been carried out. Simulation and test results can verify the feasibility of the proposed circuit. [ABSTRACT FROM AUTHOR]

In this article, an optimized zero-voltage and zero-current pulsewidth modulation converter is proposed by investigating conventional converters widely used in dc grids. In this presented model, instead of using three-phase power switches, single-power switches are employed since single-power MOSFETs and IGBTs have lower switching loss and simpler drive circuit than the other module series. Therefore, the converter size and its power loss will decrease compared with the models with three-phase components. In addition, soft switching is utilized in the proposed converter to decrease the total power loss and increase efficiency accordingly. Also, for optimum use of zero-voltage switching (ZVS) and zero-current switching (ZCS), a new combination of IGBT and MOSFET is presented in the converter’s circuit. Considering low turn-off loss for IGBT and low capacitive loss for MOSFET, IGBT and MOSFET are taken for ZVS switching and ZCS switching, respectively. In addition, a simple stabilizer circuit is added to the output part to improve the operation of the output filter since the filter plays an essential role in dc–dc converters. Finally, simulation of the proposed model is implemented in the PLECS software, and the results confirm the proper application of ZVS and ZCS, converter high efficiency, and high stability at the output voltage. [ABSTRACT FROM AUTHOR]

A novel silicon-on-insulator lateral insulated gate bipolar transistor (SOI LIGBT) is proposed in this paper. The proposed device has a P-type buried layer and a partial-SOI layer, which is called the BPSOI-LIGBT. Due to the electric field modulation effect generated by the P-type buried layer and the partial-SOI layer, the proposed structure generates two new peaks in the surface electric field distribution, which can achieve a smaller device size with a higher breakdown voltage. The smaller size of the device is beneficial to the fast switching. The simulation shows that under the same size, the breakdown voltage of the BPSOI LIGBT is 26% higher than that of the conventional partial-SOI LIGBT (PSOI LIGBT), and 84% higher than the traditional SOI LIGBT. When the forward voltage drop is 2.05 V, the turn-off time of the BPSOI LIGBT is 71% shorter than that of the traditional SOI LIGBT. Therefore, the proposed BPSOI LIGBT has a better forward voltage drop and turn-off time trade-off than the traditional SOI LIGBT. In addition, the BPSOI LIGBT effectively relieves the self-heating effect of the traditional SOI LIGBT. [ABSTRACT FROM AUTHOR]

Insulated gate bipolar transistor (IGBT) module is the most widely used power electronic device in converters. Condition monitoring of IGBT is critical for avoiding sudden failures. Health management of converters based on accurate IGBT junction temperature is of great importance to reliable operation. However, the existing monitoring methods have some drawbacks, including low feasibility of online implementation, intrusiveness, and slow response. IGBT junction temperature has a strong influence on IGBT on-state voltage drop. A novel online IGBT junction temperature measurement method based on the on-state voltage drop is proposed in this article. This technique can monitor the on-state voltage drop of IGBT and extract IGBT junction temperature online. Besides, the influences of the measurement circuit temperature variations and IGBT load current variations are considered and compensated based on the off-state stage of the IGBT. Simulation and experimental results validate the feasibility of the proposed technique. The proposed method has advantages of fast response, low cost, and simple circuit structure for noninvasive online IGBT junction temperature monitoring. [ABSTRACT FROM AUTHOR]

H-bridge-based multilevel converters (e.g., cascaded H-bridge converters) benefit from modularity and scalability. However, they suffer from the complexity and costs associated with a large count of semiconductor switches, together with their drivers and peripheral circuits, as well as higher conduction losses as compared to half-bridge-based counterparts, as two switches in each submodule must simultaneously conduct to provide a current path. To reduce the number of active switch semiconductors and conduction losses, this article proposes novel multilevel converters with symmetrical half-bridge submodules. The symmetrical half-bridge submodule features a bipolar voltage output, a reduced switch count, and simplicity. Furthermore, this article proposes a sensorless voltage balance scheme that successfully gets rid of capacitor voltage mismatch problems through diodes and submodule parallelization. This scheme can greatly reduce capacitor voltage ripples, thereby allowing the saving of dc capacitances, particularly in the case of numerous submodules. Finally, simulation and experimental results validate the superiority of the proposed multilevel converters and voltage balance scheme. [ABSTRACT FROM AUTHOR]

RMS current load is one of the most important design criteria for the dc-link capacitors of voltage source converters. In the literature, determination of this rms current load is well documented for state-of-the-art modulation schemes, such as space vector modulation. But the methods presented cannot be applied for direct current control algorithms. Therefore, this article introduces a new approach especially for direct current controllers, which reflects and compares to the state-of-the-art calculation method for space vector modulation. As direct current control is a feedback control, no closed-form solution can be given. Instead, the dc-link capacitor rms current load is determined by an iterative calculation scheme as a function of the modulation level and the phase angle. Although the scheme presented is applied to a three-phase two-level voltage source converter, it can be adapted to any voltage source converter topology. An example is presented applying the calculation method to one specific direct current control algorithm. The calculated results are verified via a digital simulation model as well as test bench measurements showing good correlation. For correct comparison, different effects are considered and discussed between simulation, calculation, and measurement results. These contain transients, the commutation process between insulated gate bipolar transistor (IGBT) and diode, the current-dependent voltage drop of the semiconductors, and the stationary current error of the hysteresis control. The dc-link capacitor current load for space vector modulation is calculated analytically as a reference by using the state-of-the-art method. The comparison of results obtained in this article and the reference are very similar, which is discussed in the conclusion. [ABSTRACT FROM AUTHOR]

In this article, the ON-state performance limits of 4H-silicon carbide (SiC) IGBTs in field-stop technology are theoretically estimated for the first time and compared against silicon counterparts. The theoretical analysis is based on static modeling of a high-current p-i-n diode and the calculation results are examined with TCAD simulations. Owing to conductivity modulation effect, the ON-state losses of 4H-SiC IGBTs do not show any significant increase with the increase in breakdown voltage (BV). However, the large built-in potential of SiC poses an inherent limit on the reduction of ON-state voltage drop. Compared with 4H-SiC IGBTs, the silicon-based IGBTs exhibit superior ON-state performance limits within the BV range considered, although their drift layer thicknesses are ten times higher than that of 4H-SiC IGBTs. Therefore, silicon IGBTs remain as efficient technologies for enhancing high power conversion efficiency. [ABSTRACT FROM AUTHOR]

In this article, an approach for design optimization of high-voltage (≥3300 V) planar clustered insulated gate bipolar transistor (CIGBT) is proposed and investigated through TCAD simulations. New 3-D scaling rules are employed in this approach to improve the electrical characteristics and widen the safe operating area. As shown in the simulation results, a scaled 4.5-kV field-stop CIGBT can achieve an ON-state voltage drop of 1.78 V at Tj = 300 K and Jc = 50 A/cm2, mainly due to the enhancement of inherent thyristor action. High levels of turn-off robustness are maintained by the scaled CIGBTs. In addition, the scaling rules also result in improved short-circuit robustness due to control of current saturation levels. Furthermore, by integrating the 3-D scaling rules with the trench CIGBTs, the ON-state performance shows significant improvement compared with the state-of-the-art IGBT technologies. Therefore, scaling rules on CIGBTs is a highly promising approach for enhancing the converter efficiency in medium- and high-voltage applications. [ABSTRACT FROM AUTHOR]

Recently, more occasions with high input voltage and/or high output voltage applications are emerging. However, the existing switching devices are limited by the voltage stress, e.g., the available maximum blocking voltage of insulated-gate bipolar transistors is 6.5 kV. Therefore, several methods are provided to solve this issue, including series connection of switches, multilevel converters, and modular series–parallel structures, where the modular series–parallel systems are the most popular choice due to the advantages of low cost, simple design process, high modularity, reliability, and redundancy. The main objective of series–parallel systems is to ensure the sharing of input/output voltage/current. Based on this, a comprehensive review on the available voltage/current sharing methods for series–parallel systems, which include input-series output-parallel, input-parallel output-series, and input-series output-series structures is provided in this article. Moreover, the relationships between the input voltage/current sharing and output voltage/current sharing of series–parallel systems are explained. [ABSTRACT FROM AUTHOR]

In this study, an insulated gate bipolar transistor (IGBT) with three-layer poly gate is proposed and investigated by TCAD simulation. Here, gate is spilt in two different workfunction materials of N+ poly ( ϕ g = 4.17 eV) and P+ poly ( ϕ g = 5.25 eV). Lower workfunction poly layer is sandwiched between higher workfunction poly, connected via a single metal. The gate oxide thickness is varied in x-direction. This leads to improvement in transconductance and reduction in miller capacitance. Thin oxide near the emitter serves good control over the charge carriers in the channel. This deployment of dual material gate in proposed device results in 36% reduction in area-specific on-resistance without any degradation in breakdown voltage. In addition to this, proposed device exhibits improved transient characteristics with 18.5% and 60% reduction in turn-off time and delay, respectively, as compared to conventional device. Further, the turn-off energy loss is reduced by 23.5% and 29.09% reduction in on-state voltage drop is achieved. Furthermore, proposed device offers 23%, 58%, and 30% improvement in FOM1, Baliga figure of merit (BFOM), and FOM2, respectively. [ABSTRACT FROM AUTHOR]

It is well-known that the dynamic avalanche (DA) phenomenon poses fundamental limits on the power density, turn-off power loss, dV/dt controllability, and long-term reliability of MOS-bipolar devices. Therefore, overcoming this phenomenon is essential to improve the energy efficiency and ensure their safe operation. In this work, a detailed analysis of the 1.2-kV MOS-bipolar devices is undertaken through both calibrated TCAD simulations and experiments to show the fundamental cause of DA and the impact of the current density, supply voltage, and 3-D scaling rules on the DA performance. Furthermore, the DA performance of a 1.2-kV non-punch-through (NPT) trench clustered insulated gate bipolar transistor (TCIGBT) is evaluated for high current density and low power loss operations. The results indicate that this device configuration is free of DA and can be used for ultrahigh current density operation in an energy-efficient manner. [ABSTRACT FROM AUTHOR]

Silicon-carbide (SiC) mosfets have shown superior characteristics to Si IGBTs, bringing in significant performance improvement such as enabling more compact, higher efficiency converters that are not feasible with conventional Si IGBTs. Currently, there is a lack of systematic and conclusive investigation into soft-switching inverters using SiC mosfets in comparison to Si IGBTs. This article, therefore, presents a comparative evaluation of a soft-switching inverter, i.e., the auxiliary resonant commutated pole inverter (ARCPI) using SiC mosfets or Si IGBTs. The switching transition, switching device current stress, neutral point ripple current, electromagnetic interference (EMI), efficiency, and cost are compared on identical ARCPI setups, i.e., with the same printed circuit boards and under identical driving conditions (gate drivers). Experimental results show that the ARCPI using SiC mosfets has better performance than that using Si IGBTs due to its faster switching speed. First, the ARCPI using SiC mosfets performs full zero-voltage switching and the switching transition behavior is more predictable. Unlike Si IGBTs, SiC mosfets have no turn-off tail current and forward voltage drop during switching transitions. Second, the ARCPI using SiC mosfets endures less current stress and smaller ripple current in dc-link capacitors. Third, the ARCPI using SiC mosfets exhibits better EMI performance and higher efficiency. Specifically, a maximum 20 dBμV harmonic reduction can be achieved around 800 kHz and a 3.1% improvement in efficiency can be achieved at 6 kW. [ABSTRACT FROM AUTHOR]

In this article, a new postfault control algorithm for cascaded H-bridge (CHB) multilevel inverter is proposed to increase the maximum available output voltage under semiconductor fault conditions. Once a semiconductor switch in an H-bridge power cell fails, instead of bypassing the faulty cell, it can be utilized to generate a voltage. However, one of the three levels (positive, negative, or zero) of the faulty cell output voltage is not available, reducing the available output voltage of the cell to half. In the proposed method, the faulty cells being utilized and combined with the neutral shift (NS) method to achieve a higher output voltage of the CHB in faulty conditions. The output voltage obtained by the proposed method is analyzed for different faulty conditions and compared with the conventional NS method. Experimental results are presented confirming the effectiveness of the proposed methods in increasing the maximum output voltage at different faulty conditions. [ABSTRACT FROM AUTHOR]

A new gate structure in the trench-gate insulated-gate bipolar transistor (IGBT) design is proposed and analyzed for power-loss reduction and the suppression of electromagnetic-interference (EMI) noise. Although the turn-off loss and the ON-state voltage drop Vce(sat) are improved by the injection-enhancement (IE) effect, the IE effect caused dynamic avalanche that limits the turn-off loss reduction. In addition, EMI noise is induced by high dI/dt and large surge current due to the negative gate capacitance. This article shows that the dynamic avalanche and the negative gate capacitance can be suppressed by the management of the electric field concentration and hole current flow around the trench gate by the proposed alternated trench-gate (AT) IGBT structure, and both low power loss and good switching controllability can be obtained. The device simulation results show that the AT-IGBT improves the turn-on surge current Isurge-Vce(sat) tradeoff compared with the conventional IGBTs. [ABSTRACT FROM AUTHOR]

A new structure in trench-gate insulated gate bipolar transistor (IGBT) design is proposed and analyzed not only for power loss reduction but also for long-term stability and suppressing electromagnetic interference (EMI) noise using a device simulation. Although turn-off loss and ON-state voltage drop Vce(sat) are improved by injection enhancement (IE) effect, IE effect causes dynamic avalanche that limits turn-off loss reduction and degrades long-term stability by the charge trap at the trench gate oxide interface. In addition, hole current around the gate induces EMI noise due to the negative gate capacitance. This article shows that the proposed surface buffer (SB) IGBT suppresses dynamic avalanche and negative gate capacitance maintaining low power loss by covering the trench gate bottom and hole evacuation from the pMOS channel. [ABSTRACT FROM AUTHOR]

In this article, we deal with the onboard fast energy conversion system (FECS) that is installed in a wireless railway train (WRT), which receives electrical energy not from the wayside device but from the onboard device when traveling between stations, after getting such energy stored by fast charging during its stopping time at a station. The adopted input-series and output-independent architecture and the interleaving topology can reduce the size and weight of onboard FECS for 1500 V, which is double the operating voltage of the existing 750 V operating voltage. This allows 1200 V class insulated-gate bipolar transistor applications to increase switching frequency and reduce passive component volume. In addition, in order to secure system stability, which is important in any transportation system, a WRT must operate on the basis of simple control. Through a simple and efficient balance control based on a variable current limiter, the input voltage unbalance caused by the input voltage sharing is resolved. Also, it can control charging and discharging based on the energy moving characteristic of the train operation pattern and connection with a high-power energy storage pack. The performance of the onboard FECS at 1500 V with the proposed method is experimentally verified on a 600 kW prototype system. [ABSTRACT FROM AUTHOR]

Medium voltage insulated gate bipolar transistors are fast switching devices that require low gate drive power. They inherently generate high voltage and current gradients during switching transitions. These are generally limited by retarding the changes of the gate charge. Additional gate resistors are usually installed for this purpose. The drawback is high switching losses. A novel method is described in this article that aims at controlling the voltage and current gradients during switching transitions. The gate charge of the input MOS device is controlled by injected gate currents. These follow particular command functions that are predefined and stored in a memory. The method requires reacting within microseconds, which traditional closed-loop control cannot do. Specific time events are therefore defined to trigger the respective command function. These functions depend on the instantaneous values of the collector current or the collector–emitter voltage, variables that are identified without delay, knowing their predefined gradients and counting the time from the respective event to reach their final values. Experimental results show the performance of event driven control. Low current and voltage gradients are enforced while the switching losses are reduced. [ABSTRACT FROM AUTHOR]

This article proposes a thyristor conduction-insulated gate bipolar transistor (TC-IGBT) with a p-n-p base and an n-p-n collector to reduce turn-off loss. The parasitic p-collector/n-drift/floating p (FP)-layer/carrier stored (CS)-layer thyristor is activated by the double channel gate and the p-n-p base acts a hole barrier to increase hole concentration at the top side. The n-p-n collector is used for extracting electrons from the n-drift region to decrease hole concentration at the bottom side. Therefore, these two effects form linear and descending hole concentration distribution profile. As a result, the p-n-p base and the n-p-n collector in the TC-IGBT offers lower turn-off loss and turn-off fall time. TCAD numerical simulations show reductions up to 47% (3.15 mJ) and 52% (34 ns) in turn-off loss and turn-off fall time, respectively, when compared to a field stop (FS) IGBT with similar breakdown voltage, threshold voltage, and short circuit time. Therefore, this designed structure may be attractive for power electronics applications. [ABSTRACT FROM AUTHOR]

In this article, a novel snapback-free reverse-conducting insulated-gate bipolar transistor (RC-IGBT) with P+ pillars at the collector side (PPC) is proposed and investigated by TCAD simulations. This structure features the P+ pillar structure at the side of collector and exits a gap of N-buffers above N+ collector. The P+ pillars increase the distributed resistance below the buffer layer during turn-on transient, show bipolar mode, and eliminate the snapback phenomenon. Accordingly, the structure eliminates the snapback phenomenon with a smaller half-cell pitch of 10~μm, making that the device is more reliable and suitable for parallel connection. For the same forward voltage drop, the turn-off loss of the PPC structure is reduced by 34%. [ABSTRACT FROM AUTHOR]

In this article, a fixed and smooth-switch-sequence modulation strategy is proposed to equalize the dc-link voltages among the cascaded rectifier. The structure of a single-phase three-level neutral-point-clamped cascaded rectifier is studied. Three core steps of this strategy are analyzed respectively, including carrier wave disposition calculation, fixed pulse generator, and voltage rank function. In addition, a criterion of the degree of the load unbalance is established in order to measure the voltage balancing boundary of the presented approach. The superiorities of the proposed control strategy embody the smooth switch sequence, the strong voltage balance capability, as well as the fixed switch sequence. Owe to these advantages, the cascaded rectifier could effectively reduce the switching frequency, achieve the goals of voltage balancing, and reduce the calculation burden of the controller when the number of cascaded modules is large. The effectiveness of the proposed strategy is verified by simulation and experiment results. [ABSTRACT FROM AUTHOR]

This paper shows the relationship between the circuit parameters and the voltage sharing performance in series-connected insulated gated bipolar transistors (IGBTs). A simple analytic model is proposed to examine voltage balancing in series-connected IGBTs. By the proposed model, the reason for voltage imbalance is easily analyzed. In addition, the impact of the time constant of the snubber, which is affected by the snubber components, is detailed. From this analysis, it has been demonstrated that the snubber capacitance should be at least double the output capacitance of the switching device to stabilize voltage sharing. To verify the usefulness of the proposed technique, a multiple pulse tester has been implemented and tested. Experimental results reveal that the error between the proposed model and the practical system is only 1.7%. In addition, the accuracy of the proposed model is high enough to be utilized for the analysis of the series-connected IGBTs. [ABSTRACT FROM AUTHOR]

This paper proposes a long-distance multi-load wireless power transfer (WPT) system with a constant voltage (CV) output for each load. A repeater unit consisting of two bipolar repeater coils is designed to power the load. Multiple repeater units are placed in a line and the power can be transferred from one unit to the next. Each repeater unit corresponds to one load and multiple loads can be powered simultaneously. The two repeater coils in the same repeater unit are placed perpendicularly to eliminate the magnetic coupling between them. In each repeater unit, a compensation capacitor is placed in series with the transmitting coil while two extra compensation capacitors form a series-parallel (SP) structure for the receiving coil. When neglecting the coil's parasitic resistance, the CV characteristics can be obtained, which enables the independent and flexible power control of each load. Moreover, the influence of the parasitic resistances on the system performance is analysed. Such a system is especially suitable for powering the gate drivers in a high-voltage converter where multiple insulated gate bipolar transistors (IGBTs) are connected in series. An experimental setup with six loads is constructed to validate the proposed system. The maximum system efficiency can reach 88.1%. [ABSTRACT FROM AUTHOR]

Short-circuit (SC) capability is a critical requirement for power switches in modern power electronics applications. A tradeoff between on-state voltage drop, switching loss, and SC capability of insulated gate bipolar transistors (IGBTs) is performed by manufacturers. In general, IGBTs optimized with low on-state voltage have poor SC capability compared with those with good SC capability. In this report, a novel method is described to improve the SC capability of IGBTs optimized with low on-state voltage drop by using a gate-source-shorted Si depletion-mode (DM) mosfet connected in series with the emitter. A seven-fold increase in the SC capability of commercially available 1.2-kV IGBTs was achieved at high dc bus voltages with minimal impact on on-state and switching loss performance. The proposed method also provides a sensing voltage signal at the drain of the Si DM-mosfet, which can be used to monitor the on-state current magnitude and to detect SC fault conditions. [ABSTRACT FROM AUTHOR]

In this letter, a new structure of Insulated Gate Bipolar Transistor (IGBT) with lateral variation doping concept in epitaxial region is presented. In the drift region, the lateral variation doping profile acts as a parasitic wide base pnp transistor over pn superjunction (SJ). This parasitic pnp transistor forms Darlington pair with IGBT’s internal pnp transistor. The parasitic Darlington pair increases the output current gain and reduces the On-state voltage drop (Von). Apart from this, p−-col in the collector layer provides increment in recombination rate of minority charges. An increase in the recombination rate reduces the minority carrier life-time, which further reduces the turn-off and delay time. Improvement in the turn-off time leads to optimize the trade-off between turn-off energy loss (Eoff) and Von, as compared to the conventional structure. [ABSTRACT FROM AUTHOR]

A novel double gate snap-back free reverse-conducting insulated-gate bipolar transistor (RC-IGBT) is proposed in this article, which merges a trench field stop IGBT and a trench barrier diode in a monolithic device. The backside n-channel works at weak inversion mode in forward conduction state and can be automatically turned into strong inversion mode in the reverse conduction state. Therefore, bidirectional conduction capability with snapback free characteristics is achieved in the novel RC-IGBT. Performance comparison with conventional RC-IGBT is carried out based on Sentaurus device simulations, the results show that the novel RC-IGBT device in this article exhibits excellent overall performance in both IGBT and diode modes, the reverse recovery performance is significantly improved owing to the topside trench barrier structure and backside self-controlled carrier injection, compared to the conventional RC-IGBT, the proposed device demonstrates 32% lower Irrm and 63% lower trr. [ABSTRACT FROM AUTHOR]

A novel silicon-on-insulator lateral insulated gate bipolar transistor (SOI LIGBT) is proposed and investigated in this work. The device features a single-step buried oxide (SSBO) structure formed on the silicon-on-insulator (SOI) layer. The SSBO structure introduces a high electric field peak by the electric field modulation to modulate electric field distributions. Therefore, the proposed SOI LIGBT can maintain the high breakdown voltage (BV) while shortening the length of drift region, which achieves the decreased total number of stored carriers during the turn-on and fast depletion of drift region during the turn-off. As the simulation results show, under the same BV of 98 V, the drift region length of the proposed SOI LIGBT is 4.4 µm, which is much shorter than that of the conventional SOI LIGBT of 12.0 µm. So the turn-off time of SSBO SOI LIGBT is 76.6% lower than that of the conventional SOI LIGBT at the same forward voltage drop of 1.72 V. It shows that the tradeoff between forward voltage drop and turn-off time can be significantly improved. [ABSTRACT FROM AUTHOR]

This paper proposed a Insulated Gate Bipolar Transistor with extended polysilicon gate structure (EPG IGBT) based on P-type drift region (P-Drift), which has electron inverse and accumulation layer. It designs the gate as an extended gate structure with a Bipolar Junction Transistor (BJT), extending into the collector region, and the BJT is always blocked during the switching process. When the EPG IGBT is conducting, the N j region has a constant positive voltage, which causes the P-Drift to form an electron inversion layer and conduct. Through TCAD simulation, the EPG IGBT maintained the same Breakdown Voltage and turn-off time, while reducing its forward voltage drop (V CE(sat) = 0.98 V) and turn-off loss (E off = 0.89 mJ/cm2) by 36 % and 44 %, respectively, compared with FSSJ IGBT of the same process (V CE(sat) = 1.53 V, E off = 1.58 mJ/cm2). In addition, the static latch-up I – V and Forward Biased Safe Operating Area (FBSOA) of the EPG IGBT have been significantly improved, providing a new approach for optimizing IGBT. [ABSTRACT FROM AUTHOR]

An insulated-gate bipolar transistor (IGBT) module has two aging modes: 1) bond wire fatigue and 2) solder fatigue, both of which have a significant impact on the reliability of power electronic systems. A good way to increase the service life of such systems is to apply different compensation strategies according to different aging modes. As one of the simplest parameters in online measurements, the ON-state voltage is influenced by both types of fatigue, but its changes are not due solely to the aging of the IGBT module. Considering how the collector current and junction temperature influence the ON-state voltage, this article separates the ON-state voltage into three parts for the purpose of diagnosing IGBT module fatigue. In this article, the package voltage was extracted, which reflects the bond wire fatigue influence on the ON-state voltage of the IGBT module directly. This supplements the existing diagnostic method and realizes fatigue diagnosis under different working conditions. [ABSTRACT FROM AUTHOR]

A novel composite device structure with enhanced conductivity modulation silicon on insulator (SOI) lateral insulated gate bipolar transistor (LIGBT) which consists of a normal LIGBT (NLT) region, an nMOS region (NM) and a pMOS region (PM) is proposed in this article. By employing a parasitic n-p-n bipolar transistor, the thyristor in the NLT performs a high electron current in ON-state. As a result, the conductivity modulation in the NLT region is dramatically enhanced, which leads to the improvement of the current capability and the forward ON-state voltage drop. In addition, due to the parasitic diode in the substrate of NM, the potential of p-base of the NLT can be clamped at the ON-state voltage drop of the diode, which guarantees the current saturated capability of the LIGBT. [ABSTRACT FROM AUTHOR]

In this article, a condition monitoring system for the degradation assessment of power semiconductor modules under switching conditions is presented. The proposed monitoring system is based on the online measurement of two damage indicators: the on-state voltage of the semiconductor and the voltage drop in the bond wires. The on-state voltage of a semiconductor can be employed for temperature estimation, in order to anticipate failures in the solder joints that increase the thermal resistance of the cooling path. Moreover, by measuring the voltage drop in the bond wires, the degradation of the bond wires can be detected. The described monitoring system has been implemented in an inverter prototype, and tests have been performed in different scenarios to verify its capabilities in healthy and degraded states. Furthermore, a monitoring routine has been proposed in order to perform the required measurements in high switching frequency applications. [ABSTRACT FROM AUTHOR]

In this paper, a dual-fed (DF) common dc-link topology open-end winding permanent magnet synchronous motor for aircraft high-speed starter–generator application is considered. While on one hand the common dc bus configuration significantly simplifies and reduces the costs of the topology, on the other hand it allows the zero-sequence current (ZSC) to flow freely in the system. High-speed machines are characterized by low phase inductance, which implies low zero-sequence impedance. A small time constant of the zero-sequence circuit produces a high-frequency, high-intensity ZSC ripple with the risk of harming the switching devices. This paper presents a novel hybrid space vector pulsewidth modulation that allows to instantaneously eliminate the zero-sequence voltage (ZSV) produced by the two voltage source converters (VSCs) by square wave modulating one of the two VSCs. The non-sinusoidal machine back electromotive force (EMF) has been considered and the effect of the converters’ dead time on the ZSV has been analyzed. The square-wave-modulated VSC uses insulated-gate bipolar transistor (IGBT) devices, whereas the other uses Silicon Carbide (SiC) technology. The proposed topology is tested through both simulations and experiments. [ABSTRACT FROM AUTHOR]