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Current photospeed testing methods are based on dose to clear (E 0 ) or resist contrast (γ 10 ). Either method is inadequate for controlling sensitivity to within ±1.5%. We investigated various methods for improving these photospeed tests. Ranked in order of decreasing importance are: (i) controlling standing waves (reflectivity); (ii) choice of developer, (iii) develop time; and (iv) exposure pattern. Reflectiuty can be controlled by careful attention to resist thickness, addition of a bottom antireflective layer, addition of a low refractive index layer (AquaTar), or by using a thick photoresist. Moreover, we can utilize the whole dissolution curve rather than the one-point determination of the E 0 test

In Optical Maskless Lithography, the die pattern to be printed is generated by a contrast device, known as a Spatial Light Modulator. The contrast device consists of a multitude of micro-mirror pixels that are independently actuated. Different physical principles can be utilized to change the optical properties of the pixels. Rasterization in Optical Maskless Lithography is an algorithm that, given the description of a pattern to be printed (e.g. an OPC'd GDS-II or OASIS mask file), computes the necessary states of the contrast device pixels. A Global Optimization rasterization algorithm for Optical Maskless Lithography was recently developed and successfully tested. Utilizing optimization techniques, this algorithm enables contrast devices to match the imaging and placement performance of conventional masks thru focus and dose. The algorithm has been demonstrated for contrast devices based on various light modulation principles, including tilt, phase-step tilt, and piston mirror devices. This paper enhances the Global Optimization algorithm by significantly improving both computational time and memory requirements. These enhancements enable the algorithm to be implemented on an Optical Maskless Lithography scanner for printing die patterns of full size and complexity. The enhanced method is demonstrated on 130 nm node and 90 nm node SRAM layout test cases to validate the capability of Optical Maskless Lithography to reproduce realistic patterns. Simulations of the dose/focus process window in resist for rasterized patterns are presented, along with the ability of the rasterized images to match the CD and placement error performance of a conventional mask to below the level of process noise. In addition, the rasterization algorithm enhancements are verified experimentally on a calibrated tilt mirror spatial light modulator mounted to a 193 nm aerial image test stand.

Ever-increasing reticle cost makes optical maskless lithography an attractive alternative to mask-based technologies, particularly for low-volume runs such as prototypes, ASIC personalization, and engineering short loops. If the resolution and imaging performance of the optical maskless exposure tool can match or exceed standard reticle based scanners, then one can seamlessly integrate mix-and-match strategies into the manufacturing flow or even go to an all maskless strategy since resists and film stacks are unchanged. We have developed optical maskless analogs for a majority of the reticle based strong phase shifting techniques. These include analogs to binary, attenuated PSM, alternating PSM, CPL + assist features, and vortex reticles. We will present simulation of maskless vs. reticle based lithography of all these techniques, demonstrating how to move off grid, change CD, OPC correct through pitch, and present common feature process windows and CD / image placement error sensitivities that suggest that for certain applications, optical maskless will be superior to reticle based lithography.

We have been exploring alternating aperture phase-shifting masks for Application Specific Integrated Circuit poly gate CD's below 100 nm. The implementation is dark field altPSM with a complementary bright field binary 'trim' mask. The alternating phase shift approach is attractive because of the potential for improved resolution, increased individual process windows, and reduced developed resist line edge roughening (LER) needed for superior device performance. This can be accomplished with moderately low exposure tool numerical aperture (NA). However, these improvements must justify the increased mask cost, throughput reduction of dual mask, and the necessity of optical and process pattern correction (OPC) of 2 masks. Compared to the single reticle non-strong phase shift approach, the altPSM option potentially has new modes of failure: image intensity imbalance between the 0 and 180 degree phases, phase error sensitivity, and quartz sidewall angle sensitivity, all as a function of feature p9itch. Additionally, the high coherence required to print altPSM sensitivities plus corrections for mask writing inaccuracies, lithography printing inaccuracies, and etch inhomogeneities. Manufacturing with altPSM adds additional CD uniformity requirements across the chip. In this paper we discuss the performance of a 193 nm altPSM dual mask set's printing across the exposure slit of an ASML/950 scanner in the 80 nm regime. We will show how wafer level image placement error varies with focus and pitch across the scanner slit. We will discuss 3 methods of OPC correction as a function of CD and pitch across the scanner slit, their self-agreement, and OPC grid requirements. We will also present OPC corrected common process windows across the slit.

We present results of a verification study of totally automated optical proximity correction (OPC) for mask redesign to enhance process capability. OPC was performed on an aggressive 0.35 micrometer i-line LSI logic SRAM design using the automated OPC generation code Eoptimask, employing the aerial image simulation code FAIM, both from Vector Technologies, Inc. Three different tests were performed, varying in the aggressiveness and type of corrections made. The key issues addressed in this work are the predictive capability of the aerial image simulation and, particularly, the ability of automatically generated OPC to significantly improve the fidelity of the final printed resist image for different geometries. The results of our study clearly demonstrate the utility of automated OPC based on aerial image simulation. Key experimental results include: two-fold increase of depth of focus latitude; demonstration of the feasibility of full off-axis illumination on the stepper; successful resolution of different feature types (posts, lines and spaces) on the wafer to correct CD at a single common exposure and focus condition. Future research will address detailed issues in reticle manufacture and inspection which are critical for cost-effective large-scale OPC.

This study evaluates the effect of dyes, including photosensitive dyes, on resist performance such as: swing curve reduction, resist dissolution rate, resolution, dose and focus latitude, scumming, etc. The paper demonstrates good correlation between modeling of the dyed resist performance and experimental results.

An investigation of the dissolution behavior of an acid catalyzed deep ultraviolet (DUV) positive resist has been completed. The immersion develop dissolution rate as a function of dose and post exposure bake temperature was measured by Perkin Elmer Dissolution Rate Monitor (DRM) for single layer resist on a silicon substrate. A reaction-diffusion model has been built to describe the dependence of development rate on exposure dose and post exposure bake (PEB) time/temperature. A mixed diffusion model has been built to account for catalyst diffusion and quenching. Developed images have been compared with simulated image quality, line width, and process window.© (1993) COPYRIGHT SPIE--The International Society for Optical Engineering. Downloading of the abstract is permitted for personal use only.

A multilayer resist (MLR) scheme for the manufacturing of sub‐0.25‐μm x‐ray masks has been developed. MLR facilitates the generation of high‐aspect ratio patterns by electron beam lithography and dry etching. The top three layers are standard MLR structures: a thin imaging resist layer, a thin intermediate layer, and a thick organic underlayer. Previously, others have used spin‐on‐glass or silicon nitride for the intermediate layer [R. Viswanathan, R. Acosta, D. Seeger, H. Voelker, A. D. Wilson, I. Babich, J. Maldonado, J. Warlaumont, O. Vlad’imirsky, F. Hohn, D. Crockatt, and R. Fair, Microelectron. Eng. 9, 93 (1989). A. Huberger, Microelectron. Eng. 5, 3 (1986)]. Sufficiently, thin low‐stress tantalum or tungsten was utilized to provide oxygen reactive‐ion etching resistance. The following layers are utilized under the MLR stack: another thin tantalum or tungsten etch stop layer; a thin gold plating base; and finally a 2.5‐μm silicon membrane. Low image size bias dry etch processes that were successfull...

The use of i-line lithography for the 16 to 64 Mbit DRAM device generations calls for increased performance of i-line resists. This paper reports on investigations on novel sensitizers for advanced i-line lithography, starting out with a discussion of general design criteria, then discussing methodology and results of a screening phase, and examining in greater detail a small number of selected candidates for which resolution, exposure latitude, and depth-of-focus data were obtained. Finally, a new advanced resist for i-line lithography, AZR 7500, is presented, and its performance is evaluated in terms of the above criteria as well as thermal flow resistance.

Thermal sensitivity measurements of diazoquinone/novolac (DQN), poly‐olefin sulfone/novolac (SNS), and an acid catalyzed/proprietary resin (XPR) were made by gently exposing coated wafers at 10−9 amp/cm2 on a cooled/heated stage in our e‐beam exposure tool. The results were characterized by the influence of exposure temperature on blanket‐exposure‐dissolution rates and developed image profiles. Three‐dimensional Monte Carlo absorbed‐energy‐density calculations have been combined with ANSYS finite‐element‐thermal analysis to estimate the time evolution of temperature profiles on silicon wafers, silicon membranes, and SiO2 wafers at 50 keV. Lithographic modeling system (LMS) has then combined the predicted thermal fronts with the experimentally measured resist response to predict the effects on image profiles. Thermal proximity effects in 2 μm wide lines are negligible on Si wafers, 3–5% on Si membranes, and two to three times worse on SiO2 substrates.

The contribution of an electron beam exposure tool to positive resist profiles has been investigated experimentally and with two‐ and three‐dimensional modelling. Listed in decreasing importance are: spot placement error > beam defocus > beam tilt (trapezoidal energy distribution across and/or down the length of a line in the resist) > beam noise (variation of energy from spot to spot down the length of a resist line, as well as Gaussian noise within the same spot). These tool contributions to resist profile have been characterized in two resists: a linear PMMA derivative and a highly nonlinear novolac resist that exhibits a long induction time before developing.