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1. A Novel Strategy for the Application of an Oxide Layer to the Front Interface of Cu(In,Ga)Se2 Thin Film Solar Cells: Al2O3/HfO2 Multi-Stack Design With Contact Openings

2. Detailed Insight into the CZTS/CdS Interface Modification by Air Annealing in Monograin Layer Solar Cells

3. Sn Substitution by Ge: Strategies to Overcome the Open-Circuit Voltage Deficit of Kesterite Solar Cells

4. Beyond Silicon<scp>MOS</scp>: An Electrical Study on Interface and Gate Dielectrics with<scp>ac</scp>Admittance Techniques

5. Ultrathin Cu(In,Ga)Se2 Solar Cells with Ag/AlOx Passivating Back Reflector

6. A multi-stack Al2O3/HfO2 design with contact openings for front surface of Cu(In,Ga)Se2 solar cells

7. Creating nano-sized contact openings in the thick dielectric-based passivation layers for ultrathin CIGS solar cells: A cost and time-effective approach

8. Revealing the electronic structure, heterojunction band offset and alignment of Cu2ZnGeSe4: a combined experimental and computational study towards photovoltaic applications

9. Rear surface passivation of ultra-thin CIGS solar cells using atomic layer deposited HfOx

10. Stability, reliability, upscaling and possible technological applications of kesterite solar cells

11. The path towards efficient wide band gap thin-film kesterite solar cells with transparent back contact for viable tandem application

12. On the Importance of Joint Mitigation Strategies for Front, Bulk, and Rear Recombination in Ultrathin Cu(In,Ga)Se-2 Solar Cells

13. Opto-electronic properties and solar cell efficiency modelling of Cu$_2$ZnXS$_4$ (X=Sn,Ge,Si) kesterites

14. Wide band gap kesterite absorbers for thin film solar cells: potential and challenges for their deployment in tandem devices

15. Wet Processing in State-of-the-Art Cu(In,Ga)(S,Se)2 Thin Film Solar Cells

16. A study to improve light confinement and rear-surface passivation in a thin-Cu(In, Ga)Se2 solar cell

17. From digital currencies to digital finance: the case for a smart financial contract standard

18. Optoelectronic properties of thin film Cu2ZnGeSe4 solar cells

19. Innovative and industrially viable approach to fabricate AlOx rear passivated ultra-thin Cu(In, Ga)Se2 (CIGS) solar cells

20. A study of the degradation mechanisms of ultra-thin CIGS solar cells submitted to a damp heat environment

21. Smart Contracts, Distributed Ledgers, and the Need for an Algorithmic Financial Contract Standard

22. [The frequency of abnormal ultrasonographic findings in the lungs of 129 calves with bronchopneumonia]

24. Multistep deposition of Cu2 Si(S,Se)3 and Cu2 ZnSiSe4 high band gap absorber materials for thin film solar cells

25. Physical and electrical characterization of high-performance Cu 2 ZnSnSe 4 based thin film solar cells

26. Refractive index extraction and thickness optimization of Cu2 ZnSnSe4 thin film solar cells

27. Photoluminescence study and observation of unusual optical transitions in Cu2ZnSnSe4/CdS/ZnO solar cells

28. Investigation of Properties Limiting Efficiency in Cu2ZnSnSe4-Based Solar Cells

29. Fabrication of high band gap kesterite solar cell absorber materials for tandem applications

30. Progress in Cleaning and Wet Processing for Kesterite Thin Film Solar Cells

31. Border Traps in Ge/III–V Channel Devices: Analysis and Reliability Aspects

32. Electrical characterization of Cu2ZnSnSe4 solar cells from selenization of sputtered metal layers

33. Fabrication of ternary and quaternary chalcogenide compounds based on Cu, Zn, Sn and Si for thin film photovoltaic applications

34. Oxygen-Induced Degradation in C60-Based Organic Solar Cells: Relation Between Film Properties and Device Performance

35. Integration of InGaAs Channel n-MOS Devices on 200mm Si Wafers Using the Aspect-Ratio-Trapping Technique

37. Defect density reduction of the Al2O3/GaAs(001) interface by using H2S molecular beam passivation

38. Interface and Border Traps in Ge-Based Gate Stacks

39. H2S molecular beam passivation of Ge(001)

40. Electrical Characterization of the MOS (Metal-Oxide-Semiconductor) System: High Mobility Substrates

41. Electrical Quality of III-V/Oxide Interfaces: Good Enough for MOSFET Devices

42. Growth of high quality InP layers in STI trenches on miscut Si (001) substrates

43. Selective Epitaxial Growth of InP in STI Trenches on Off-Axis Si (001) Substrates

44. Large-area, catalyst-free heteroepitaxy of InAs nanowires on Si by MOVPE

45. Suitability Study of Oxide/Gallium Arsenide Interfaces for MOSFET Applications

46. (Invited) Selective Epitaxial Growth of III-V Semiconductor Heterostructures on Si Substrates for Logic Applications

47. ALD on High Mobility Channels: Engineering the Proper Gate Stack Passivation

48. (Invited) Exploring the ALD Al2O3/In0.53Ga0.47As and Al2O3/Ge Interface Properties: A Common Gate Stack Approach for Advanced III-V/Ge CMOS

49. Risk and regulation

50. High-k Dielectrics and Interface Passivation for Ge and III/V Devices on Silicon for Advanced CMOS

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