Search

We report reliable 5 ns switching of spin-transfer torque magnetoresistive random-access memory devices of nominal size 43 nm and a resistance area product of 11 Ω·µm2. We measured 256 devices with a 100% write-error-rate (WER) yield at a WER floor of $10^{-6}$ and a steep WER slope as a function of voltage. A single device had a WER less than $10^{-10}$ for 5 ns write pulses. We show promising 3 ns switching performance, with a 94% WER yield at a $10^{-6}$ WER floor, for 64 devices of nominal size 50 nm.

We demonstrate spin-transfer torque magnetoresistive random access memory (STT-MRAM) arrays achieving 2.8e-10 write error rate (WER) performance at 3 ns write duration at a magnetic tunnel junction (MTJ) diameter of 40 nm. The bit-to-bit distribution of the write voltage at a WER of 1e-6 is characterized by a relative standard deviation of 3.7% for W0 and 4.5% for W1, sufficient to meet the write voltage distribution requirement for last-level cache (LLC) applications at 1x nm nodes.

We report for the first time reliable 2 ns switching of spin-transfer torque magneto-resistive random access memory (STT-MRAM) devices by demonstrating 100% write-error-rate (WER) yield at 1e-6 write-error floor of 254 devices with tight distributions and steep WER slope at a nominal size of 49 nm. A single device was demonstrated with 2 ns write pulses to have less than 1e-11 write-error rate, limited only by test time. We further demonstrate reliable 3 ns switching performance, with 99% WER yield at 1e-6 write-error floor of 256 devices with nominal size of 43 nm and a single device with less than 1e-11 write-error rate with a completely different free layer materials design. These two different free layer materials designs address one of the major remaining challenges for STT-MRAM to replace SRAM for last level cache (LLC) applications.

We report on the fabrication of nanoscale, three-terminal in-plane spin–orbit torque switching devices with low switching current densities. Critical parameters in the fabrication process, including the ion beam etching angle and time, were optimized to avoid fabrication defects and improve device yield. Measurements of the magnetic field and current-induced switching behavior of the tunnel junctions demonstrate a sensitivity to the nanopillar aspect ratio, which dictates the nanopillars’ anisotropy and thermal stability. Additionally, we show that the current density required for switching can be reduced and the device thermal stability increased by inserting Hf interlayers into the heterostructure. Micromagnetic simulations are generally consistent with the experimentally observed switching behavior, suggesting an increase in the interfacial perpendicular anisotropy at the CoFeB/MgO interface and the reduction in the Dzyaloshinskii–Moriya interaction at the W/CoFeB interface by the Hf interlayers.

Binary stochastic neurons (BSNs) form an integral part of many machine learning algorithms, motivating the development of hardware accelerators for this complex function. It has been recognized that hardware BSNs can be implemented using low-barrier magnets (LBMs) by minimally modifying present-day magnetoresistive random-access memory (MRAM) devices. A crucial parameter that determines the response of these LBM-based BSN designs is the correlation time of magnetization $\tau _c$ . In this letter, we show that, for magnets with low-energy barriers ( $\Delta \approx k_BT$ and below), circular disk magnets with in-plane magnetic anisotropy (IMA) lead to $\tau _c$ values that are two orders of magnitude smaller than $\tau _c$ of magnets with perpendicular magnetic anisotropy (PMA). Analytical descriptions demonstrate that this striking difference in $\tau _c$ is due to a precessionlike fluctuation mechanism that is enabled by the large demagnetization field in IMA magnets. We provide a detailed energy-delay performance evaluation of previously proposed BSN designs based on spin-orbit torque MRAM and spin-transfer torque MRAM employing low-barrier circular IMA magnets by SPICE simulations. The designs exhibit subnanosecond response times leading to energy requirements of approximately a few femtojoules to evaluate the BSN function, orders of magnitude lower than digital CMOS implementations with a much larger surface area. While modern MRAM technology is based on PMA magnets, results in this letter suggest that low-barrier circular IMA magnets may be more suitable for this application.

We report the impact of four key parameters on switching efficiency of STT-MRAM devices with perpendicular magnetic anisotropy: device size, device resistance-area product (RA), blanket film Gilbert damping constant (a), and process temperature. Performance degradation observed in 400°C-processed devices was eliminated by optimizing the perpendicular magnetic tunnel junction (p-MTJ) materials. Furthermore, 400°C-compatible double MTJs were developed for the first time and showed 1.5x improvement in switching efficiency compared to single MTJs with identical free layers.

We give an abstraction of multisecret sharing based on Lagrange interpolating polynomial that is accessible to a fully mechanized analysis. This abstraction is formalized in the applied pi-calculus by using an equational theory that characterizes the cryptographic semantics of multisecret sharing based on Lagrange interpolating polynomial. We also present an encoding from the equational theory into a convergent rewriting system, which is suitable for the automated protocol verifier ProVerif. Finally, we verify the Yang–Chang–Hwang (YCH) protocol in ProVerif. Copyright © 2013 John Wiley & Sons, Ltd.

Spin-transfer torque (or spin-torque, or STT) based magnetic tunnel junction (MTJ) is at the heart of a new generation of magnetism-based solid-state memory, the so-called spin-transfer-torque magnetic random access memory, or STT-MRAM. Over the past decades, STT-based switchable magnetic tunnel junction has seen progress on many fronts, including the discovery of (001) MgO as the most favored tunnel barrier, which together with (bcc) Fe or FeCo alloy are yielding best demonstrated tunnel magneto-resistance (TMR); the development of perpendicularly magnetized ultrathin CoFeB-type of thin films sufficient to support high density memories with junction sizes demonstrated down to 11nm in diameter; and record-low spin-torque switching threshold current, giving best reported switching efficiency over 5 kBT/μA. Here we review the basic device properties focusing on the perpendicularly magnetized MTJs, both in terms of switching efficiency as measured by sub-threshold, quasi-static methods, and of switching speed at super-threshold, forced switching. We focus on device behaviors important for memory applications that are rooted in fundamental device physics, which highlights the trade-off of device parameters for best suitable system integration.

We present a new multi-dimensional data structure, which we call the skip quadtree (for point data in R2) or the skip octree (for point data in Rd, with constant d > 2). Our data structure combines the best features of two well-known data structures, in that it has the well-defined “box”-shaped regions of region quadtrees and the logarithmic-height search and update hierarchical structure of skip lists. Indeed, the bottom level of our structure is exactly a region quadtree (or octree for higher dimensional data). We describe efficient algorithms for inserting and deleting points in a skip quadtree, as well as fast methods for performing point location, approximate range, and approximate nearest neighbor queries.

Magnetic Random Access Memory (MRAM) is a new technology which offers a viable alternative to other forms of nonvolatile memory, such as flash, where read access time, writing speed, and cell endurance is at a premium. Difficulties in scaling DRAM below the 32nm node may make MRAM a suitable candidate for DRAM replacement. The rigors of MRAM cell development present array designers, process engineers, and test engineers with many unique challenges. Enabling process development through test support of defect monitors makes test development particularly difficult in MRAM technology, due to the complexity of highly nonlinear magnetic materials and device behaviors. We review a number of new strategies and methodologies employed to support MRAM cell development over several MRAM generations, in a research environment. A unique test system with both advanced digital and parametric capabilities will be described. The importance of database integration within the test software and real-time data analysis will also be discussed.

A number of materials related problems have hindered the development of a reproducible process for the fabrication of high-quality SQUIDs and magnetometers. In this paper we discuss the use of GdBa/sub 2/Cu/sub 3/O/sub 7/ and YBa/sub 2/Cu/sub 3/O/sub 7/ thin films for the fabrication of step-edge and bicrystal magnetometers and how materials selection can influence issues such as reproducibility, yield and noise performance. Magnetometers with noise performance as low as 63 fT//spl radic/Hz have been made with variations in junction parameters (I/sub c/ and R/sub n/) that are as low as 25% on-chip and 57% from chip-to-chip.

We have fabricated YBaCuO superconducting quantum interference devices (SQUIDs) using an inhibiting ion implantation method. The devices were patterned by implanting silicon or boron ions through photoresist masks to locally inhibit the conductivity. The implantation was performed at energies of 40 - 120 keV and doses of . The DC SQUIDs consist of step-edge junctions on substrates. Operational SQUIDs fabricated with this new patterning method were demonstrated at 77 K. Line widths of have been achieved and sharp superconducting - normal boundaries were observed. The surface of the patterned device remained planar.

Direct-coupled single-layer thin film SQUID magnetometers are the most reproducible high- T c magnetometers fabricated to-date. They also serve as a good model for early identification of critical device and fabrication needs for system applications. A step-edge weak-link junction is a single-layer junction technology that allows easy lithographic definition of device position. In this article we discuss the basic technologies involved in the fabrication of single-layer SQUID devices, as well as some issues in operating such SQUIDs in an ambient, unshielded environment.

We have fabricated junctions and DC SQUIDs using laser ablation for both the YBCO electrodes and the thin SrTiO/sub 3/ (STO) barrier regions in a variety of device configurations. These SQUIDs operate reliably at 77 K and preliminary results on a limited number of devices show that they store reasonably well for periods in excess of one year, and exhibit only small changes with repeated cycles (/spl sim/10) between room temperature and 77 K. Noise measurements made using bias reversing on a SQUID (92 pH) at 77 K give a white noise of about 15 /spl mu//spl Phi//sub 0///spl radic/Hz and a 1/f upturn at about 0.2 Hz. >

A quantitative comparison study of single-level step-edge junction-based SQUIDs and bicrystal-substrate-based SQUIDs is given. Similar SQUID performance was found in terms of white flux noise level and junction-critical-current-related 1/f noise. Excess current was found in most step-edge devices. Issues related to systems applications, such as magnetic field-induced noise, junction cyclability upon repeated use, and environmental stability of oxide-metal contacts are also discussed. >

We give an abstraction of verifiable multi-secret sharing schemes that is accessible to a fully mechanized analysis. This abstraction is formalized within the applied pi-calculus by using an equational theory which characterizes the cryptographic semantics of secret share. We also present an encoding from the equational theory into a convergent rewriting system, which is suitable for the automated protocol verifier ProVerif. Based on that, we verify the threshold certificate protocol in ProVerif.

A method is developed for the fabrication of sub-100 nm current-perpendicular spin-valve junctions with low contact resistance. The approach is to use a batch-fabricated trilayer template with the junction features defined by a metal stencil layer and an undercut in the insulator. The spin-valve thin film stack is deposited afterwards into the stencil, with the insulator undercut providing the necessary magnetic isolation. Using this approach, reproducible spin-current-induced magnetic switching is demonstrated for junctions down to 50 nm×100 nm in size.

PMA spin-torque switchable junctions have been demonstrated with lower switching current and faster switching speed compared to IMA devices. They are promising for further technology exploration in solid-state memory applications.

We report data from 4-kbit spin torque MRAM arrays using tunnel junctions (TJs) with magnetization perpendicular to the wafer plane. We show for the first time the switching distribution of perpendicular spin torque junctions. The percentage switching voltage width, σ(V c )/ = 4.4%, is sufficient to yield a 64 Mb chip. Furthermore we report switching probability curves down to error probabilities of 5×10−9 per pulse which do not show the anomalous switching seen in previous studies of in-plane magnetized bits.

We study the problem of securely searching for resources in p2p networks where a constant fraction of the peers may act maliciously. We present two novel hashing-based schemes that can be employed to reliably support resource location and content retrieval queries, limiting the ability of adversarial nodes to carry out attacks. Our schemes achieve scalability and load balancing and have small authentication overhead. In particular, for a network with n peers, resources are securely located with O(log2 n) messages and content from a collection of m data items is securely retrieved with O(logn logm) messages.

We have demonstrated a robust magnetic tunnel junction (MTJ) with a resistance-area product RA=8 Omega-mum2 that simultaneously satisfies the statistical requirements of high tunneling magnetoresistance TMR > 15sigma(Rp), write threshold spread sigma(Vw)/

We present a new multi-dimensional data structure, which we call the skip quadtree (for point data in R^2) or the skip octree (for point data in R^d, with constant d>2). Our data structure combines the best features of two well-known data structures, in that it has the well-defined "box"-shaped regions of region quadtrees and the logarithmic-height search and update hierarchical structure of skip lists. Indeed, the bottom level of our structure is exactly a region quadtree (or octree for higher dimensional data). We describe efficient algorithms for inserting and deleting points in a skip quadtree, as well as fast methods for performing point location and approximate range queries., 12 pages, 3 figures. A preliminary version of this paper appeared in the 21st ACM Symp. Comp. Geom., Pisa, 2005, pp. 296-305

Nanotubes and nanowires with both elemental1,2 (carbon or silicon) and multi-element3,4,5 compositions (such as compound semiconductors or oxides), and exhibiting electronic properties ranging from metallic to semiconducting, are being extensively investigated for use in device structures designed to control electron charge6,7,8. However, another important degree of freedom—electron spin, the control of which underlies the operation of ‘spintronic’ devices9—has been much less explored. This is probably due to the relative paucity of nanometre-scale ferromagnetic building blocks10 (in which electron spins are naturally aligned) from which spin-polarized electrons can be injected. Here we describe nanotubes of vanadium oxide (VOx), formed by controllable self-assembly11, that are ferromagnetic at room temperature. The as-formed nanotubes are transformed from spin-frustrated semiconductors to ferromagnets by doping with either electrons or holes, potentially offering a route to spin control12 in nanotube-based heterostructures13.

We study the problem of broadcasting confidential information to a collection of n devices while providing the ability to revoke an arbitrary subset of those devices (and tolerating collusion among the revoked devices). In this paper, we restrict our attention to low-memory devices, that is, devices that can store at most O(log n) keys. We consider solutions for both zero-state and low-state cases, where such devices are organized in a tree structure T. We allow the group controller to encrypt broadcasts to any subtree of T, even if the tree is based on an multi-way organizational chart or a severely unbalanced multicast tree.

In situ planarization of epitaxial films has been demonstrated. This is a critical technology for the processing of any epitaxial multilayer device. Ion beam assisted deposition (IBAD) has been used to planarize patterned yttria‐stabilized ZrO2 (YSZ)(001) substrates using YSZ films. X‐ray diffraction measurements have shown that the IBAD YSZ grows homoepitaxially. The IBAD planarization mechanism has similarities to those previously observed for rf bias sputtering. Critical current densities of up to 7×105 A/cm2 at 77 K have been measured for Ba2YCu3O7−x (BYC) films deposited on planarized patterned YSZ substrates using pulsed laser deposition. In contrast, BYC deposited on unplanarized patterned YSZ substrates did not become fully superconducting for measurements down to 25 K.

We have combined a novel low temperature positioning mechanism with a single‐chip miniature superconducting quantum interference device (SQUID) magnetometer to form an extremely sensitive new magnetic microscope, with a demonstrated spatial resolution of ∼10 μm. The design and operation of this scanning SQUID microscope will be described. The absolute calibration of this instrument with an ideal point source, a single vortex trapped in a superconducting film, will be presented, and a representative application will be discussed.

The effects of radio frequency radiation on the dc SQUID are examined. Simulations show how the shape of the SQUID transfer characteristic is distorted by radio frequency interference (RFI). How this affects three commonly used SQUID modulation methods is discussed, and the results explain why we experimentally observe the bias current reversing readout method to be the least susceptible to RFI. The commonly seen increase in the low frequency flux noise power spectrum of dc SQUIDs in unshielded environments is also explained.

All high‐Tc, multilevel edge junction superconducting quantum interference devices (SQUIDs) which now operate at 77 K have been fabricated using laser‐ablated YBaCuO electrodes and in situ laser‐ablated SrTiO3 for the barrier material. Devices with a SQUID inductance of about 70 pH have a peak to peak voltage swing, VΦ, up to 8 μV (dV/dΦ≂25 μV) and a flux noise (SΦ) of about 3×10−10 Φ20/Hz in the white noise region. IcRn, products for these devices are about 35 μV at 77 K with Ic in the range of 3–100 μA and operation to temperatures as high as 84 K observed. Scaling of the junction conductance and critical current with junction size has been measured on many devices and we observe an IcRn product that varies approximately as J0.89c.

In this work, we demonstrate a 6.9 sq. /spl mu/m embedded SRAM cell in a 0.25 /spl mu/m physical design-rule salicide high-performance CMOS technology. The scalability of this salicide-CMOS embedded-SRAM technology is demonstrated by functionality of the same SRAM cell implemented in 0.35 /spl mu/m and 0.25 /spl mu/m design rules. To our knowledge this is the smallest reported SRAM cell in a salicide-only technology, and is achieved using deep-UV lithography, shallow-trench isolation, damascene tungsten low-resistance local interconnect, and optimization of design-rules. Process and structure studies indicate process extendability to 0.18 /spl mu/m lithography generation. The CMOS technology is a 1.8 V, 0.12 /spl mu/m nominal L/sub EFF/, dual work-function CMOS with 4.0 nm gate oxide. The unloaded inverter and 2-way NAND gate delays are 24 and 45 ps respectively with 1.8 V power supply, and 57 and 98 ps with 1.0 V power supply.

An integrated 0.35 /spl mu/m CMOS technology with 0.15 /spl mu/m effective channel length (L/sub EFF/) is demonstrated in a 200 mm line. X-ray lithography is used for the critical gate level, along with conventional deep-UV and mid-UV lithography for other levels. Shallow Trench Isolation (STI) is used to achieve 0.35 /spl mu/m design rules. The NFET and PFET devices are designed for operation with a scaled power supply of 1.8 V. This technology provides 50% performance improvement relative to a 2.5 V, 0.5 /spl mu/m design rule, 0.25 /spl mu/m L/sub EFF/ high-performance CMOS technology. >

We have developed a process for the fabrication of YBaCuO high‐Tc junctions based on the step‐edge weak‐link concept. The process emphasizes the creation of sharp and straight step edges on a substrate, and the restoration of oxygen content for superconducting materials at the step edges. A diamond‐like carbon film is used as an ion milling mask for the creation of steps on substrates such as LaAlO3 and SrTiO3. Room‐temperature plasma oxidation is shown to be effective in restoring Tc from processing related degradation for grains residing at the step edge. Using this process, dc SQUIDs were fabricated with 77 K electrical performances matching, and in certain cases exceeding, similar SQUIDs made using bicrystal‐based tilt‐boundary weak‐link junctions.

We have invented a three superconducting quantum interference device (SQUID) gradiometer (TSG) that uses three SQUID magnetometers and a novel feedback method to measure magnetic field gradients. One SQUID, designated the reference SQUID, operates normally except that its feedback loop output is directed to all three SQUIDs through identical nonsuperconducting coils around each SQUID. The feedback loops for the remaining two SQUIDs, the sensor SQUIDs, measure the differences between the magnetic field at the reference SQUID location and those at the sensor SQUID locations. The voltage difference between the two sensor SQUID outputs divided by the gradiometer base line, the distance between the sensor SQUIDs, represents the average magnetic field gradient. We have measured gradient sensitivities of 10−12 and 10−10 T/m√Hz for TSGs made from bare low‐Tc and high‐Tc SQUIDs. An advantage of a TSG is that a sensitive gradiometer, free of hysteresis error, can be made using relatively small substrates.

Spin-transfer torque magnetic random access memory (STT-MRAM) is one of the most promising emerging non-volatile memory technologies. MRAM has so far been demonstrated with a unique combination of density, speed, and non-volatility in a single chip, however, without the capability to replace any single mainstream memory. In this paper, we demonstrate the basic physics of spin torque switching in 20 nm diameter magnetic tunnel junctions with perpendicular magnetic anisotropy materials. This deep scaling capability clearly indicates the STT MRAM device itself may be suitable for integration at much higher densities than previously proven.

The effects of radio frequency radiation on the dc SQUID are examined. Simulations show how the shape of the SQUID transfer characteristic is distorted by radio frequency interference (RFI). How this affects three commonly used SQUID modulation methods is discussed, and the results explain why we experimentally observe the bias current reversing readout method to be the least susceptible to RFI. The commonly seen increase in the low frequency flux noise power spectrum of dc SQUIDs in unshielded environments is also explained.© (1994) COPYRIGHT SPIE--The International Society for Optical Engineering. Downloading of the abstract is permitted for personal use only.

Bit error rates below 10-11 are reported for a 4-kb magnetic random access memory chip, which utilizes spin transfer torque writing on magnetic tunnel junctions with perpendicular magnetic anisotropy. Tests were performed at wafer level, and error-free operation was achieved with 10 ns write pulses for all nondefective bits during a 66-h test. Yield in the 4-kb array was limited to 99% by the presence of defective cells. Test results for both a 4-kb array and individual devices are consistent and predict practically error-free operation at room temperature.

CeO2 thin films have been deposited on patterned (100) LaAlO3 substrates using ion beam assisted deposition (IBAD) with ion beam energies between 350 and 500eV. Deposition temperatures were varied between 400°C and 600°C and deposition rates from 0.2Å/s to 1.2Å/s. Both normal and off-normal incidence ion bombardment have been studied. A trend towards planarization is observed when the ion to atom ratio is adjusted to obtain the proper degree of etching. The planarization mechanism for normal incidence bombardment appears to be similar to that previously observed for bias sputtering. X-ray diffraction shows that an initial layer of evaporated epitaxial CeO2 is required for continued epitaxial development during IBAD processing. The extent of planarization via off-normal ion incidence can be related to the direction of the ion beam with respect to the patterned features. X-ray pole figure measurements show that these films possess an in-plane orientation that is directly related to the ion beam parameters.

A three-terminal spin-torque-driven magnetic switch is experimentally demonstrated. The device uses nonlocal spin current and spin accumulation as the main mechanism for current-driven magnetic switching. It separates the current-induced write operation from that of a magnetic tunnel junction based read. The write current only passes through metallic structures, improving device reliability. The device structure makes efficient use of lithography capabilities, important for robust process integration.

Current-induced spin-torque switching was demonstrated on sub-100 nm magnetic tunnel junction devices fabricated on 200 mm substrates utilizing 180 nm complimentary metal–oxide–semiconductor back-end-of-the-line (BEOL) technology. Low resistance-area (RA) product and high tunneling magnetoresistance (TMR) were achieved by using substrates containing a CoFeB free layer and a thin MgO barrier. To obtain the desired sub-100 nm features, photoresist trimming was applied on patterns created by a 248 nm lithography tool. Furthermore, the magnetic stack was defined using an ion beam etch that stopped on the thin MgO barrier. Field-sweep measurements on elliptical devices that are 80 nm wide and 160 nm long indicated RA∼4 Ω μm2 and TMR∼90%. Upon injecting current into the devices while applying an external offset field of 28 Oe, current-induced switching occurred from parallel (P) to antiparallel (AP) state at +1.3 mA, and from AP to P state at −1.25 mA. BEOL process integration on 200 mm substrates enabled stati...