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An etching process with real-time monitoring of each monolayer removed is demonstrated. This etching capability which we refer to as monolayer chemical beam etching (ML-CBET) is achieved by employing in-situ reflection high energy electron diffraction (RHEED) intensity oscillation monitoring during etch. The etching is accomplished by injecting AsCl3 or PCl3 gas directly into the growth chamber at a temperature comparable to the typical growth temperature in the same system. This permits instant switching from etching to growth and vice versa in the same experimental run. The combination of growth and etch in a single chamber with both controllable at atomic scale presents a very powerful processing method for the fabrication of intergrated devices that require multiple steps of etch and regrowth. We have also identified the roughening mechanism during etch and present the methods to obtain excellent morphology through a migration enhanced smoothing mechanism.

Reflection high‐energy electron diffraction has been used to monitor the layer‐by‐layer removal of GaAs during chemical beam etching. The etching is accomplished by injecting AsCl3 gas directly into the growth chamber at a temperature typical for the growth. The development of a spotty pattern provides an early indication of surface roughness. A roughening mechanism of the etched surface due to a sluggish cation diffusion is identified. A migration enhanced etching method has been investigated in the etching of InP using AsCl3, which results in mirror like morphology. A two‐dimensional etching mechanism and a in situ monitoring technique at atomic scale are essential for a true monolayer etching technology.

An etching process with real-time monitoring of each monolayer removed is demonstrated. The etching is accomplished by injecting AsCl/sub 3/ or PCl/sub 3/ gas directly into the growth chamber at a temperature comparable to the typical growth temperature in the same system. This method allows instant switching between the etch and the growth modes. The etching rate of GaAs is insensitive to the substrate temperature, which is important for a reproducible etching technology. A roughening mechanism of the etched surface due to a lack of cation diffusion is identified. Using a pulse etching mode and a migration enhanced smoothing, mirror like morphology has been obtained in the etching of InP. A layer-by-layer etching process and a in-situ monitoring technique at atomic scale are essential for a true monolayer etching technology. >

We report on the characteristics of an avalanche InP/InGaAs heterojunction phototransistor. Below the turnover voltage, the gain is bias dependent and avalanching can be used to achieve significant ( \sim5\times ) improvement in the gain-bandwidth product. The noise current in this bias region has been measured and is shown to be predominantly shot noise of the photocurrent and the leakage current. Above the turnover voltage, negative resistance is observed and extremely high gains (>104) are achieved. In this mode, the pulse response is a narrow spike (rise time ≃ 20 ns) whose width is independent of the width of the incident optical pulse.

We describe the fabrication and device characteristics of experimental back-illuminated InP/InGaAs n-p-n heterojunction phototransistors. These devices exhibit photoresponse in the wavelength range of 0.95-1.6 \mu m. An optical gain of 40 at an input power of 1 nW (an improvement of 1000 in sensitivity over previously reported phototransistors) has been observed. Gains as high as 1000 have been achieved for higher incident power levels.

Previously we reported on the pulse1 and frequency response2 of InP/InGaAsP/InGaAs avalanche photodiodes with separate absorption, grading, and multiplication regions (SAGM-APD). In this paper we describe several modifications we have made to the device structure, shown schematically in Fig. 1, to achieve significant improvement in both the frequency and pulse response. The changes include (1) reduction of the total depletion width to decrease the transit time of the free carriers, (2) use of low-resistance substrates to reduce the RC time constant, (3) introduction of an additional transition layer to eliminate effectively hole trapping at the heterojunction interfaces, and (4) increasing the carrier concentration in the multiplication region to reduce avalanche buildup time.

The fabrication and device characteristics of back-illuminated InP/InGaAs n-p-n heterojunction phototransistors will be described. These devices consist of a "wide-bandgap" InP emitter with smaller bandgap InGaAs base and collector layers. Uniform spectral response is observed in the wavelength range from 0.95 µm to 1.6 µm. The DC optical gain increases from approximately 40 at an input power of 1 nW to over 1000 for an input power level of 5 µW. The small-signal gain is characteristically 2 to 3 times higher than the EC gain. The cut-off frequency f T is an increasing function of the incident light level; for 1 µW of incident power f T ≃ 300 MHz. The possible applications of these phototransistors in fiber optic systems will be discussed.

We report very high-speed operation of InP/InGaAsP/InGaAs avalanche photodiodes with separate absorption, grading and multiplication regions (SAGM-APDs). For low multiplication values (M0≤7) the bandwidth of these APDs is relatively insensitive to the gain and is determined by the hole transit time and the RC time constant. In this gain region bandwidths as high as 5.5 GHz have been achieved. For higher multiplication values the frequency response exhibits a constant gain-bandwidth product. We have observed gain-bandwidth products as high as 40 GHz, the highest value reported to date for a device of this type.

Back-illuminated InP/InGaAs heterojunction phototransistors are described. These devices exhibit a low-level optical gain of 40 at 1 nW of incident power which represents a 1000 × improvement in sensitivity over previously reported phototransistors. The maximum gain is 1000 at 5 μW input. The response is relatively flat from 0.95 μm to 1.65 μm wavelength.

We have demonstrated the feasibility of growth of InP/InGaAs structures directly on GaAs using atmospheric pressure metal organic vapour phase epitaxy. Growth conditions and the equipment used are described along with some preliminary measurements on the GaAs/InP/InGaAs wafers. P-N junctions were formed in these materials to evaluate diode characteristics.