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A robust optimized active disturbance rejection control (ADRC) based grid voltage sensorless current controller is developed for an LCL -filtered grid-connected inverter (GCI) via a predictive control approach under various sources of disturbance, including the model uncertainties, the LCL inherent resonance phenomenon, and nonideal grid environment. Aiming to improve the sinusoidal reference tracking performance as well as to reject lumped sinusoidal disturbances in the control practice, a resonant extended state observer is integrated into the ADRC structure, which guarantees a rigorous stable operation of inverter for bounded filter parameter uncertainties and adverse grid voltage conditions. The grid frequency adaptability is thoroughly considered in the controller design process and synchronization technique, offering an extra capability for GCI to operate under different grid voltage frequency levels or even the frequency deviation caused by grid fault events. Robustness against parameter uncertainty and system stability is analyzed through the discrete-time frequency analysis and pole-zero map approaches. The simulation and hardware experiments are conducted for GCI with LCL filter parameters designed for two typical regions (i.e., the resonance frequency is less and greater than one-sixth of switching frequency) to validate the theoretical analysis and the effectiveness of the proposed control method.

This article presents a novel space vector pulsewidth modulation (SVPWM) for a three-phase binary-cascaded multilevel inverter (BCMLI). The SVPWM could become impractical in multilevel inverters (MLIs) because of its increasing complexity with a larger number of levels. The gh coordinate system can ease the digital implementation, but to generate the inverter's abc states from the nearest three vectors (NTVs), iterative computations are required every sampling instant. This article proposes a further reduction of computations by directly generating the abc state with minimum common-mode voltage (CMV) from a gh vector. Subsequently, only one vector among the NTVs is required for implementing the proposed SVPWM. The reduced CMV profile within the NTVs further permits the reduction of commutations by clamping one phase during a sampling period. The presented technique exhibits full dc bus utilization capability and can be implemented in the BCMLI and further applied to any M-level MLI. Also, if M is considerably large or if switching losses and electromagnetic interference emissions must be minimized, nearest vector modulation with reduced CMV along with the line-frequency operation of high-voltage cells can be implemented to reduce the switching losses. Experimental results of a BCMLI are presented to verify the effectiveness of the proposed technique. Published version

Discontinuous conduction mode (DCM) and critical conduction mode (CRM) have held dominant positions in low-power boost power factor correction (PFC) control. Typically, two-level DCM and CRM suffer from high peak current and variable frequency at several-hundred kilohertz, respectively. The two factors can cause secondary effects such as high electromagnetic interference, current stresses, input filter design difficulty, and switching losses. Only to take merits of DCM and CRM that are fixed frequency and lower peak current, this article utilizes three-level boost (TLB) and its three-level current-slope options. This article proposes a hybrid conduction mode (HCM) control, which adopts adaptive single-switch on -time to achieve fixed-frequency quadrangular CRM operation. At lower input voltage, low inductor current enters DCM so that TLB PFC experiences hybrid operation modes depending on varying ac input. Analyses and experiment results in this article confirm that the proposed HCM control can achieve huge reductions of switching losses and peak current stress, improving efficiency in wide-range input voltage and load at the cost of acceptable PF drop. Moreover, a simple voltage-balancing scheme is implemented to the proposed control and verified effective to resolve the inherent topology issue.

In this article, we present a bridgeless hybrid-mode Zeta inverter for distributed energy systems. We integrate the secondary diode of the conventional unfolding-type Zeta inverter into one of diagonal pairs of the secondary-side switches in a bridgeless Zeta inverter. This structure decreases the number of active power components and provides naturally well distributed loss at the body diodes of the secondary-side switches over one cycle of grid voltage, and as a result, increases both output power transfer and reliability. To attain medium-high power capacity with appropriate size of magnetic components, the bridgeless Zeta inverter operates in both discontinuous conduction mode (DCM) and continuous conduction mode (CCM). However, control of the proposed inverter is difficult because of the distinct system dynamics caused by the operations in DCM and CCM. To deal with this control problem, we first identify the mode boundaries and, corresponding to each mode, develop a dynamic model to design a controller. Then, we propose to use a feedback controller plus a feedforward controller supplemented with a repetitive controller that uses a phase-lead compensator. Experimental results using a 300-W prototype demonstrate the feasibility and effectiveness of the proposed modeling and control approach.

This article proposes an average periodic delay-based repetitive controller for power factor correction (PFC) converters undergoing grid frequency variations. When the grid frequency is changed, a conventional repetitive controller requires an interpolation method or additional memory to achieve frequency adaptability. Furthermore, frequency adaptability can also be realized using a variable sampling frequency; however, this requires additional computation effort and a multirate digital control system. In this article, with a fixed sampling frequency and memory length, the proposed repetitive controller, which generates the average periodic delay unit, maintains its harmonic compensation performance under grid frequency variations. In the proposed method, the control variables are updated depending on the phase of the grid voltage to reflect the grid frequency deviations in the average period delay unit. Because no complicated software modification is necessary, the proposed scheme can be easily plugged in the existing control algorithm. The theoretical analysis and stability issues of the proposed scheme have been discussed in detail to ensure stable operation and disturbance rejection. Both the simulations and the experiments on a 1.5-kW PFC converter have been carried out to verify the effectiveness of the proposed repetitive control.

Discontinuous conduction mode controlled boosting power-factor-correction (PFC) converters suffer from high differential-mode electromagnetic interference (EMI) and require a large input filter due to high inductor current ripples at a single switching frequency. To remedy the shortcomings, a downward spread-spectrum frequency modulation (SSFM) is proposed in this letter. The SSFM can be used by boosting PFC converters for reduced EMI and improved efficiency. On top of the frequency modulation, a novel adaptive three-level current (ATC) scheme is devised with three-level boost PFC using multilevel capability to obtain further reductions of peak current and EMI amplitude. Analyses and experiments validate that the proposed SSFM and ATC scheme can bring improvements of EMI and efficiency at the cost of increased output-voltage ripple.

This article presents a single-sourced hybrid binary-cascaded multilevel inverter (BCMLI) with front-end high-frequency-link (HFL) converters. The purpose of HFL converters is to boost a dc-source voltage to three bus voltages in a binary ratio. In this article, one of the HFL converters is removed from the system and the voltage of the floating capacitor caused by the removal is controlled by a newly proposed floating-capacitor-voltage (FCV) control. Compared with the conventional BCMLI, the system size and cost can be significantly reduced while maintaining promising features, including 15-level output, high voltage gain, galvanic isolation, and reactive-power capability remain unchanged. The proposed FCV control utilizes one of the switching angles at the voltage-level transitions as the control variable in a single-loop design, which facilitates control simplicity in the proposed system. The hybrid BCMLI with the proposed FCV control shows relative advantages of voltage gain, isolation capability, reactive supply, and simple control system over the state-of-the-art hybrid inverter topologies with FCV control methods. The details of the hybrid BCMLI, modulation schemes, proposed FCV control design, and comparative assessment are included in this article. In order to validate the proposed system and FCV control, a set of experiments with a 1-kW BCMLI prototype has been conducted for wide-range load levels and power factors.

This brief presents a unified voltage balancing feedforward (UVBFF) for three-level boost (TLB) power-factor-correction (PFC) circuit in discontinuous and critical conduction modes. In general, the topology in both modes puts emphasis on low-cost system. Thus, electrolytic capacitors with wide-tolerance are commonly used at outputs and voltage unbalance is inevitable even under symmetric operations of two boost cells. In this brief, three-level switching capability of TLB PFC is introduced and asymmetric on-time feedforward for main switches is proposed. The proposed UVBFF can be realized by a single equation and harmonized with conventional feedback voltage-loop so that easy implementation is the key merit. The effectiveness of UVBFF is proven by analyses and experimental results.

In this paper, a 1-kW DC-DC buck converter with a four-phase interleaved matrix inductor is proposed for battery charging applications. It is well-known that the DC bias on the inductor will cause high core loss as it changes the B-H characteristic. Typically, the transient conduction mode employed in high voltage applications for zero-voltage-switching of devices would cause higher inductor current ripple. The conventional approach to reduce the effect of DC bias and inductor current ripple is employing multi-phases. However, the cost and size of the converter will increase significantly. This paper proposes the matrix inductor which has a small volume and reduces the effect of the DC bias by flux sharing and flux cancellation at the same time, results in low inductor core loss. With the interleaved operations the output current ripple can be lower which is suitable for battery charging application. Besides, the comparison of the synchronous and interleaved operation is presented. A 1-kW prototype is built and the experimental results show that the peak efficiency is 99.1% and 99.2% for synchronous and interleaved control, respectively. Additionally, the output current ripple of the interleaved operation is reduced by 85% in comparison with the synchronous operation. Office of Energy Efficiency and Renewable Energy (EERE), U.S. Department of EnergyUnited States Department of Energy (DOE) [DE-EE0008347] The information, data or work presented herein was funded in part by the Office of Energy Efficiency and Renewable Energy (EERE), U.S. Department of Energy, under Award Number DE-EE0008347. The views and opinions of authors expressed herein do not necessarily state or reflect those of the United States Government or any agency thereof.

Drain-source voltage-sensed synchronous rectification (SR) is a technique that can be used to reduce the secondary-side diode conduction loss of an LLC converter. In drain-source SR, an early SR-switch turn off issue is observed due to parasitics present in the path of the SR drain-source sensing loop. In rectifiers with parallel switches which is common in higher current applications, a new sequential turn-off method named “sequential parallel switching” (SPS) is proposed to extend the SR conduction period. By increasing the drain-source voltage signal near the turn-off moment, the effect of the parasitic inductance on the SR signal can be minimized, extending the total SR conduction time. This results in a net increase in total converter efficiency, despite a small increase in the SR switch channel conduction. A SPS-based rectifier is built with an FPGA based on a commercial SR controller and tested on a 300- $\text{V}_{\mathrm{ in}}$ , 1-kW LLC converter.

In this brief, a 400-W Gallium Nitride device based DC-DC boost converter with a four phase matrix inductor is proposed. It is well-known that there is a significant influence of the DC bias on inductor core losses and the simplest solution is to employ multiphase structures. However, the size of the converter will also increase as the number of phases increases. Therefore, in order to achieve both high efficiency and high power density, a matrix inductor is proposed for four phases boost converter. The proposed matrix inductor retains the flux sharing advantages of conventional inductors with E-cores and thus greatly increases the power density and utilization rate, by integrating the inductors through flux cancellation. Therefore, both the size and the core loss are reduced when compared with four conventional inductors. Moreover, since the four phases are operated in parallel, the phase error, which is a critical problem in the interleaved structure, may not affect the proposed converter, removing the current balance issue. Critical operation mode is utilized to achieve zero-voltage switching (ZVS) for all switches. Finally, the proposed four phase DC-DC boost converter and matrix inductor is built and tested to verify its feasibility. The peak and CEC efficiency is tested to be 99.3% and 99.1%, respectively.

The low-voltage ride through condition (LVRT) attracts wider attention with the increased power of central grid-connected photovoltaic (PV) systems. The conventional double-loop-based control strategy designed for the nominal voltage is slow and potentially unstable under the LVRT operation. In this article, a novel sliding-mode control-based feedback linearization is proposed to improve response speed of the PV system under LVRT condition. To increase the robustness of the control to parameter variations, sliding-mode control is combined with the feedback linearization in this article. Further, the complete linearization of the PV system can be achieved over the whole operating range. Moreover, the dc-link voltage operating point of the PV panel can be dynamically adjusted based on the drop depth of the grid voltage, which will reduce the load changes during the LVRT and subsequently ensure the ac current levels to stay within the design limits in any fault situation and enhance the LVRT capability of the central grid-connected PV system. Finally, a 100-kW PV inverter is built to validate the feasibility and effectiveness of the proposed strategy for LVRT.

In a magnetic bearing system, the levitation coils or electromagnets must be driven by an amplifier in order to control their currents for levitation stability. This amplifier typically drives every coil individually with hard-switching H-bridges. However, the inherent high dv/dt of hard-switching in conjunction with the large parasitic capacitance of magnetic bearing coils typically results in high current spikes and severe ringing in the switching process, which may interfere with position sensors and system communication. Furthermore, driving each coil individually requires a large number of switches. In this brief, a switch sharing zero-voltage-switching (ZVS) multichannel switching amplifier topology is proposed, which not only reduces the number of switches needed when driving multiple coils, but also eliminates current spikes and reduces the switching loss of the magnetic bearing amplifier. The proposed topology is experimentally tested to validate expected benefits.

In inductive power transfer systems, impedance matching is critical in obtaining high efficiency. However, since the load impedance is subject to variations in most applications, especially wireless charging, maintaining impedance matching is a challenge. One valid solution is to maintain the equivalent load impedance at the optimal value against load variations by controlling a load-side power converter. Nonetheless, the system overall cost, size, and complexity can be increased. In this article, based on a proper selection between full-bridge and half-bridge modes of the inverter and rectifier, an operation mode selection method is proposed that can achieve semi-impedance-matching with large load variations. In general, with the proposed method, high overall efficiency can be obtained while neither additional power converters nor complicated control is required. A 1-kW prototype has been developed and the experimental results have verified the proposed method.

The power loop stray inductances of the silicon carbide (SiC) half-bridge power module (HBPM) must be included in the circuit simulation model to predict the power device switching characteristics and the power bus noise caused by the power converter. Instead of a full equivalent circuit model of the SiC HBPM, a simplified but accurate three-terminal equivalent circuit model is presented in this article. Based on the simplified model, a novel frequency-domain impedance measurement method based on the two-port network technique is proposed to extract the power loop inductances through direct measurement. By using the extracted power loop inductances of a 1.2-kV 300-A SiC HBPM, a three-terminal equivalent model of the HBPM is obtained, and its accuracy is validated by the finite element method and experiments.

Conventional critical conduction mode (CRM) control for many boost-derived power factor correction (PFC) circuits forms triangular inductor current. For three-level boost (TLB) converter, the conventional method is unattractive because losses increase but waveform quality remains unchanged, compared to other topologies. In order to obtain higher efficiency and improved waveform qualities, this article focuses on the distinctive structure of TLB and its inherent degree-of-freedom (DOF) in current-slope shaping. Based on the DOF, a new CRM control for TLB PFC is proposed and analyzed. Detailed design and digital implementation method are also provided. Different from conventional methods, the proposed CRM control divides each switching cycle into three parts including common on -time of two switches, additional on -time of one switch and common off -time. Accordingly, TLB inductor current is synthesized in quadrangular forms. The analyses and experimental results confirm that switching frequency and peak input current of TLB can be reduced by the proposed control. Due to the reductions, efficiency, total harmonic distortion, and quality of input current are improved with practically unchanged power factor.

Magnetic characteristics of a switched reluctance motor (SRM) determine the modeling accuracy, the performance of a position sensorless control, and the torque ripple reduction control. Due to double saliency structure and core saturation, the magnetic characteristics of SRM is dependent on both the rotor position and the winding current amplitude, which makes it difficult to measure the actual incremental inductance or flux linkage. This article presents the magnetic characteristics identification method. A quad current sampling technique is proposed to capture the derivative of the winding current at a specific rotor position and current amplitude. The flux linkage, co-energy, and torque are calculated from the obtained incremental inductance profile. The proposed method can be easily implemented on digital signal processor–based SRM drive without any extra circuit. The LCR meter and torque sensor measurements are provided to validate the proposed incremental inductance measurement method.

In this article, an optimal design procedure of shunt RC damped LCL filter is discussed. The proposed design procedure finds the minimum damping resistance to guarantee the stability of the grid-current controller without affecting the effectiveness of the filter. This minimum value is derived using the factorized filter input admittance and filter forward transadmittance. The proposed factorization procedure allows us to have an analytical expression of system poles and zeros. Moreover, the minimum damping resistor is determined upon the desired crossover frequency and the desired phase margin of the grid-current controller. After that, an objective function is assumed, and an optimization problem is formulated to minimize the physical size of the filter by minimizing the total capacitance and inductance and by minimizing the filter ripple content as well. Accordingly, the proposed objective function minimizes the filter physical size and filter power losses and, hence, enhances filter's efficiency. A prototype demonstrates and validates the proposed filter design and analysis experimentally.

Pseudo-dc-link inverters are promising due to the single-stage configuration. The inverters can be isolated by high-frequency transformers, which also provide the freedom of step-up/down through winding turns ratio. Conventionally, a pseudo-dc-link inverter is based upon a pulsewidth modulation converter like flyback converter, but the accompanying switching losses can degrade efficiency and overall system performance. Alternatively, resonant converters (e.g., series resonant converter) seem to fit the need as they typically display soft-switching characteristics. However, the relevant research results are scarce because of two main reasons: high resonant current and limited soft-switching range. To overcome the difficulties, a hybrid modulation method is proposed in this article for a pseudo-dc-link inverter based on series resonant converter. In high-line region, the inverter operates with variable-frequency modulation, which leads to zero-voltage switching and relatively low-resonant current. In low-line region, the inverter operates with a short-pulse density modulation so that switching losses are greatly curtailed without excessive resonant current. The merits in both regions together contribute toward the high efficiency of the inverter. This article presents the operational principle of the proposed modulation as well as a comparison with other modulation methods. In addition, a 400 V–230 V ac, 2-kW prototype was built to verify the proposed modulation and the peak efficiency reaches 98.0%.

Pad misalignments are almost inevitable in most inductive power transfer (IPT) systems. It tends to cause parameter variations and, thus, significantly affects the performance of the IPT system. In this article, a hybrid IPT system with misalignment tolerance using the quadruple-D quadrature pads (QDQPs) is proposed to tolerate the x , y , z , and diagonal misalignments with load-independent output voltage, simplifying or even canceling control schemes. Besides, the proposed approach can restrict the increase of the primary current when the secondary side moves out of the operating region. Moreover, a new parametric design method is presented according to the misalignment characteristics of QDQPs. The method can limit the output voltage fluctuation to a certain range, given a predetermined misalignment distance. A 3.5-kW prototype was built to verify the proposed hybrid IPT system. The primary and secondary coil sizes are 400 mm × 400 mm, and the air gap is 150 mm. Experimental results demonstrate that the proposed hybrid system can tolerate −150 to +150 mm x -misalignment, −150 to +150 mm y -misalignment, −20 to +35 mm z -misalignment, and −100 to +100 mm diagonal misalignment with load-independent output voltage. Within the predetermined misalignment range, the output voltage fluctuation is less than 5%.

This paper presents a bridgeless Cuk-derived single power conversion inverter with reduced number of power components, which has reactive-power capability. The secondary diode of the conventional unfolding-type Cuk inverter is integrated into one of the secondary-side switches in the bridgeless Cuk-derived configuration, which reduces the number of active-power components. A modulation technique is developed to provide a current path during reverse power flow; this technique enables operations under unity and nonunity power factors. A repetitive controller coupled with a linear feedback controller and a feed-forward controller are used to achieve accurate output current tracking under the harsh control environment. Driving the diode-integrated switch in synchronous rectification mode provides higher power conversion efficiency than that under diode-based secondary side rectification. Circuit operation and design guidelines of the bridgeless Cuk inverter are presented in detail. A 500-VA prototype inverter was fabricated to demonstrate the desirable performance of the bridgeless Cuk-derived inverter.

In the no-load condition, LLC converter usually fails to regulate its output voltage although it operates at a high switching frequency. Till now, it is hard to obtain the exact relationship between design parameters and the maximum switching frequency for no-load regulation capability. In this paper, a specific criterion for no-load regulation of LLC converter is provided, without using active components or other modulation schemes. By analyzing the macroscopic switching period and microscopic switching transition in the no-load condition, it is shown that not only the peaking resonant current during the switching transition, but also the resonant tank design affect the no-load regulation of the LLC converter, which affects the no-load regulation capability. Furthermore, the relationship among design parameters is analyzed and the design guideline is also provided to achieve no-load regulation at the specified maximum switching frequency. To verify the effectiveness of the proposed design, 400 V input and 50 V/200 W output prototype is built and tested.

In photovoltaic applications, many previous research works have focused on pulsewidth modulation (PWM) resonant converters in order to achieve a high efficiency with a wide input voltage range. Conventional approaches utilized symmetric boosting modulation at the secondary side rectifier to obtain a symmetric operation, and they utilized two boosting modes in a switching period. Among various rectifier structures, the voltage doubler structure has a strong advantage due to a small number of components. However, it suffers from serious hard switching losses in the secondary side rectifier. In this paper, a new converter with a novel asymmetrical modulation is proposed and verified. The strong point of the proposed converter is that it eliminates hard switching turn- on losses from the rectifier, while maintaining the minimized number of components. Although the proposed converter adopts an asymmetric modulation, the offset current on the transformer becomes zero inherently. Furthermore, a “forced half resonance” operation of the proposed converter keeps rms current stresses at the same level as conventional converter although it has a higher peak current. Accordingly, the proposed converter achieves a superior efficiency with the minimum number of components at 35–25 V input and 380 V/300 W output specification.

The increasing usage of LLC-type dc-dc converters in utility, automotive, and power distribution applications has led to a push for a further increase in the converter's operating load range and efficiency. The secondary-side rectifier remains one of the lossiest areas in the converter, alluring designers to synchronous rectification (SR). One method is drain-source SR for cyclically adaptive, closed loop SR. However, when utilized, a severe current oscillation can be observed. An increase in SR duty cycle results in an increase in conduction time of the SR channel over the body diode. This issue becomes increasingly prevalent due to the usage of wide band-gap MOSFETs with high reverse drops and low sensed signal strength. This results in a current oscillation effect, leading to inconsistent SR operation, output ripple, and high EMI. In this paper, the issue is root caused analyzed. A method of improving drain-source SR for light-load SR operation is proposed. The method is prototyped on an FPGA to alleviate the issue on a $600\text{-}V_{in}/ 340\text{-}V_{out}$ 2.5-kW LLC-DCX (DC transformer) power converter.

LLC resonant converter can achieve zero voltage switching (ZVS) for primary-side devices and zero current switching (ZCS) for secondary-side rectifiers. However, the reverse recovery and junction capacitance ( Cj ) of secondary-side diode critically affect the ZVS condition of primary-side switches. The effect of Cj has been discussed in literature, but not the reverse recovery. In this paper, the reverse recovery charge ( Q rr) is converted to an equivalent capacitance $(C_{{\rm rr}\_{\rm eq}})$ for the study of primary-side ZVS performance. An accurate model during deadtime is derived and further applied to characterize ZVS performance with different reverse recovery charges in different regions. The concept of establishing parameter C total to consider both Cj and $C_{{\rm rr}\_{\rm eq}}$ is proposed to evaluate the effect of the secondary-side rectifiers. This concept provides the guideline for diode and synchronous rectification mosfet selection to ensure ZVS condition for LLC converters. To verify the concept and the derived model, a 200/400 V 400 W LLC resonant converter prototype operating from 200 to 700 kHz is built and its ZVS performances with different diodes are compared. Two issues caused by Q rr effect, including $V_{\rm ds}$ reverse charging and asymmetrical waveform during deadtime, are explained thoroughly as well.

A conventional asymmetrical half-bridge (AHB) converter is one of the most promising topologies in low-power applications because of the zero-voltage switching (ZVS) of all switches and the small number of components. However, when it operates with an asymmetrical duty ratio, it has a large dc-offset current in the transformer, which increases the size and core loss of the transformer. Moreover, because the dc-offset current decreases ZVS energy for one of the half-bridge switches, it has low efficiency in a light load condition. In addition, because most of the output current is concentrated in high-voltage-rating diodes that have large forward voltage drops, large conduction loss occurs in the secondary rectifier. To solve these problems, a new AHB converter with a coupled inductor rectifier (CIR) is proposed in this paper. By adopting the CIR structure in the AHB converter, the proposed converter not only eliminates the dc-offset current in the transformer, but it also has equalized current stress in the rectifier diodes. As a result, the proposed converter achieves high efficiency in entire load condition, compared to an AHB converter with a full-bridge rectifier. The effectiveness and feasibility are verified with a 250–400 V input and 100 V/200 W output prototype.

A single-inductor dual-supply dc–dc converter with bidirectional energy flow is proposed for the Internet-of-Things applications. This paper combines two dc–dc converters into one by sharing a single inductor, and it is capable of storing energy and powering output load by using the bidirectional inductor current. Besides, the voltage of the energy storage element is continuously monitored in the proposed converter, which eliminates the possibility of overcharging. Furthermore, the variations on the output voltage are typically negligible when the input voltage changes. In addition, a novel two-step startup procedure that does not require any on-chip/off-chip startup auxiliary circuit is proposed, which can significantly reduce the chip area. The proposed converter is fabricated by a 0.18- $\mu \text{m}$ CMOS mixed-signal process. The voltage range of the storing element is 1.2–1.4 V, and the maximal output power of the proposed converter is 18 mW with its output voltage setting at 1.8 V.

In this paper, a highly efficient isolated resonant converter with a novel modulation method is proposed for delivering power from photovoltaic (PV) modules to the dc microgrid. The proposed modulation method allows the converter to boost low input voltages and regulate a wide input voltage range. The converter design is based on a series resonant converter (SRC) that operates at the resonant frequency to achieve highest efficiency under nominal input voltage condition. Under shadowed or low irradiance conditions of PV panels, the converter will operate with the proposed “double-pulse duty cycle” modulation method to step up the voltage for the dc microgrid connection. With the proposed modulation method, the output switches serve for both synchronous rectification and voltage boost function. This method enables a higher voltage boost ratio than the SRC without adding additional switches while operating at the resonant frequency. A 300-W hardware prototype with gallium-nitride devices is built to verify the performance of the proposed converter and modulation method. The converter achieved a peak efficiency of 98.9% and a California Energy Commission weighted efficiency of 98.7% under nominal input voltage condition.

A 12-pulse converter has been commonly used for a large-scale power generating system. The arrangement of a delta–delta (Δ–Δ) and a delta–wye (Δ–Y) phase-shift transformer pair in series with the voltage source eliminates undesirable harmonics from nonlinear loads. Recently, a novel front-end for a multi-generator power system was proposed, which utilizes a single Y–Δ transformer to shunt between the two 30° phase-shifted generator outputs and results in the comparable harmonic elimination performance to the conventional 12-pulse rectifier. The shunt-type Y–Δ transformer front-end achieves more than 75% transformer size reduction, making it extremely attractive to large-scale industrial and shipboard applications. However, the exact 30° phase shift between the two rotating generators can drift in a practical system, especially under dynamic conditions. The harmonic performance under the non-ideal 30° phase-shift condition can deteriorate with the Y–Δ shunt-type front-end. To understand the impact of non-ideal phase-shifted generator sources, this paper derives the mathematical models through the use of an equivalent circuit, a square-wave analysis, and the phasor representation to show the harmonic cancellation principle and verifies the results with the computer simulation.

This paper presents a single-phase differential-type photovoltaic inverter named single inductor dual buck-boost inverter (SIDBBI) based on improved half-cycle PWM (HPWM). Conventional DBBI (CDBBI) is a good option for photovoltaic application due to step-up/down ability for varying inputs. However, inherent high inductor current and corresponding increments of inductor size and device ratings have made it less attractive than other topologies. This paper proposes an HPWM scheme with active clamping switches to reduce inductor voltage swing, highly induced current and component stresses by eliminating output voltages offsets. Under the proposed modulation, component voltage stresses in CDBBI can be reduced by zero offset, and there arises a chance to integrate half-utilized inductors, main switches and complementary diodes of two modules into one set, which is the proposed SIDBBI topology. 500 W prototypes of the conventional/proposed inverters have been built for verifications and comparison. Detailed analysis and experimental results under the proposed HPWM show that the size of SIDBBI can be reduced by 40.4% than CDBBI, maintaining comparable efficiency over 96% and wide input coverage by step-up/down ability. Comparative results address that SIDBBI is competitive in terms of component counts, stresses and losses, compared with various kinds of buck-boost inverter topologies.

This paper proposes a modified bridge switch-type flux-coupling nonsuperconducting fault current limiter (BSFC-NSFCL) for suppressing the fault current and voltage sag. A flux-coupling reactor and a bidirectional bridge switch are combined to perform the functions of steady-state line current sharing and fault current suppression. The modified BSFC-NSFCL mainly utilizes the magnetic flux cancellation effect to make the limiter behave as a short circuit on the circuit during normal operation. Hence, there is almost no impact on the power system when the limiter is used. When a fault event occurs, the bridge switch turns off immediately, and then, the magnetic flux cancellation effect disappears. Thus, the impedance of primary coil inserts into the circuit to restrict the fault current and voltage sag phenomena. Once the fault is removed, the bridge switch turns on again, and the BSFC-NSFCL recovers to the normal operation. The modified NSFCL is more cost-effective and easy to be implemented than the flux-coupling superconducting fault current limiter. Theoretical analysis for the BSFC-NSFCL has been fully developed and proven by MATLAB software. Finally, the analytical, simulated, and experimental results have been carried out to verify the feasibility and performance of the proposed BSFC-NSFCL.

This paper presents a dual-mode Cuk inverter for photovoltaic/thermoelectric power applications. A dual-mode Cuk inverter operates in both discontinuous conduction mode (DCM) and continuous conduction mode (CCM), and has the advantages of low ripples of voltage and current at the input and output, medium power density, and step-up/step-down ability, but is difficult to control because DCM and CCM have distinct system dynamics. To overcome this control problem, we propose to use a repetitive controller (RC) with a multiple phase-lead compensator for the dual-mode Cuk inverter. If the RC is applied by itself, the distinct system dynamics may severely degrade its system performance. Thus, in the proposed RC, we mainly use a multiple phase-lead compensator to compensate for the different phase lags of the dual-mode Cuk inverter. To reduce the burden from the RC, we use the dual-mode nominal duty ratio as feedforward control input. We also analyze the boundary of operation modes in the dual-mode Cuk inverter, then provide detailed and practical guidelines to design the control parameters. Experimental results obtained on a 500-W digitally controlled module integrated converter prototype confirmed the effectiveness of the control approach.

A trend for low-power conversion system is to integrate every component to a single chip. Magnetic component has been the key to determine the power density of the integrated switching power converter. In this paper, a hybrid resonant buck-type converter with an ultracompact custom-designed coupled inductor is presented for low-power integrated on-chip applications. This converter achieves zero-voltage switching for the high-side switch and near zero-voltage zero-current switching for low-side and auxiliary switches. The soft-switching condition allows the circuit operating at high switching frequencies. An ultracompact planar coupled inductor with a dimension of 5.25 mm × 1.95 mm × 3.86 mm is designed and customized for future integrated on-chip applications. The high-power density of this magnetics component is achieved by high switching frequency and optimized printed circuit board (PCB) windings design. A hardware prototype with 24 to 60-V input and 3.3 to 5-V, 3-A output operating at 2–3 MHz is presented to verify the circuit operation. The prototype achieves a peak efficiency of 90.7% using silicon devices at 2-MHz switching frequency.

Current control loop response in voltage source inverters impacts the quality of output current and output voltage waveforms. Parabolic current control provides a fast transient response with approximate-constant switching frequency, solving the frequency variation problem of hysteresis current control. This makes it a good candidate for the current control loop of voltage source inverters to achieve a good system performance. Yet, parabolic current control is often implemented with digital-to-analog converters, analog comparators, and field-programmable gate array circuits where increasing switching frequency pushes update speed and bandwidth requirements. Concurrently, even if the transient response of parabolic current control is fast, it can still take up several switching cycles converging to steady state. In order to solve both problems, a new current control strategy, motivated by the convergence analysis of parabolic current control but with a convergence process that takes just one switching operation, is proposed: single-step current control. Since single-step current control samples two data points in a switching cycle instead of using continuous parabolic carriers, it can be easily implemented in a digital microcontroller then high switching frequency can be achieved. The small signal model, dead-time compensation, and stability analysis are also studied in this paper. The convergence speed of the algorithm is verified with experimental hardware prototype and the transient performance of the designed voltage source inverter meets expectation.

This paper proposes an iterative learning control (ILC) scheme for a dual-mode flyback inverter operating in both discontinuous conduction mode (DCM) and continuous conduction mode (CCM). In dealing with more than 200-W power applications, the dual-mode flyback inverter takes advantage of both DCM and CCM operations. However, it is difficult to control the output current because the system gain is quite low in DCM and the system transfer function has a right-half plane zero in CCM. To overcome the problems occurring in DCM and CCM operations, we propose an ILC scheme with multiple phase-lead compensation. The ILC is proposed to achieve accurate reference tracking and to reject periodic disturbances. The multiple phase-lead compensation technique is then employed to compensate for the effect of different system dynamics. As a theoretical result, we derive the asymptotic stability of the closed-loop system. We also performed the numerical simulations and experimental tests to validate the proposed control approach.

In this study, the authors propose a feedback control method for energy storage systems for storing electrical energy and for load levelling. The proposed method uses both source and load power feedback, resulting in a fast response with respect to load levelling. To verify the proposed system, a power conditioning system based on the proposed feedback scheme was implemented and tested, in order to show the effectiveness of the scheme with respect to load levelling and energy harvesting. The system involved 60 of 50 W photovoltaic panels and a 20 Ah lithium polymer battery. An office was selected for testing, which was performed over an entire year. The authors obtained the operating profiles and determined the reduction in the daily total energy usage of the consumer as well as the standard deviation in load levelling.

A microconverter serves as a front-end dc–dc stage of a microinverter to convert the power from a photovoltaic module to a dc bus. These front-end microconverters require isolation, high-boost ratio, wide-input voltage regulation, and high efficiency. This paper introduces an isolated resonant converter with hybrid modes of operation to achieve wide-input regulation while still maintaining high efficiency. The proposed converter is designed as a series resonant converter with nominal-input voltage and operates under two additional modes: a boost converter with low-input voltage and a buck converter with high-input voltage. Unlike conventional resonant converters, this converter operates at discontinues conduction mode with a fixed frequency, simplifying the design and control. In addition, this converter can achieve zero-voltage switching (ZVS) and/or zero-current switching (ZCS) of the primary-side MOSFETs, ZVS and/or ZCS of the secondary-side MOSFETs, and ZCS of output diodes under all operating conditions. Experimental results using a 300-W prototype achieve a peak efficiency of 98.1% and a California Energy Commission efficiency of 97.6% including all auxiliary and control power at nominal-input voltage.

The magnetic component is considered one of the major factors that dominate the power density of power converters. In this paper, magnetic integration of inductors of a three-phase LCL filter on delta-yoke composite core is explored and investigated. Using the conventional rectangular core as the baseline design reference, the proposed delta-yoke core achieved a weight reduction of close to 10% without affecting the filter's performance. The inductances based on both shapes were calculated and verified through magnetic circuit analysis and three dimensional finite element analysis simulation. Hardware prototypes of the integrated inductor with both the conventional rectangular and the proposed delta-yoke cores were fabricated and tested with a three-phase inverter circuit to verify the design validity.

A control scheme for stand-alone inverters that utilizes an inductor current observer (ICO) is proposed. The proposed method measures disturbance load currents using a current sensor and it estimates the inductor current using the ICO. The filter parameter mismatch effect is analyzed to confirm the ICO’s controllability. The ICO and controllers are designed in a continuous-time domain and transferred to a discrete-time domain with a digital delay. Experimental results demonstrate the effectiveness of the ICO using a 5-kVA single-phase stand-alone inverter prototype. The experimental results demonstrate that the observed current matches the actual current and that the proposed method can archive a less than 2.4% total harmonic distortion (THD) sinusoidal output waveform under nonlinear load conditions.

A multiscale electrothermal simulation approach is presented to optimize the design of a hybrid switch soft-switching inverter using a library of dynamic electrothermal component models parameterized in terms of electrical, structural, and material properties. Individual device area, snubber capacitor, and gate drive timing are used to minimize the total loss of the soft-switching inverter module subject to the design constraints including total device area and minimum on-time consideration. The proposed multiscale electrothermal simulation approach allows for a large number of parametric studies involving multiple design variables to be considered, drastically reducing simulation time. The optimized design is then compared and contrasted with an already existing design from the Virginia Tech Freedom Car Project using the generation II module. It will be shown that the proposed approach improves the baseline design by 16% in loss and reduces the cooling requirements by 42%. Validation of the electrical and thermal device models against measured data is also provided.

A novel auxiliary resonant snubber is introduced. The design and operation are carried out, in which this snubber circuitry enables main Gallium Nitride (GaN) switches operating under zero voltage switching (ZVS) condition, and auxiliary Silicon Carbide (SiC) diodes switching under zero current switching (ZCS) condition. Besides, the auxiliary snubber circuitry gating algorithm is also optimized which allows reducing the switching and conduction loss in auxiliary GaN switches to obtain higher system efficiency and better thermal performance. This proposed inverter can be applied to wide range of potential applications, such as string solar inverter, renewable energy combined distributed generation, dc-ac part of bi-directional electrical vehicle (EV) on-board charger, and uninterruptible power supply (UPS), etc.

High power density is the primary design consideration for power converters in more electric aircraft (MEA) to meet both space and weight requirements. Therefore, wide bandgap (WBG) semiconductor switching devices, such as SiC, have been chosen to push the switching frequency of the power converter further for size and weight reduction. To meet power quality and conducted emission requirements, a LCL filter is necessary between the converter output and the power grid. With the power switching devices operating at higher frequency, the parasitic effects of various key circuits of the converter cannot be ignored and must be accounted for in the simulation model. This paper describes a complete equivalent circuit model that includes these effects of DC bus-bar, power semiconductor device, gate driver and LCL filter. With the comprehensive model, common-mode (CM) conducted emissions can be predicted and evaluated during the design phase for performance optimization purpose. National Research Foundation (NRF) Accepted version This research work was conducted in the Rolls-Royce@NTU Corporate Lab with funding support from the National Research Foundation (NRF), Rolls-Royce and Nanyang Technological University, under the Corp Lab@University Scheme.