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The article reports on the introduction of the Open Artwork System Interchange Standard (OASIS).MASK standard to deal the requirements particular to photomask layout representation. OASIS.MASK introduces constraints that reflect mask manufacturing's real-world limitations. The OASIS.MASK file is the layout description based on the topology, while a design database is a description based on the functions applied in a chip.

An empirical study of the economics of manufacturing photomasks concludes that the uncontrolled growth of optical proximity effect correction and resolution enhancement techniques is driving up the cost of pattern generation and mask inspection to levels that threaten the profitability of photomask manufacturing. The intrinsic cost of some leading edge photomasks has already exceeded the price that customers are willing to pay for them. A model of the lifecycle of photomask manufacturing, developed from interviews involving the 1990-to-2005 operations of six mask shops and a survey of seven photomask manufacturers, shows that design for manufacturability (DFM) constitutes the most promising approach for alleviating this market impasse. Unilateral action by mask shops to increase their capital productivity is necessary but insufficient and perhaps unaffordable. DFM solutions will require the majority of participants in the lithography value chain to collaborate according to a volatile demand schedule that is driven by semiconductor manufacturers. [ABSTRACT FROM AUTHOR]

The article offers information related to the technologies industry. It states that SEMATECH Inc. developed a new three dimensional (3D) Enablement program which targets standards in inspection, metrology, and die handling. It mentions that Carl Zeiss SMS GmbH is partnering with Synopsys Inc. to establish an in-die registration metrology to be used for photomask manufacturing. It adds that Fujitsu Semiconductor Ltd. will shift its flip chip mounting technology into a group affiliate in China.

The article focuses on the establishment of photomask manufacturing process of Toppan Printing Co. Ltd. at its photomask facility in Asaka, Japan. The main goal of photomask manufacturing process is to support 32nanometer and 28nanometer semiconductor device production through its development project with International Business Machine Corp. Franklin Kalk, Toppan Photomasks chief technical officer (CTO) expects the technology will improve the production efficiency until 16nanometer logic node.