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Since the discovery of laser-induced graphene (LIG), significant advances have been made to obtain green LIG (gLIG) from abundant, eco-friendly, natural, and organic renewable bio-based carbon sources. Recently, some sustainable and cost-effective electronic devices have been designed with gLIG, resulting in diverse solutions to the environmental impact caused by electronic waste (e-waste). However, there are still several challenges that must be addressed regarding the widespread market implementation of gLIG-based products, from synthesis to practical applications. In this review, we focus on sustainable precursor sources, their conversion mechanisms, physical and chemical properties and applications, along with the challenges related to its implementation, showing the future opportunities and perspectives related to this promising new material. Various systems based on gLIG for energy storage, electrocatalysis, water treatment, and sensors have been reported in the literature. Additionally, gLIG has been proposed for ink formulation or incorporation into polymer matrices, to further expand its use to non-carbon-based substrates or applications for which pristine LIG cannot be directly used. In this way, it is possible to apply gLIG on diverse substrates, aiming at emerging wearable and edible electronics. Thus, this review will bring an overview of gLIG developments, in accordance with the European Green Deal, the United Nations Sustainable Development Goals and the new era of internet-of-things, which demands cost-effective electronic components based on the principles of energy efficiency and sustainable production methods. [ABSTRACT FROM AUTHOR]

High entropy alloy (HEA) films of CrFeCoNiCu were deposited by sputtering. Their structure was characterized and their electric transport properties were studied by temperature-dependent Hall and Seebeck measurements. The HEA films show a solid solution with an fcc structure. The residual electrical resistivity of the films is around 130 μΩ cm, which is higher than the Mott limit for a metal while the temperature dependence of the resistivity above 30 K is metal-like but with a small temperature coefficient of resistivity (2 ppm/K). The dominant scattering mechanism of charge carriers is alloy scattering due to chemical disorder in the HEA. The Hall coefficient is positive while the Seebeck coefficient is negative. This is interpreted as arising from an electronic structure where the Fermi level passes through band states having both holes and electrons as indicated by band structure calculations. Below 30 K, the conduction is discussed in terms of weak localization and Kondo effects. The HEA structure appears stable for annealing in vacuum, while annealing in an oxygen-containing atmosphere causes the surface to oxidize and grow a Cr-rich oxide on the surface. This is then accompanied by demixing of the HEA solid solution and a decrease in the effective resistance of the film. [ABSTRACT FROM AUTHOR]

Neuromorphic computation based on resistive switching devices represents a relevant hardware alternative for artificial deep neural networks. For the highest accuracies on pattern recognition tasks, an analog, linear, and symmetric synaptic weight is essential. Moreover, the resistive switching devices should be integrated with the supporting electronics, such as thin-film transistors (TFTs), to solve crosstalk issues on the crossbar arrays. Here, an a-Indium-gallium-zinc-oxide (IGZO) memristor is proposed, with Mo and Ti/Mo as bottom and top contacts, with forming-free analog switching ability for an upcoming integration on crossbar arrays with a-IGZO TFTs for neuromorphic hardware systems. The development of a TFT compatible fabrication process is accomplished, which results in an a-IGZO memristor with a high stability and low cycle-to-cycle variability. The synaptic behavior through potentiation and depression tests using an identical spiking scheme is presented, and the modulation of the plasticity characteristics by applying non-identical spiking schemes is also demonstrated. The pattern recognition accuracy, using MNIST handwritten digits dataset, reveals a maximum of 91.82% accuracy, which is a promising result for crossbar implementation. The results displayed here reveal the potential of Mo/a-IGZO/Ti/Mo memristors for neuromorphic hardware. [ABSTRACT FROM AUTHOR]

High conductivity in the off-state and low field-effect mobility compared to bulk properties is widely observed in the p-type thin-film transistors of Cu2O, especially when processed at moderate temperature. This work presents results from in situ conductance measurements at thicknesses from sub-nm to around 250 nm with parallel X-ray photoelectron spectroscopy. An enhanced conductivity at low thickness is explained by the occurrence of Cu(II), which is segregated in the grain boundary and locally causes a conductivity similar to CuO, although the surface of the thick film has Cu2O stoichiometry. Since grains grow with an increasing film thickness, the effect of an apparent oxygen excess is most pronounced in vicinity to the substrate interface. Electrical properties of Cu2O grains are at least partially short-circuited by this effect. The study focuses on properties inherent to copper oxide, although interface effects cannot be ruled out. This non-destructive, bottom-up analysis reveals phenomena which are commonly not observable after device fabrication, but clearly dominate electrical properties of polycrystalline thin films. [ABSTRACT FROM AUTHOR]

A nonvacuum and low temperature process for passivating transparent metal oxides based thin-film transistors is presented. This process uses the epoxy-based SU-8 resist which prevents device degradation against environmental conditions, vacuum or sputtering surface damage. The incorporation of SU-8 as a passivation layer is based on the ability of this polymer to provide features with high mechanical and chemical stability. With this approach, lithography is performed to pattern the resist over the active area of the device in order to form the passivation layer. The resulting transistors demonstrate very good electrical characteristics, such as μFE=61 cm2/V s, VON=-3 V, ON/OFF=4.4×109, and S=0.28 V/dec. Electrical behavior due to the SU-8/metal oxide interface characteristics is also reported on the basis of Fourier transform infrared analysis. In contrast, we demonstrate how sputtering of SiO2 as a passivation layer results in severely degraded devices that cannot be switched-off. In order to obtain proper working devices, it is shown that SU-8 should be hard baked at 200 °C for 1 h in order to obtain a highly cross-linked polymer network. The stability of SU-8 passivated devices over the time of storage, under current bias stress and vacuum conditions is also demonstrated. [ABSTRACT FROM AUTHOR]

Direct evidence for the presence of a CuO structure in the grain boundaries of Cu2O thin films by chemical vapor deposition is provided by high resolution automated phase and orientation mapping (ASTAR), which was not detectable by classical transmission electron microscopy techniques. Conductive atomic force microscopy (CAFM) revealed that the CuO causes a local loss of current rectification at the Schottky barrier between the CAFM tip and Cu2O. The suppression of CuO formation at the Cu2O grain boundaries is identified as the key strategy for future device optimization. [ABSTRACT FROM AUTHOR]

The energy band alignments at interfaces often determine the electrical functionality of a device. Along with the size reduction into the nanoscale, functional coatings become thinner than a nanometer. With the traditional analysis of the energy band alignment by in situ photoelectron spectroscopy, a critical film thickness is needed to determine the valence band offset. By making use of the Auger parameter, it becomes possible to determine the energy band alignment to coatings, which are only a few Ångström thin. This is demonstrated with experimental data of Cu2O on different kinds of substrate materials. [ABSTRACT FROM AUTHOR]

Solution-processed metal-oxide thin films with high dielectric constants (k) have been extensively studied for low-cost and high-performance thin-film transistors (TFTs). In this report, MgO dielectric films were fabricated using the spin-coating method. The MgO dielectric films annealed at various temperatures (300, 400, 500, and 600 °C) were characterized by using thermogravimetric analysis, optical spectroscopy, X-ray diffraction, X-ray photoelectron spectroscopy, and atomicforce microscopy. The electrical measurements indicate that the insulating properties of MgO thin films are improved with an increase in annealing temperature. In order to clarify the potential application of MgO thin films as gate dielectrics in TFTs, solution-derived In2O3 channel layers were separately fabricated on various MgO dielectric layers. The optimized In2O3/MgO TFT exhibited an electron mobility of 5.48 cm2/V s, an on/off current ratio of 107, and a subthreshold swing of 0.33 V/dec at a low operation voltage of 6V. This work represents a great step toward the development of portable and low-power consumption electronics. [ABSTRACT FROM AUTHOR]

Oxide semiconductor thin-film transistors can show anomalous behavior under bias stress. Two types of anomalies are discussed in this paper. The first is the shift in threshold voltage (VTH) in a direction opposite to the applied bias stress, and highly dependent on gate dielectric material. We attribute this to charge trapping/detrapping and charge migration within the gate dielectric. We emphasize the fundamental difference between trapping/detrapping events occurring at the semiconductor/dielectric interface and those occurring at gate/dielectric interface, and show that charge migration is essential to explain the first anomaly. We model charge migration in terms of the non-instantaneous polarization density. The second type of anomaly is negative VTH shift under high positive bias stress, with logarithmic evolution in time. This can be argued as electron-donating reactions involving H2O molecules or derived species, with a reaction rate exponentially accelerated by positive gate bias and exponentially decreased by the number of reactions already occurred. [ABSTRACT FROM AUTHOR]

The impact of a parylene top-coating layer on the illumination and bias stress instabilities of indium-gallium-zinc oxide thin-film transistors (TFTs) is presented and discussed. The parylene coating substantially reduces the threshold voltage shift caused by continuous application of a gate bias and light exposure. The operational stability improves by 75%, and the light induced instability is reduced by 35%. The operational stability is quantified by fitting the threshold voltage shift with a stretched exponential model. Storage time as long as 7 months does not cause any measurable degradation on the electrical performance. It is proposed that parylene plays not only the role of an encapsulation layer but also of a defect passivation on the top semiconductor surface. It is also reported that depletion-mode TFTs are less sensitive to light induced instabilities. This is attributed to a defect neutralization process in the presence of free electrons. [ABSTRACT FROM AUTHOR]

Solution-processed p-type oxide semiconductors have recently attracted increasing interests for the applications in low-cost optoelectronic devices and low-power consumption complementary metaloxide-semiconductor circuits. In this work, p-type nickel oxide (NiOx) thin films were prepared using low-temperature solution process and integrated as the channel layer in thin-film transistors (TFTs). The electrical properties of NiOx TFTs, together with the characteristics of NiOx thin films, were systematically investigated as a function of annealing temperature. By introducing aqueous high-k aluminum oxide (Al2O3) gate dielectric, the electrical performance of NiOx TFT was improved significantly compared with those based on SiO2 dielectric. Particularly, the hole mobility was found to be 60 times enhancement, quantitatively from 0.07 to 4.4 cm²/V s, which is mainly beneficial from the high areal capacitance of the Al2O3 dielectric and high-quality NiOx/Al2O3 interface. This simple solution-based method for producing p-type oxide TFTs is promising for next-generation oxide-based electronic applications. [ABSTRACT FROM AUTHOR]

In this study, we report solution-processed amorphous zinc tin oxide transistors exhibiting high operational stability under positive gate bias stress, translated by a recoverable threshold voltage shift of about 20% of total applied stress voltage. Under vacuum condition, the threshold voltage shift saturates showing that the gate-bias stress is limited by trap exhaustion or balance between trap filling and emptying mechanism. In ambient atmosphere, the threshold voltage shift no longer saturates, stability is degraded and the recovering process is impeded. We suggest that the trapping time during the stress and detrapping time in recovering are affected by oxygen adsorption/desorption processes. The time constants extracted from stretched exponential fitting curves are ≈106 s and 105 s in vacuum and air, respectively. [ABSTRACT FROM AUTHOR]

Proposes a linear array thin film position sensitive detector based on hydrogenated amorphous silicon. Principle of operation; Device fabrication; Performance characteristics.

We demonstrate fully transparent, highly rectifying contacts (TRC) on amorphous GaInZnO and compare them to TRC fabricated on single crystalline bulk ZnO and heteroepitaxial ZnO thin films. The contacts' transparency in the visible spectral range exceeds 70%. From numerical simulations, we conclude that thermionic emission is the dominating transport mechanism, however, for several samples with low net doping density diffusion theory must be applied. The detailed investigation of the rectification properties of the TRC using temperature-dependent current-voltage and capacitance-voltage measurements reveals that barrier inhomogeneities govern the IV-characteristics of all diodes irrespective of the sample crystallinity. Assuming a Gaussian barrier height distribution, the extracted mean barrier heights typically range between 1.1 and 1.3 V. The width of the barrier distribution correlates with the mean barrier height and ranges from 110 to 130 mV. By compiling literature data, we found that this correlation holds also true for Schottky diodes on elemental and III-V semiconductors. [ABSTRACT FROM AUTHOR]

The effects of zinc concentration on the performance of solution processed amorphous indium gallium zinc oxide (a-IGZO) thin film transistors (TFTs) have been investigated using high-k aluminum titanium oxide as gate dielectric. The x-ray diffraction results confirmed that all the IGZO channel layers are amorphous. The performance of a-IGZO TFTs were investigated in the linear regime operation. Highest linear field-effect mobility of 5.8 cm2/V s with an Ion/Ioff ratio of 6×107 and subthreshold swing of 0.28 V/dec were obtained for the a-IGZO (311) TFTs. The obtained performance of the a-IGZO TFTs is very promising for low-voltage display applications. [ABSTRACT FROM AUTHOR]

P-type thin-film transistors (TFTs) using room temperature sputtered SnOx (x<2) as a transparent oxide semiconductor have been produced. The SnOx films show p-type conduction presenting a polycrystalline structure composed with a mixture of tetragonal β-Sn and α-SnOx phases, after annealing at 200 °C. These films exhibit a hole carrier concentration in the range of ≈1016–1018 cm-3; electrical resistivity between 101–102 Ω cm; Hall mobility around 4.8 cm2/V s; optical band gap of 2.8 eV; and average transmittance ≈85% (400 to 2000 nm). The bottom gate p-type SnOx TFTs present a field-effect mobility above 1 cm2/V s and an ON/OFF modulation ratio of 103. [ABSTRACT FROM AUTHOR]

Copper oxide (Cu2O) thin films were used to produce bottom gate p-type transparent thin-film transistors (TFTs). Cu2O was deposited by reactive rf magnetron sputtering at room temperature and the films exhibit a polycrystalline structure with a strongest orientation along (111) plane. The TFTs exhibit improved electrical performance such as a field-effect mobility of 3.9 cm2/V s and an on/off ratio of 2×102. [ABSTRACT FROM AUTHOR]

We report the architecture and the performances of a memory based on a single field-effect transistor built on paper able to write-erase and read. The device is composed of natural multilayer cellulose fibers that simultaneously act as structural support and gate dielectric; active and passive multicomponent amorphous oxides that work as the channel and gate electrode layers, respectively, complemented by the use of patterned metal layers as source/drain electrodes. The devices exhibit a large counterclockwise hysteresis associated with the memory effect, with a turn-on voltage shift between 1 and -14.5 V, on/off ratio and saturation mobilities of about 104 and 40 cm2 V-1 s-1, respectively, and estimated charge retention times above 14 000 h. [ABSTRACT FROM AUTHOR]

High mobility bottom gate thin film transistors (TFTs) with an amorphous gallium tin zinc oxide (a-GSZO) channel layer have been produced by rf magnetron cosputtering using a gallium zinc oxide (GZO) and tin (Sn) targets. The effect of postannealing temperatures (200, 250, and 300 °C) was evaluated and compared with two series of TFTs produced at room temperature (S1) and 150 °C (S2) during the channel deposition. From the results, it was observed that the effect of postannealing is crucial for both series of TFTs either for stability as well as for improving the electrical characteristics. The a-GSZO TFTs (W/L=50/50 μm) operate in the enhancement mode (n-type), present a high saturation mobility of 24.6 cm2/V s, a subthreshold gate swing voltage of 0.38 V/decade, a turn-on voltage of -0.5 V, a threshold voltage of 4.6 V, and an Ion/Ioff ratio of 8×107, satisfying all the requirements to be used as active-matrix backplane. [ABSTRACT FROM AUTHOR]

Amorphous/nanocrystalline silicon pi′ii′n devices fabricated on micromachined glass substrates are integrated with oligonucleotide-derivatized gold nanoparticles for a colorimetric detection method. The method enables the specific detection and quantification of unamplified nucleic acid sequences (DNA and RNA) without the need to functionalize the glass surface, allowing for resolution of single nucleotide differences between DNA and RNA sequences—single nucleotide polymorphism and mutation detection. The detector’s substrate is glass and the sample is directly applied on the back side of the biosensor, ensuring a direct optical coupling of the assays with a concomitant maximum photon capture and the possibility to reuse the sensor. [ABSTRACT FROM AUTHOR]

We report high-perfomance ZnO thin-film transistor (ZnO-TFT) fabricated by rf magnetron sputtering at room temperature with a bottom gate configuration. The ZnO-TFT operates in the enhancement mode with a threshold voltage of 19 V, a saturation mobility of 27 cm2/V s, a gate voltage swing of 1.39 V/decade and an on/off ratio of 3 × 105. The ZnO-TFT presents an average optical transmission (including the glass substrate) of 80% in the visible part of the spectrum. The combination o f transparency, high mobility, and room-temperature processing makes the ZnO-TFT a very promising low-cost optoelectronic device for the next generation of invisible and flexible electronics. [ABSTRACT FROM AUTHOR]

The application of hydrogenated amorphous silicon (a-Si:H) to optoelectronic devices are now well established as a viable low cost technology and is presently receiving much interest. Taking advantage of the properties of a-Si:H based devices, single and dual axis large area (up to 80×80 mm²) thin film position sensitive detectors (TFPSD) based on a-Si:H p-i-n diodes have been developed, produced by plasma enhanced chemical vapor deposition. In this study, the main optoelectronic properties presented by the TFPSD as well as their behavior under operation conditions, concerning its linearity and signal to noise ratio, are reported. [ABSTRACT FROM AUTHOR]