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Photoreflectance (PR) of surface-intrinsic-n+ (s-i-n+) type doped GaAs has been simulated by electroreflectance (ER). The simulated spectra of the s-i-n+ sample have exhibited many Franz–Keldysh oscillations, which enable the electric field (F) to be determined. It is known that F’s determined from PR are subjected to photovoltaic effect and the measured F is close to Fbi−δF/2 when the modulating field, δF≪Fbi, where Fbi is the built-in field of the sample and δF is the modulating field. In this work, we have investigated the relation between the measured F and δF not only for the region where δF≪Fbi holds, but also for a whole range of δF. In order to determine the magnitude of δF, we have used ER to simulate PR, that is, the measurements of ER under a forward bias, which is set to be equal to δF/2.

High-dielectric-constant Ta2O5 has been grown on the n-GaN epifilm by rf magnetron sputtering. Photoluminescence measurement has been performed to compare the luminescence intensity with and without the dielectrics. Threefold increase in intensity is obtained, and a surface recombination velocity is estimated to be 3×104 cm/s as an upper limit using a modified dead-layer model. A metal-oxide-semiconductor structure has been fabricated with Al on n-GaN as the ohmic contact and on Ta2O5 as the gate metal. Capacitance-versus-voltage characteristics have been measured. The doping concentration obtained from the depletion regime is compared with the result of Hall measurement, which is 7.0×1016 cm−3. The flat-band voltage is obtained from the high-frequency data, and the effective oxide charge number density is calculated as 4.1×1012 cm−2. Indication of strong inversion appears at low reverse bias due to the high dielectric constant of Ta2O5, and matches closely with calculated values. Hysteresis is observed a...

Photoreflectance spectroscopy of surface-intrinsic n+-doped (s-i-n+) GaAs has been measured at various power densities (Ppu) of a pump beam. Many Franz–Keldysh oscillations (FKOs) were observed above the band-gap energy, which will enable the electric-field strength (F) to be determined from the periods of the FKOs. Field F thus obtained is subject to photovoltaic effects. In order to reduce the photovoltaic effects from the pump beam, Ppu was kept below 10 μW/cm2 in the previous experiments. Here, we demonstrate that the built-in field can be determined at a larger Ppu by using fast Fourier transform techniques.

The electroreflectance (ER) spectra of an undoped n+-type doped GaAs have been measured over a range of temperature from 25 to 400 K. Many Franz–Keldysh oscillations were observed above the band-gap energy, which enabled the electric field strength and, hence, also the Fermi level to be determined. The photovoltaic effect is shown to be negligible, even at the low temperature. The experiment shows that the Fermi level decreases with increasing temperature and has almost the same temperature dependence as the energy gap. It is pinned at about 0.63 of energy gap below the conduction band.

This paper investigates abnormal dimension-dependent thermal instability in amorphous indium-gallium-zinc-oxide (a-IGZO) thin-film transistors. Device dimension should theoretically have no effects on threshold voltage, except for in short channel devices. Unlike short channel drain-induced source barrier lowering effect, threshold voltage increases with increasing drain voltage. Furthermore, for devices with either a relatively large channel width or a short channel length, the output drain current decreases instead of saturating with an increase in drain voltage. Moreover, the wider the channel and the shorter the channel length, the larger the threshold voltage and output on-state current degradation that is observed. Because of the surrounding oxide and other thermal insulating material and the low thermal conductivity of the IGZO layer, the self-heating effect will be pronounced in wider/shorter channel length devices and those with a larger operating drain bias. To further clarify the physical mechanism, fast ID-VG and modulated peak/base pulse time ID-VD measurements are utilized to demonstrate the self-heating induced anomalous dimension-dependent threshold voltage variation and on-state current degradation.

In this study, indium-gallium-zinc-oxide thin film transistors can be operated either as transistors or resistance random access memory devices. Before the forming process, current-voltage curve transfer characteristics are observed, and resistance switching characteristics are measured after a forming process. These resistance switching characteristics exhibit two behaviors, and are dominated by different mechanisms. The mode 1 resistance switching behavior is due to oxygen vacancies, while mode 2 is dominated by the formation of an oxygen-rich layer. Furthermore, an easy approach is proposed to reduce power consumption when using these resistance random access memory devices with the amorphous indium-gallium-zinc-oxide thin film transistor.

This Letter investigates abnormal channel width-dependent threshold voltage variation in amorphous indium-gallium-zinc-oxide (a-IGZO) thin-film transistors. Unlike drain-induced source barrier lowering effect, threshold voltage increases with increasing drain voltage. Furthermore, the wider the channel, the larger the threshold voltage observed. Because of the surrounding oxide and other thermal insulating material and the low thermal conductivity of the IGZO layer, the self-heating effect will be pronounced in wider channel devices and those with a larger operating drain bias. To further clarify the physical mechanism, fast IV measurement is utilized to demonstrate the self-heating induced anomalous channel width-dependent threshold voltage variation.

This letter investigates the degradation behavior under hot-carrier stress in InGaZnO thin film transistors with I- and U-shaped asymmetric electrodes. After hot-carrier stress, a serious Vt shift, as well as on-current and subthreshold swing degradations are observed in Id-Vg transfer curve under reverse mode. Moreover, it is found that the Vt instability is caused by hot-electron injection near the drain side, and this phenomenon which is verified by C-V measurement. Furthermore, the location of trapped hot-electron is estimated from the two-stage rise in the gate-to-drain/gate-to-source capacitance curves and then verified by the simulation tool.

In this study, the resistance switching characteristics of a resistive random access memory device with Pt/InOx/TiN structure is investigated. Unstable bipolar switching behavior is observed during the initial switching cycle, which then stabilizes after several switching cycles. Analyses indicate that the current conduction mechanism in the resistance state is dominated by Ohmic conduction. The decrease in electrical conductance can be attributed to the reduction of the cross-sectional area of the conduction path. Furthermore, the device exhibits low operation voltage and power consumption.

In this study, a Pt/BiFeO3/TiN device was fabricated and the resistance switching characteristics were investigated. After the first forming process, the conduction path was formed and exhibited unstable bipolar switching characteristics. Subsequently, the original conduction path was destroyed thoroughly by high negative bias. By reconstructing the conduction path after a second forming process (re-forming process), the device exhibits stable bipolar switching characteristics. Transmission electron microscopy analysis indicates that the stability of switching behavior was enhanced because of the joule heating effect, and is an easy way to improve the resistance switching characteristics.

This letter investigates the effect of temperature on hot-carrier stress-induced degradation behavior in InGaZnO thin film transistors. After hot-carrier stress at 25 °C, serious on-current and subthreshold swing degradations are observed due to trap state generation near the drain side. For identical stress performed at elevated temperatures, current degradation in the I-V transfer curve under reverse mode is gradually suppressed and the anomalous hump in the gate-to-drain capacitance-voltage curve becomes more severe. These suppressed degradations and the more severe hump can be both attributed to hole-trapping near the drain side due to high drain bias at high temperature.

This report compares Mo-doped and undoped SiO2 thin films of a similar thickness as well as MoOx. The Mo-doped SiO2 film exhibited switching behavior after the forming process, unlike the undoped SiO2 film. Through material analyses, a self-assembled layer is observed in the Mo-doped SiO2 film. Due to the formation of this layer, the thickness required to be broken down is effectively reduced. Subsequently, the occurrence of the switching behavior in the thinner SiO2 film further confirmed the supposition. A comparison of the two switching behaviors shows that SiO2 dominates the switching characteristic of the Mo-doped SiO2.

In-cell touch sensor that can be integrated with display pixel circuit using dual gate InGaZnO thin-film transistor is proposed. Under bottom gate operation, device characteristics are not sensitive to light illumination. On the contrary, light can lead to evident subthreshold leakage when operated with top gate. This behavior allows touch sensor to be realized by sensing the ambient light using top gate operation, without affecting normal bottom gate operated devices in display pixel. Further, the proposed operation method of touch sensor needs no additional fabrication and cost, and even black matrix is not required either.

This paper investigates the channel hot carrier stress (CHCS) effects on gate-induced drain leakage (GIDL) current in high-k/metal-gate n-type metal-oxide-semiconductor field effect transistors. It was found that the behavior of GIDL current during CHCS is dependent upon the interfacial layer (IL) oxide thickness of high-k/metal-gate stacks. For a thinner IL, the GIDL current gradually decreases during CHCS, a result contrary to that found in a device with thicker IL. Based on the variation of GIDL current at different stress conditions, the trap-assisted band-to-band hole injection model is proposed to explain the different behavior of GIDL current for different IL thicknesses.

This letter investigates the impact of static and dynamic stress on threshold voltage (Vth) instability in ultrathin n-channel metal-oxide-semiconductor field-effect transistors with hafnium-based gate stacks. Experimental results indicate Vth shift under dynamic stress is more serious than that under static stress due to charge trapping within the high-k dielectric. Capacitance-voltage techniques demonstrated that electron trapping under dynamic stress was located in the high-k dielectric near the source/drain overlap region rather than throughout the overall dielectric layer. This implies in real circuit operation, the phenomenon of electrons trapped in high-k near the source/drain overlap is the main issue affecting Vth instability.

The NiSi2/SiNx compound nanocrystals (CNCs) were fabricated to integrate the compound tunnel barrier into nanocrystal memory, with the inclusion of nitride traps. The analysis of high resolution transmission electron microscopy and x-ray photoelectron spectroscopy reveal that the nanocrystal is mainly composed of NiSi2 and silicon nitride with small size of 4–5 nm and high density of ∼1×1012 cm−2. The charge storage characteristics of the memory capacitor based on NiSi2/SiNx CNCs were investigated by capacitance-voltage measurement and the enhanced retention characteristics, which remain 71.7% (∼1.9 V) in 104 s, are clarified to be due to the compound tunnel barrier and traps in nitride.