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At low to moderate Reynolds numbers, cast pin fin coldwalls provide the best performance and lowest unit cost for air-cooled electronics systems. Until recently, insufficient data existed to design coldwalls with moderate length pin fins for electronics systems. Empirical correlations for the Fanning friction factor, f = f (S/d, T/d, L/d, R[e.sub.d]), and the Colburn j-factor, j =j (S/d, T/d, L/d, R[e.sub.d]) were previously developed for two flow regimes with a transition Reynolds number, R[e.sub.trn], separating the two regimes. Using these correlations, the effect of configuration on the design is discussed and a design procedure is proposed. Example problems are presented for (1) a system cooled by an environmental control system, and (2) a system cooled by ambient air using a fan. [DOI: 10.1115/1.1648063]

A novel, self-adaptive, nested grid method for solving transient thermal problems in the modeling and fabrication of integrated circuits was described. The method exhibited a faster modeling capability in comparison to conventional thermal modeling techniques. Computational time is reduced due to its adaptability to any space and time conditions so long as the physical geometry, boundary conditions and accuracy criteria are met.

A new method of calculating the pressure field in the simulation of two-dimensional, unsteady, incompressible, free surface fluid flow by use of a marker and cell method is presented. A critical feature of the new method is the introduction of a finer mesh of cells in addition to the regular mesh of finite volume cells. The smaller (micro) cells are used only near the free surface, while the regular (macro) cells are used throughout the computational domain. The movement of the free surface is accomplished by the use of massless surface markers, while the discrete representation of the free surface for the purpose of the application of pressure boundary conditions is accomplished by the use of micro cells. In order to exploit the advantages offered by micro cells, a new general equation governing the pressure field is derived. Micro cells also enable the identification and treatment of multiple points on the free surface in a single surface macro cell as well as of points on the free surface that are located in a macro cell that has no empty neighbors. Both of these situations are likely to occur repeatedly in a free surface fluid flow simulation, but neither situation has been explicitly taken into account in previous marker and cell methods. Numerical simulation results obtained both with and without the use of micro cells are compared with each other and with theoretical solutions to demonstrate the capabilities and validity of the new method.

Gallium nitride (GaN) high electron-mobility transistors (HEMTs) offer considerable high-power operation but suffer in reliability due to potentially damaging self-heating. In this study, self-heating in AlGaN/GaN HEMTs on high conductivity substrates is assessed using a high-resolution thermoreflectance (TR) imaging technique, to compare the thermal response between GaN-on-Si, GaN-on-Diamond, and GaN-on-4H-SiC. The TR method accuracy at high-power density is verified using a nonlinear coefficient of TR (CTR) as a function of temperature. The acquired steady-state thermal maps give a thermal resistance of 11.5~mm ⋅ K/W for GaN-on-Si (based on peak channel temperature), compared to 2.7 and 3.3~mm ⋅ K/W for GaN-on-SiC and GaN-on-diamond substrates, respectively. The tested GaN-on-diamond HEMT exhibits similar heating rates to those seen on a SiC substrate, with a slightly higher peak temperature, which indicates a higher thermal boundary resistance that could offset the benefits of using a higher conductivity substrate and lead to faster thermally enhanced degradation. The analysis reveals the importance using high-resolution imaging to detect hotspots and areas of peak temperature that largely affect failure initiation and device reliability and which may not be otherwise observable. [ABSTRACT FROM AUTHOR]

The back-end components of integrated circuits (ICs) are susceptible to self-heating deteriorating effects due to the microscale interconnects carrying large current densities, and thus require innovative passive cooling strategies. This article investigates the cooling effect of the high conductivity metallization (MET) fill that is used in conjunction with the chemical mechanical planarization (CMP) process. Thermal simulation models are developed for a three-level back end of line (BEOL) stack and then validated experimentally using high-resolution thermal imaging. A coupled approach is used to optimize the numerical model and fully characterize the BEOL embedded passive cooling solution. Results indicate that stricter thermal constraints are present for devices higher in the BEOL stack and exhibit the highest cooling potential from the use of CMP fill in the underlying MET layers. As a thermal improvement strategy for such thermally critical interconnects, a CMP fill-based cooling solution is presented by modifying the fill pattern in order to maximize heat dissipation within the BEOL. The resulting heat spreader (HS) design achieved up to 30% reduction in temperature for 10- $\mu \text{m}$ -wide interconnects and can reach 43% for narrower interconnects. The gained cooling makes it possible to extend the activation limits of interconnects by 15% and 25%, respectively. The experimentally validated HS simulation model is used to conduct parametric analysis for a range of interconnect dimensions with an eye on standardizing the HS design within the BEOL stage of ICs. [ABSTRACT FROM AUTHOR]

This article presents an electric-based methodology for thermal characterization of semiconductor technologies. It is shown that for technologies such as gallium nitride (GaN) high electron mobility transistors, which exhibit several field induced electron trapping effects, the thermal characterization has to be performed under specific conditions. The electric field is limited to low levels to avoid activation of trap states. At the same time, the dissipated power needs to be high enough to change the operating temperature of the device. The method is demonstrated on a test structure implemented as a GaN resistor with large contact separation. It is used to evaluate the thermal properties of samples with different silicon carbide suppliers and buffer thickness. [ABSTRACT FROM AUTHOR]

The feasibility of parallel processing for the grade of alternating direction implicit methods on a tightly bound sheared memory parallel architecture was examined. Beam and Warming method was parallelized on a sequent symmetry S81 parallel computer. The near-theoretical speed-ups with implicit methods were impaired by the need for processor synchronization at several stages during time integration. The need for synchronization was removed by the judicious use of load balancing, phase splitting and processor routing. Thus, factored implicit methods were able to gain higher speed-ups.

Record DC power has been demonstrated in AlGaN/GaN high electron mobility transistors fabricated using a substrate replacement process in which a thick diamond substrate is grown by chemical vapor deposition following removal of the original Si substrate. Crucial to the process is a ~30 nm thick SiN interlayer that has been optimized for thermal resistance. The reductions obtained in self-heating have been quantified by transient thermoreflectance imaging and interpreted using 3D numerical simulation. With a DC power dissipation level of 56 W/mm, the measured average and maximum temperatures in the gate-drain access region were 176 °C and 205 °C, respectively. [ABSTRACT FROM AUTHOR]

Experimental and numerical examination of the effect of the use of a metallic absorption layer on the laser based measurements of the thermal conductivity of dielectric, semiconductor, and highly conductive material is presented. The conclusion states that transient thermoreflectance method performs optimally when the thickness of the metalization layer falls in the transition range between the identified thermally thin and thermally thick layers.

The solution component for surface heating is validated by comparison with experimental data for a gold sample using the classical thermoreflectance method. Experimental results of TTR tests conducted on gold validated the fractional solution for the case of laser radiation absorbed at the surface of the material.

Thermal challenges in next-generation electronic systems, as identified through panel presentations and ensuing discussions at the workshop, Thermal Challenges in Next Generation Electronic Systems, held in Santa Fe, NM, January 7-10, 2007, are summarized in this paper. Diverse topics are covered, including electrothermal and multiphysics codesign of electronics, new and nanostructured materials, high heat flux thermal management, site-specific thermal management, thermal design of next-generation data centers, thermal challenges for military, automotive, and harsh environment electronic systems, progress and challenges in software tools, and advances in measurement and characterization. Barriers to further progress in each area that require the attention of the research community are identified. [ABSTRACT FROM AUTHOR]

Since 1990, the Fluids Engineering Division of ASME has pursued activities concerning the detection, estimation and control of numerical uncertainly and/or error in computational fluid dynamics (CFD) studies. The first quality-control measures in this area were issued in 1986 (1986, "Editorial Policy Statement on Control of Numerical Accuracy," ASME J. Fluids Eng., 108, p. 2) and revised in 1993 (1993, "Journal of Fluids Engineering Editorial Policy Statement on the Control of Numerical Accuracy," ASME J. Fluids Eng., 115, pp. 339-340). Given the continued increase in CFD related publications, and the many significant advancements in computational techniques and computer technology, it has become necessary to revisit the issue and formulate a more detailed policy to further improve the quality of publications in this area. This brief note provides specific guidelines for prospective authors for calculation and reporting of discretization error estimates in CFD simulations where experimental data may or may not be available for comparison. The underlying perspective is that CFD-related studies will eventually aim to predict the outcome of a physical event for which experimental data is not available. It should be emphasized that the requirements outlined in this note do not preclude those already published in the previous two policy statements. It is also important to keep in mind that the procedure recommended in this note cannot possibly encompass all possible scenarios or applications. [ABSTRACT FROM AUTHOR]

This work presents the creation of a coupled analysis engine and experimental system capable of fully characterizing the thermal behavior of complex, 3-D, active, submicron, electronic devices. First, the surface temperature field of an activated device is non-invasively measured with submicron spatial resolution. Next, the thermal conductivity of each thin-film layer composing the device is measured and a numerical model is built using these values. The measured temperature distribution map is then used as input for an ultra-fast inverse computational solution to fully characterize the thermal behavior of the complex 3-D device. By bringing together measurement and computation, it becomes possible for the first time to non-invasively extract the 3-D thermal behavior of nanoscale embedded features that cannot otherwise be accessed. The power of the method was demonstrated by verifying that it can extract details of interest of a representative MOSFET device. [ABSTRACT FROM AUTHOR]

In August 2005, a team surveyed the effects of the December 2004 Indian Ocean tsunami on the southern coast of Oman. Runup and inundation were obtained at 41 sites, extending over a total of 750 km of shoreline. Measured runup ranged from 3.25 m in the vicinity of Salalah to a negligible value at one location on Masirah Island. In general, the largest values were found in the western part of the surveyed area. Significant incidents were documented in the port of Salalah, where a 285-m-long vessel broke its moorings and drifted inside and outside the port, and another ship struck the breakwater while attempting to enter the harbor. The general hazard to Oman from tsunamis may be greatest from the neighboring Makran subduction zone in western Pakistan. [ABSTRACT FROM AUTHOR]

This work presents a demonstration of the applicability and efficacy of an experimental system capable of noninvasively and nondestructively scanning the transient surface temperature of pulsed microelectronic devices with submicron spatial and sub-microsecond temporal resolutions. The article describes the features of the experimental setup, provides details of the calibration process used to map the changes in the measured surface reflectivity to absolute temperature values, and explains the data acquisition procedure used to measure the transient temperature over a given active region. This thermoreflectance thermometry system is shown to be particularly suited for directly measuring the surface temperature field of devices undergoing the fast transients that are typical of next generation microelectronic devices. To illustrate the experimental approach, both quasisteady and transient temperature measurement results are presented for standard MOSFET devices. [ABSTRACT FROM AUTHOR]

The article presents an approach for optimizing the transient thermo-reflectance measurement of thermal properties. As electronic devices become smaller, their thermal design becomes more critical, making the knowledge of thermal properties essential to the overall design process. Additionally, new device structures and materials with superior properties are being developed, but many of these may have unknown thermo-physical properties. Moreover, recent studies have revealed that the thermal properties of thin-film materials used in electronics are dependent on the deposition process.

The concurrent electro-thermal design of three-dimensional integrated circuits characterized by submicron geometric features requires thermal modeling that can comprehend geometric complexities, multiple materials, temperature-dependent material properties, and multiple spatial and temporal scales. The computational time required for a full-scale transient simulation with traditional discretization schemes far exceeds what is practical for concurrent design practices. A new computational paradigm for a transient, multiple-grid, solution technique has been developed, which adaptively handles the wide ranges of spatial and temporal scales associated with the thermal modeling of high-performance integrated circuits (ICs). As the grid is automatically refined over selected regions of the computational domain, the solution becomes invariant to further reductions in grid spacing and time step size. The use of this self-adaptive approach reduces the computational requirements for transient thermal modeling by over two orders of magnitude, making it possible for the first time to simultaneously perform both the electrical and thermal analysis and design of real ICs. [Copyright &y& Elsevier]

This work shows that the Fourier number (Fo) defines the shape and amplitude of the thermal response of a semi-infinite layer sample. The introduction of the responsivity, Rs, of the TTR method provides the ability to assess the performance of the thermal conductivity measurements. A simplified heat transfer analysis of a finite layer sample revealed that the properties ratio, (ρCpK)S/(ρCpK)L, and the layer thickness, h/δP, uniquely define both temperature response and measurement responsivity. If the material under test is the substrate, this work can help improve the measurement accuracy by selecting the appropriate thickness of the top layer. If the material is a layer on top of a known substrate, this work suggests that the accuracy of the TTR measurements can be fully maximized. [Copyright &y& Elsevier]

Focuses on a study which utilized a transient thermo-reflectance system to measure the thermal characteristics of thin-film silicon dioxide layers. Intrinsic thermal conductivity of silicon dioxide; Measurement of the intrinsic value; Thermal interface resistance of thermally grown and ion beam sputtered silicon dioxide.

Devices exploiting negative differential resistance (NDR) are of particular interest for analog computing applications, including oscillator‐based neural networks. These devices typically exploit the continuous S‐shaped current–voltage characteristic produced by materials with a strong temperature‐dependent electrical conductivity, but recent studies have also highlighted the existence of a second, discontinuous (snap‐back) characteristic that has the potential to provide additional functionality. The development of devices based on this characteristic is currently limited by uncertainty over the underlying physical mechanism, which remains the subject of active debate. In situ thermoreflectance imaging and a simple model are used to finally resolve this issue. Specifically, it is shown that the snap‐back response is a direct consequence of current localization and redistribution within the oxide film, and that material and device dependencies are consistent with model predictions. These results conclusively demonstrate that the snap‐back characteristic is a generic response of materials with a strong temperature‐dependent conductivity and therefore has the same physical origin as the S‐type characteristic. This is a significant outcome that resolves a long‐standing controversy and provides a solid foundation for engineering functional devices with specific NDR characteristics. [ABSTRACT FROM AUTHOR]

A foreword to "IEEE Transactions on Components and Packaging Technologies" is presented.

Shows the simulation of fluid flow problems where the free surface undergoes sever deformations. Snapshots selected from animations performed with the Eulerian-Lagrangian Marker and Micro cell method; Use of massless, Lagrangian surface markers to track the free surface.

Devices exploiting negative differential resistance (NDR) are of particular interest for analog computing applications, including oscillator‐based neural networks. These devices typically exploit the continuous S‐shaped current–voltage characteristic produced by materials with a strong temperature‐dependent electrical conductivity, but recent studies have also highlighted the existence of a second, discontinuous (snap‐back) characteristic that has the potential to provide additional functionality. The development of devices based on this characteristic is currently limited by uncertainty over the underlying physical mechanism, which remains the subject of active debate. In situ thermoreflectance imaging and a simple model are used to finally resolve this issue. Specifically, it is shown that the snap‐back response is a direct consequence of current localization and redistribution within the oxide film, and that material and device dependencies are consistent with model predictions. These results conclusively demonstrate that the snap‐back characteristic is a generic response of materials with a strong temperature‐dependent conductivity and therefore has the same physical origin as the S‐type characteristic. This is a significant outcome that resolves a long‐standing controversy and provides a solid foundation for engineering functional devices with specific NDR characteristics. [ABSTRACT FROM AUTHOR]