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This paper addresses the estimation and compensation of I/Q imbalance, one of the most prominent impairments found in wideband zero-intermediate frequency transceivers (TRxs). The I/Q imbalance encountered in this kind of TRx comprises not only frequency-selective gain and phase imbalance but also delay imbalance. Unless appropriate compensation is applied, the I/Q imbalance significantly degrades the performance of a communication system. This paper presents a novel compensation technique for transmitter I/Q imbalance based on built-in-self-calibration, a low cost and robust compensation technique that enables manufacturing as well as in-field calibration with low computational complexity. The method's performance is evaluated in a TRx with 64-quadratic-amplitude modulation and 2 GHz of bandwidth implemented with real hardware. The measurements show that the proposed technique achieves an image rejection ratio greater than 35 dB in the entire 2 GHz bandwidth and an error vector magnitude lower than 3%. [ABSTRACT FROM AUTHOR]

In this paper, a novel terminated coupled line structure (TCLS) is introduced, which is constructed by a coupled line section and four terminations loaded on it. Introducing different kinds of terminations, three types of bandpass filters (BPFs) based on TCLSs are proposed, theoretically analyzed, and fabricated, including two single-ended wideband BPFs with fractional bandwidths (FBWs) of 67% and 40% respectively, and a wideband differential BPF with 74% differential-mode FBW. These BPFs can achieve wide passband bandwidth, low in-band insertion loss, high passband selectivity, as well as deep stopband rejection performance simultaneously, benefited from the multiple transmission zeros and transmission poles obtained by the TCLSs. The practical design procedures of these BPFs are presented and explained. The agreement among theoretical predictions, EM-simulated, and measured results validates our proposed filter structures. Finally, the generalized multistage filter topology based on TCLSs is proposed to design high-order filters with better filtering performances. [ABSTRACT FROM PUBLISHER]

In this paper, we further develop the concept of a wideband Doherty power-amplifier topology with reconfigurable efficiency. This is done by presenting new theory that - in contrast to previous work - makes it possible to analyze how the performance of the amplifier depends on the input network properties and the choice of gate bias voltages. The utility of the presented theory is demonstrated by the design and characterization of a gallium-nitride monolithic-microwave integrated-circuit amplifier designed in close agreement with the theoretical findings. Continuous-wave (CW) measurements show that the fabricated amplifier provides more than 31% power-added efficiency (PAE) at 9-dB output power back-off over a 5.8-8.8-GHz frequency range, and that the efficiency can be reconfigured as predicted by the presented theory. Modulated measurements - employing digital pre-distortion (DPD) and a 20-MHz signal with 8.5-dB peak-to-average power ratio - show more than 32% average PAE across the same 5.8-8.8-GHz frequency range. Both the CW and the modulated measurements thereby verify the wideband performance predicted by the theory. In addition, modulated measurements at 7.0 GHz without DPD show that the amplifier can provide excellent raw linearity by demonstrating -41.0-dBc adjacent channel power ratio and -34.2-dB normalized mean square error. [ABSTRACT FROM AUTHOR]

In this paper, a new design concept of Schiffman phase shifters under the operation of the second phase period in frequency domain is presented and analyzed. By investigating phase properties of the C-section structure, we first find that its second phase period is another independent and distinctive working region for Schiffman phase shifter, in addition to its first phase period. In contrast to traditional counterparts working on the first phase period, which are suitable for small phase shift from 0° to 90°, the Schiffman phase shifters on the second phase period are suitable for the large phase shift from 90° to 180°. It is because of the opposite phase variation property that the electrical length of reference line gets shortened as the phase shift value increases. Compared with the first phase period, the second phase period can achieve wider phase shift bandwidth under the same coupling degree. This feature is believed to be very useful in the limited realizable coupling degree cases. In this context, the closed-form synthesis formulas of Schiffman phase shifter on the second phase period are presented. Meanwhile, detail theoretical analysis of the phase shift bandwidth and phase deviation is carried out. In final, two Schiffman phase shifters on the first and second phase periods are designed and fabricated to validate our proposed concept and approach in the experiment. [ABSTRACT FROM AUTHOR]

This paper reports an area-efficient and tunable bandwidth (BW)-extension technique for a wideband CMOS amplifier to handle very high rate (50+ Gb/s) signaling while keeping a low jitter penalty. We identify its architectural advantages by correlating the performances with the frequency domain (magnitude and group delay (GD) responses) and time domain (impulse and step responses) and comparing them with the existing solutions. Specifically, our technique enables a flexible ac characteristic by introducing a tunable grounded active inductor in the bridged-shunt peaking topology, offering: 1) a high BW enhancement ratio (BWER = $2.65\times$ ); 2) BW-power scalability with small in-band gain variation; and 3) fine tunability of the passband gain without affecting the BW, GD, and power. The experimental prototype is a 65-nm CMOS four-stage differential amplifier occupying just 0.0077 mm2. It delivers a 15-dB gain over a 43-GHz BW with 45-mW power consumption. Small in-band gain variation (0.58 dB) and ripple (1.53 dB) are concurrently achieved with low in-band GD variation (17 to 35.3 ps) and ripple (18.3 ps). The achieved figure of merit of 5.48 [(dc Gain $\times$ BW)/Power] compares favorably with the prior art. [ABSTRACT FROM AUTHOR]

A new biasing scheme is proposed for transistors used in power-amplifier applications. In the proposed biasing scheme, a constant current source is used as the power supply for the transistor’s output terminal. A whole new family of amplifier classes can be defined using this biasing scheme. Analytical equations are obtained and verified for current and voltage waveforms of a current-biased transistor for both resistive and tuned load impedances. Using the proposed current biasing scheme, the transistor presents completely different behaviors compared with the conventional voltage biasing scheme. These properties can be utilized for new design concepts and can provide new possibilities in the future designs and applications. Some of the differences between current-biased and voltage-biased amplifiers are discussed. One of the different behaviors shown by the current-biased transistor amplifiers is the reversed load modulation. Using this property of the current-biased amplifiers, a reversed modulation dual branch (RMDB) amplifier structure is proposed for ultra-wideband high efficiency at power back-off. Due to the reversed load modulation of current-biased transistors, a multibranch amplifier can be implemented to obtain high efficiency at power back-off without the need for an impedance inverter at the output of the current-biased amplifier. By using the proposed amplifier structure, a wideband RMDB amplifier was fabricated and tested exhibiting higher than 37% efficiency for long-term evolution (LTE) signals in 0.8–2.2-GHz bandwidth, which is equivalent to 93% fractional bandwidth. [ABSTRACT FROM PUBLISHER]

This paper demonstrates the feasibility of very compact and broadband square waveguide bends able to transmit both linear and circular polarizations. A careful control of the bend profile for dual-linear polarization or the use of a new septum-polarizer-like geometry for dual-circular polarization allows to reach full band operation ~34% in the first case and broadband operation ~20% for the second application. Experimental validations show excellent agreement with the theoretical predictions thus effectively extending the previous bandwidth limitations. [ABSTRACT FROM PUBLISHER]

Three novel wideband balanced-to-unbalanced filtering power dividers based on coupled lines are proposed in this paper. Multifunctional power dividers can replace various cascaded single devices to decrease integration mismatching loss and circuit size. The wideband response can be easily realized by the coupled lines structures. To further improve the differential-mode passband selectivity, open/shorted coupled lines and half-wavelength open stubs are applied to introduce two transmission zeros near the passband, respectively. In addition, a resistor in the middle of two single-ended ports can be used to realize isolation between out ports. To verify the proposed concepts, three prototypes of wideband balanced-to-unbalanced filtering power dividers operating at 2 GHz are designed and fabricated with the 4-dB differential-mode bandwidths of 80.5%, 71.5%, and 80%. All the structures show good performances for differential-mode out-of-band suppression, common-mode suppression, and isolation. [ABSTRACT FROM PUBLISHER]

This paper reports a new measurement method for wideband radiofrequency power amplifier (PA) characterization and digital predistortion. The proposed measurement procedure significantly relaxes the sampling rate requirement on the analog-to-digital converters of the feedback path. Successful PA linearizations were achieved in the presence of 20, 40, and 60-MHz LTE-A signals using a vector signal analyzer with sampling speeds equal to only 24, 40.96, and 61.44 Ms/s, respectively. Despite these very low sampling rates, a quasiperfect cancellation of the PA distortions was achieved (more than 50 dBc in terms of ACLR), in all tests, over bandwidths including up to fifth-order intermodulation distortions. Such a correction bandwidth is much wider than the observation bandwidths associated with the receiver sampling rates. [ABSTRACT FROM PUBLISHER]

This paper presents a highly symmetric 1\! :\! n concentric vortical transformer (CVT) technology, which can be implemented with slab inductors. The CVT and several widely used planar transformer structures are analyzed to show the characteristic distinction of the CVT. The proposed CVT was developed in an integrated passive device technology along with the popular distributed active transformer (DAT) for comparison. Under the same real-part impedance transformation ratio at 2.4 GHz, the outer diameter of the CVT is only 48% of the DAT. Moreover, 89.4% transformation efficiency and 191% - \1-dB fractional bandwidth are achieved by the CVT from a high coupling coefficient of 0.9. The symmetric nature of the CVT makes it capable of achieving far less variation than the DAT in resistance and reactance among multiple input ports when used for power combining. [ABSTRACT FROM PUBLISHER]

Two new wideband in-phase and out-of-phase balanced power dividing/combining networks are proposed in this paper. Based on matrix transformation, the differential-mode and common-mode equivalent circuits of the two wideband in-phase and out-of-phase networks can be easily deduced. A patterned ground-plane technique is used to realize the strong coupling of the shorted coupled lines for the differential mode. Two planar wideband in-phase and out-of-phase balanced networks with bandwidths of 55.3% and 64.4% (\vert S{ dd21,31}\vert<4\ {\ {dB}}) for the differential mode with wideband common-mode suppression are designed and fabricated. The theoretical and measured results agree well with each other and show good in-band performances. [ABSTRACT FROM PUBLISHER]

This paper presents a new class of dual-, tri- and quad-band BPF by using proposed open stub-loaded shorted stepped-impedance resonator (OSLSSIR). The OSLSSIR consists of a two-end-shorted three-section stepped-impedance resistor (SIR) with two identical open stubs loaded at its impedance junctions. Two 50-\Omega tapped lines are directly connected to two shorted sections of the SIR to serve as I/O ports. As the electrical lengths of two identical open stubs increase, many more transmission poles (TPs) and transmission zeros (TZs) can be shifted or excited within the interested frequency range. The TZs introduced by open stubs divide the TPs into multiple groups, which can be applied to design a multiple-band bandpass filter (BPF). In order to increase many more design freedoms for tuning filter performance, a high-impedance open stub and the narrow/broad side coupling are introduced as perturbations in all filters design, which can tune the even- and odd-mode TPs separately. In addition, two branches of I/O coupling and open stub-loaded shorted microstrip line are employed in tri- and quad-band BPF design. As examples, two dual-wideband BPFs, one tri-band BPF, and one quad-band BPF have been successfully developed. The fabricated four BPFs have merits of compact sizes, low insertion losses, and high band-to-band isolations. The measured results are in good agreement with the full-wave simulated results. [ABSTRACT FROM PUBLISHER]

This paper proposes a multistage transformer-feedback-based design approach for a high fractional-bandwidth (fBW) IF stage in a 60-GHz heterodyne receiver. An in-depth analysis of source-to-gate transformer-feedback amplifiers, including the design of the matching network, is presented. Analytic expressions for the input resistance, quality factor, and noise figure (NF) as a function of the transformer turns-ratio (n) and magnetic coupling factor (k) are derived. To validate the proposed analysis, a wideband IF amplifier and mixer were designed in a 40-nm CMOS process. From measured results, this device achieves a 16% -3-dB fBW, a peak power gain of 27.6 dB, an NF of 5.3 dB while consuming 28.8 mW from a 0.9-V supply. [ABSTRACT FROM AUTHOR]

The continuously increasing demand for wide bandwidth creates great difficulties in employing digital predistortion (DPD) for radio frequency (RF) power amplifiers (PAs) in future ultra-wideband systems because the existing DPD system requires multiple times the input signal bandwidth in the transmitter and receiver chain, which is sometimes almost impossible to implement in practice. In this paper, we present a novel band-limited digital predistortion technique in which a band-limiting function is inserted into the general Volterra operators in the DPD model to control the signal bandwidth under modeling, which logically transforms the general Volterra series-based model into a band-limited version. This new approach eliminates the system bandwidth constraints of the conventional DPD techniques, and it allows users to arbitrarily choose the bandwidth to be linearized in the PA output according to the system requirement without sacrificing performance, which makes the DPD system design much more flexible and feasible. In order to validate this idea, a high-power LDMOS Doherty PA excited by various wideband signals, including 100-MHz long-term evolution advanced signals, was tested. Experimental results showed that excellent linearization performance can be obtained by employing the proposed approach. Furthermore, this technique can be applied to other linear-in-parameter models. In future ultra-wideband systems, this new technique can significantly improve system performance and reduce DPD implementation cost. [ABSTRACT FROM AUTHOR]

A novel wideband receiver RF front-end, including a resistive negative feedback wideband low-noise amplifier (LNA) with feedforward noise and distortion cancellation and a current commutating down conversion passive mixer with biquad trans-impedance amplifier, is presented in this paper. In comparison to conventional resistive negative feedback LNAs, theory analysis and experimental results for the proposed LNA circuit shows improved performance parameters, including voltage gain, noise figure (NF), and input-referred third-order intercept point (IIP3), especially helpful for wideband LNA design in modern deep-submicrometer CMOS. A wideband receiver RF front-end fabricated in 0.13-\mu\m CMOS, based on the proposed feedforward noise and distortion-cancellation resistive-feedback LNA, has 42–48-dB conversion gain with 0.8–12-MHz tunable IF -3-dB bandwidth and 12-dB adjacent channel selectivity at 2fp, -14-dBm IIP3, and 3-dB NF double-sideband with 10-kHz flicker-noise corner frequency. [ABSTRACT FROM AUTHOR]

This paper presents a new design of wide slot antenna for various wideband applications. The proposed printed antenna consists of a slot and a turning stub, both formed by a binomial curve function; thus, various bandwidths (BWs) can be obtained based on the structure with different binomial curves. Some key parameters affecting the antenna performance have been analyzed and discussed in detail as an antenna design guideline. To validate the theoretical design, six prototypes of various binomial-curved slot antennas were designed, fabricated, and measured. Good agreement between the simulated results and the measured ones is observed. The results demonstrate that the proposed type of antenna can obtain a BW range from 9.8% to 99.7% for VSWR \leq 2 by selecting various binomial-curved slots, which may provide a convenience for various wideband antenna designs. Moreover, the proposed type of antenna owns a simple structure and a stable gain of about 3–5.5 dBi, which is very suitable for wideband wireless system applications. [ABSTRACT FROM AUTHOR]

Two novel wideband differential bandpass filters based on a T-shaped structure are proposed in this paper. Broad passband and wideband harmonic suppression for the differential/common mode can be easily achieved for the wideband differential filter without cross coupling, due to the controlled resonator frequencies of the shorted/open T-shaped structure. In addition, another more compact differential filter using cross coupling is proposed with two transmission zeros close to the passband to improve the selectivity for the differential mode. To verify the presented concept, two prototypes (\varepsilon r = 2.65, h = 0.5~\ mm) with 3-dB fractional bandwidth of 70% and 70.7% for the differential mode and insertion loss greater than 13.5 dB for common mode (0–19 GHz) are designed and fabricated. Good agreement can be observed between measured results and theoretical expectations. [ABSTRACT FROM AUTHOR]

This paper presents a wideband transformer-coupled CMOS power amplifier (PA). On-chip transmission-line transformers are used as key components of matching networks at output, input, and interstage. The wideband on-chip transformer is harnessed without any additional inductive devices so that a wideband power characteristic can be achieved. The PA is fabricated using a 0.18-\mu\ m CMOS process. It provides a saturated output power of 21.5 dBm with the power-added efficiency (PAE) of 20.3%, and the output 1-dB gain-compressed power (P1\ {dB}) is 20.2 dBm with the PAE of 14.8% at 9.5 GHz, respectively. The small-signal gain is 25.3 dB and the 3-dB bandwidth is 6.5 GHz (6.5–13 GHz). The die area is 1.34 mm \times 0.47 mm. Among the reported X/Ku-band CMOS PAs, this amplifier achieves the highest figure of merit, and also shows suitable performances for phased-array systems. [ABSTRACT FROM AUTHOR]

This paper presents a 20–32-GHz wideband BiCMOS mixer with an IF bandwidth of 12 GHz. The mixer utilizes an inductive peaking technique to extend the bandwidth of the downconverted IF signal. To our knowledge, the proposed mixer achieves the widest IF bandwidth using silicon-based technologies in K-band. Analytical expressions for the conversion gain and output noise of the proposed mixer are presented. The wideband mixer is implemented using 0.18-\mu\ m BiCMOS technology and occupies an area of 0.19 \ mm^2. It achieves a conversion gain of 3 dB, a noise figure between 10.5 and 13.0 dB, and an IIP3 higher than 0.5 dBm with a power consumption of 18 mW from a 1.8-V supply. [ABSTRACT FROM PUBLISHER]

This paper presents the design and implementation of a low power wideband mixer for multistandard receivers, covering global system for mobile communications, universal mobile telecommunications system, wireless local area network, Bluetooth, and ultra-wideband. The circuit topology is based on the folded technique with a current reuse shunt feedback RF input stage operating at a low supply voltage of 1 V. The mixer offers a peak gain of 12.8 dB, a 3-dB bandwidth from 1 to 10.5 GHz, and a minimum double-sideband noise figure of 7.6 dB. The input referred compression point is better than -15 dBm with an output referred intercept point of better than 5.75 dBm over the entire bandwidth. The mixer circuit was fabricated in a 65-nm standard CMOS process and draws 5 mA of dc current, leading to a power dissipation of only 5 mW. Gain and noise performance can be further increased when operating at nominal supply voltage of 1.2 V at the expense of an increasing power dissipation. [ABSTRACT FROM AUTHOR]

A wideband (30% relative bandwidth) correlation and detection module based on substrate-integrated waveguide (SIW) technology intended for a radio astronomy polarimeter is presented. The SIW circuit is a six-port network with two input ports that are correlated in two hybrid couplers and their corresponding output signals are routed to Schottky diode detectors, which are designed using microstrip technology and assembled within the same system. The designed SIW structure includes hybrid couplers, power dividers, a 90° phase shifter, and 90° bends, providing a real implementation of a functional system with improved bandwidth performance from 35 to 47 GHz. Experimental results are in concordance with simulations, and they validate the module operation for the proposed application. [ABSTRACT FROM AUTHOR]

A new planar filter design technique with constant and frequency mappings has been proposed for multifrequency wideband bandpass filters (BPFs). The constant mapping treats components in the $LC$ circuit (e.g., frequency invariant admittances, capacitors, and ideal inverters) as frequency dependent. It is consistent with practical planar circuits and caters to a wide frequency range. Following the classic single-to-multiband transformation, a new frequency mapping function is proposed by incorporating this constant mapping idea. With these two mapping functions, a direct relation between the $LC$ circuit and its microstrip counterpart is established. Therefore, the multifrequency wideband BPF is readily designed from a lowpassing $LC$ circuit to the transmission line circuit. A ladder-type Chebyshev filter and a trisection filter with the general Chebyshev response have been designed as examples. The first one is a dual-band case exhibiting a wide bandwidth for each passband. The second filter is a triple-band one showing a large frequency ratio between the first and third passband. Both examples experimentally validate the proposed constant and frequency mapping technique. [ABSTRACT FROM PUBLISHER]

A differential variable gain amplifier (VGA) for wideband baseband signals has been designed, analyzed, and implemented in a 0.25- \rm \mu m InP double heterojunction bipolar transistor technology with f_{T}/f_{\mathrm{ max}} of 370/650 GHz. The 3-dB frequency bandwidth is measured to be 40 GHz with a maximum gain of 31 dB, resulting in a gain bandwidth product (GBP) of 1.4 THz, four times higher than previously reported GBP from a Gilbert cell-based VGAs. Furthermore, it measures a gain control range of 44 dB, a noise figure of 6.2 dB, an output third-order intercept point of 17 dBm, and a total power consumption of 350 mW from a single −7-V supply. With pseudorandom binary sequence test pattern signals, a clear open eye at 44 Gb/s was observed. The complete circuit, including on-chip integrated bias network and pads, measures 0.77 \rm mm^{2}$ . We analyze the VGA for the 3-dB bandwidth and GBP by the use of zero-value time constants method to analytically identify the maximum GBP with respect to the design parameters and current bias. [ABSTRACT FROM AUTHOR]

Compact planar crossovers with a wide passband are proposed. By cascoding two quarter-wavelength branch-line couplers, a wide passband can be obtained. Moreover, the even-odd mode and the fourfold symmetry are adopted to derive the analytical equations. According to the derived formulas, the transmission lines' impedances Z1, Z2, and ZA, which may influence the performance of the operating fractional bandwidth (FBW), should be properly selected. In terms of experimental verification, the circuit size of the fabricated crossover is 0.23λg × 0.23λg. Moreover, the FBW of the developed crossover is the 59% 1-dB insertion-loss relative bandwidth corresponds to the S31 parameter, whereas the 55% 15-dB one refers to the S21 parameter. In addition, four bandstop filters can be added at four ports of the proposed crossover to achieve a wide stopband performance. [ABSTRACT FROM AUTHOR]

A fully integrated 60-GHz 5-Gb/s quadrature phase-shift keying (QPSK) transceiver with the transmit/receive (T/R) switch in 65-nm CMOS is presented. By utilizing the co-design of the T/R switch with the power amplifier (PA)/low-noise amplifier, π-type wideband passive network technique, as well as the modified distributed-amplifier-based PA, the RF bandwidth of the transmitter (TX)/receiver (RX) is extended to 5 GHz. An inductorless wideband programmable gain amplifier with negative capacitive neutralization, consisting of two modified Cherry-Hooper amplifier stages, provides 18-dB variable gain range with enough bandwidth. Due to the proposed bandwidth extension techniques, the measured double-side link bandwidth of the TX/RX is wider than 5 GHz so that 5-Gb/s QPSK communication could be supported. A direct QPSK modulator and mixed-signal QPSK demodulator are integrated to avoid the high-power high-complexity analog-digital converter/digital-analog converter and high-speed digital baseband processing. Together with the integrated T/R switch, the power consumption and the cost of the transceiver are significantly lowered while achieving up to 5-Gb/s data rate. The local oscillating signals and various clocks are provided by a fully differential phase-locked loop frequency synthesizer with -97.2-dBc/Hz phase noise at 1-MHz offset from a 40-GHz carrier. The measured error vector magnitude of the TX is -21.9 dB, while the bit error rate of the RX with a -52-dBm sine-wave input is below 8e-7 when transmitting/receiving 5-Gb/s data. The transceiver is powered by 1.0- and 1.2-V supply (except the phase-frequency detector and charge-pump in the frequency synthesizer, which are powered by a 2.5-V supply) and consumes 135 mW in the TX mode and 176 mW in the RX mode, with a chip area of 3 mm × 2 mm. [ABSTRACT FROM AUTHOR]

Two phase shifters are proposed using a multiple circular sector structure. Advantages of the design include low insertion losses and small phase variations over a wide range of operating bandwidths. The design process follows a multiobjective optimization procedure that applies computational power for circuit tuning. Performance of the phase shifters are analyzed, after fabricating and measuring for verification. The phase shifter performances are compared with other existing phase shifter configurations in terms of insertion losses and phase variations. [ABSTRACT FROM AUTHOR]

A fully integrated 1.175-2-GHz differentially tuned frequency synthesizer aimed for digital video broadcasting-terrestrial tuners is implemented in a 0.18-μm CMOS process. To maintain phase-noise optimization and loop stability over the entire output frequency range, techniques of constant loop bandwidth are proposed. The voltage-controlled oscillator gain KVCO and band step fres are both maintained by simultaneously adjusting the sizes of switched capacitors and varactors. Charge pump current ICP is programmed to compensate the variation of the division ratio N. The measured results show an in-band phase noise of -97.6 dBc/Hz at a 10-kHz offset and an integrated phase error of 0.63° from 100 Hz to 10 MHz. The measured variations of KVCO and fres are less than 12.5% and 4.5%, respectively. The variations of the measured phase noise at 10-kHz and 1-MHz frequency offsets are less than 1 dB. The measured 3-dB closed-loop bandwidth is 110 kHz and the variation is less than 9%. The chip draws 10-mA current from a 1.8-V supply while occupying a 2.2-mm2 die area. [ABSTRACT FROM AUTHOR]

An ultra-wideband vertical coaxial-to-single-ridge waveguide transition is designed to cover Ku-, K-, and Ka-bands simultaneously. The simulated and measured back-to-back transitions have achieved better than 15-dB return loss within 12.8–40 GHz. The transition can also be a direct transition to the ridge gap waveguide (RGW). In addition, a similar concept is used to design a wideband coaxial-to-double-ridge waveguide transition to feed symmetric and asymmetric double ridge waveguide on a bandwidth ratio of more than 4:1. These transitions will be used to feed broadband ridge and RGW power splitters. [ABSTRACT FROM AUTHOR]

A complete frequency response analysis of the Doherty amplifier is presented with the conventional output combining network consisting of two quarter-wavelength (\lambda /4) transmission lines at a center frequency f0. Expressions for output power and efficiency were derived over the whole dynamic range and at any frequency f. The analysis shows that the amount of efficiency enhancement, as well as the maximum output power, reduce as the deviation from f0 increases. For instance, the derived expressions show that a conventional Doherty amplifier has a drain efficiency of \eta \geq 52.7\\%, which represents at least 13.4% efficiency enhancement over a class B amplifier, and up to 33.3% fractional bandwidth. A modified output combining network, using \lambda /4 lines with reduced impedance transformation ratio, is also analyzed, which results in a bandwidth extension of the Doherty amplifier when compared to the conventional design. To verify the derived analyses, three unsymmetrical GaN Doherty power amplifiers (DPAs) were designed and characterized; the first DPA was based on the conventional output combining network, while the second DPA was based on the proposed network. Measurements showed that the first DPA had, at 5–6-dB back-off, a drain efficiency of \eta \geq 44\\% and over 28% fractional bandwidth (1.7–2.25 GHz), while the DPA with the proposed output combining network had a better wideband performance than the third reference conventional DPA, with a back-off drain efficiency of \eta \geq 41\\%, and over 42% fractional bandwidth (1.7–2.6 GHz). To the best of authors' knowledge, the designed DPAs have the highest bandwidths reported thus far. [ABSTRACT FROM AUTHOR]