3,653 results
Search Results
2. Automated Mini-Platform With 3-D Printed Paper Microstrips for Image Processing-Based Viscosity Measurement of Biological Samples
- Author
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Nikhil Munigela, Sai Akhil Puranam, Puneeth S B, and Sanket Goel
- Subjects
010302 applied physics ,Rapid prototyping ,Microchannel ,Fabrication ,Fused deposition modeling ,business.industry ,Computer science ,Microfluidics ,Image processing ,01 natural sciences ,Grayscale ,Electronic, Optical and Magnetic Materials ,law.invention ,law ,Viscosity (programming) ,0103 physical sciences ,Electrical and Electronic Engineering ,business ,Computer hardware - Abstract
Several miniaturized viscometers, or microviscometers, have been developed exploiting numerous rapid prototyping techniques. Among them, paper microstrips, famously known as microfluidic paper-based analytical devices ( $\mu $ PADs), have become popular due to their cost-efficacy, simple fabrication, fast response, and easily disposable. Many fabrication methods are existing to develop paper microstrips. Herein, an alternative fabrication method is proposed where fused deposition modeling (FDM)-based 3-D printer (3DP) has been employed using polycaprolactone (PCL) filament. F, image processing has been utilized to measure viscosity in such microfluidic domain. Viscosity was calculated by measuring the time taken by the fluid to cover a fixed length between two spots in the microchannel based on the programed and color-coded regions-of-interest. The image processing program was developed considering the change in the gray scale in the virtual region of interests (ROIs) in the microchannel during the fluid flow in the paper microstrips. A 3-D printed handheld platform, containing raspberry pi with on-board camera and display, was developed to execute the image processing and automate the entire work flow. In the proposed device, the accuracy was measured to be >92%.
- Published
- 2020
3. Novel 3D Printed Microfluidic Paper-Based Analytical Device With Integrated Screen-Printed Electrodes for Automated Viscosity Measurements
- Author
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Sanket Goel and S B Puneeth
- Subjects
010302 applied physics ,Rapid prototyping ,Materials science ,Fabrication ,Microchannel ,business.industry ,Relative viscosity ,Microfluidics ,Viscometer ,01 natural sciences ,Electronic, Optical and Magnetic Materials ,Microcontroller ,Viscosity (programming) ,0103 physical sciences ,Optoelectronics ,Electrical and Electronic Engineering ,business - Abstract
Various miniaturized viscometers have been developed utilizing several fabrication methods. Among them, microfluidic paper-based analytical devices ( $\mu $ PADs) are becoming popular due to their fabrication ease, cost-effectiveness, and the fact that the flow can be carried out using the embedded capillaries themselves. Mostly, $\mu $ PADs are reported to be fabricated by a solid-ink printer, which has significantly high capital and operational cost. To overcome such drawbacks, a novel rapid prototyping method has been proposed, wherein the formation of the hydrophobic regions was created by polycaprolactone (PCL) filament using a 3-D printer. To leverage this, $\mu $ PAD as a viscometer, velocity, or time between two points with known distances was required, which was carried out by an amperometric approach, established by fabricating the integrated screen-printed electrodes intersecting the microchannel of the $\mu $ PAD. The time measurement was fully automated by a microcontroller, and the relative viscosity was calculated by comparing the time taken by the reference fluid with that of a test fluid to cover a known length. Such integrated, automated, and low-cost paper-based microviscometer was leveraged to measure and analyze the viscosities of various milk variants, which has an accuracy of >92%.
- Published
- 2019
4. Editorial Special Section on Papers From the 2020 VLSI Symposium
- Author
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Giovanni Ghione
- Subjects
Very-large-scale integration ,Engineering ,Electron device ,business.industry ,Section (typography) ,Special section ,Library science ,Review process ,Electrical and Electronic Engineering ,business ,GeneralLiterature_MISCELLANEOUS ,Electronic, Optical and Magnetic Materials - Abstract
Since 2017, the IEEE Transactions on Electron Devices (TED) has published a selection of extended versions of papers presented at the Symposia on VLSI Technology and Circuits held in the corresponding years (vol. 64, no. 10; vol. 65, no. 11; vol. 66, no. 12). Since 2018, the papers have been collected in a Special Section of TED titled “Papers from Symposium on VLSI Technology.” This initiative, which was the result of a fruitful cooperation between the Electron Device Society and the VLSI Symposium chairs and committees, has brought to TED a number of carefully selected (by the VLSI TPC first and then through the TED usual review process), high-quality submissions. We have been able to continue this cooperation also in this difficult 2020, and we are therefore happy to announce the publication in the December issue (Vol. 67, No. 12) of a Special Section on papers from the 2020 Symposium, held virtually on June 15–19, 2020. A special thanks to the Guest Editors of the section, Peide Ye, Purdue University (Publication Chair, 2020 VLSI Symposium), and Masaharu Kobayashi, The University of Tokyo, Japan (Publication Co-Chair, 2020 VLSI Symposium).
- Published
- 2020
5. Low-Voltage Oxide-Based TFTs Self-Assembled on Paper Substrates With Tunable Threshold Voltage
- Author
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Jie Jiang, Bin Zhou, Jia Sun, Wei Dou, Qing Wan, and Aixia Lu
- Subjects
Materials science ,business.industry ,Transistor ,Gate dielectric ,Electrical engineering ,Capacitance ,Electronic, Optical and Magnetic Materials ,Threshold voltage ,law.invention ,Thin-film transistor ,law ,Electrode ,Optoelectronics ,Electrical and Electronic Engineering ,business ,Low voltage ,Voltage - Abstract
Oxide-based thin-film transistors (TFTs) with a lateral in-plane electrode are self-assembled on paper substrates, and the electrical modulation effect of the in-plane electrode is investigated. A SiO2-based solid-electrolyte film with high specific capacitance is used as the gate dielectric, and the operation voltage is reduced to less than 2.0 V. The threshold voltage (Vth) of such paper TFTs is tuned from -0.98 to 0.94 V by different voltage biases on the in-plane electrode. The threshold voltage shift (ΔVth) can be described by ΔVth = -(CG2/CG1)VG2, where CG2 and CG1 are the in-plane electrode and bottom-gate specific capacitance values. High electrical performance with a current on/off ratio of 6 ×105 ~ 106, a subthreshold swing of 0.14 ~ 0.19 V/dec, and a mobility of 8.64 ~ 9.45 cm2/V·s is obtained at different in-plane electrode voltage biases. Such low-voltage paper TFTs are promising for low-cost and portable electronics.
- Published
- 2012
6. Paper as a Substrate for Inorganic Powder Electroluminescence Devices
- Author
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Jeonghee Lee, In Taek Han, Jin Young Kim, Sunjin Song, SeGi Yu, Shang Hyeun Park, Taewon Jeong, Donggeun Jung, and Min Jong Bae
- Subjects
Chemical process ,Materials science ,Fabrication ,business.industry ,Substrate (printing) ,Electroluminescence ,Buffer (optical fiber) ,Electronic, Optical and Magnetic Materials ,Electroluminescent display ,Surface roughness ,Optoelectronics ,Electrical and Electronic Engineering ,business ,Layer (electronics) - Abstract
Alternating-current-type inorganic powder electroluminescence (PEL) devices were successfully fabricated on four kinds of paper substrates, i.e., glossy paper, sticker paper, magazine paper, and newspaper. To protect the paper from wet chemical and heating processes during the formation of the PEL device, the paper substrate was coated with a spin-on-glass layer that served as a buffer layer. In spite of the fragility of paper, quite satisfactory results were obtained-the performance of paper-based PEL devices was almost equivalent to that of PEL devices on a plastic substrate. Extension of a substrate to paper, even to flimsy daily newspaper, will widen the opportunity of PEL devices as one of flexible and disposable displays.
- Published
- 2010
7. Paper-tape-controlled electron probe resist exposure and direct metallic deposition
- Author
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W. C. Nixon, J. P. Ballantyne, and C. Dix
- Subjects
Engineering ,business.industry ,Paper tape ,Nanotechnology ,Electron ,Electronic, Optical and Magnetic Materials ,Metal ,Resist ,Control system ,visual_art ,visual_art.visual_art_medium ,Optoelectronics ,Microelectronics ,Deposition (phase transition) ,Electrical and Electronic Engineering ,business ,Metallic bonding - Abstract
Computer-aided design techniques are now used extensively for the production of masks in the microelectronic industries. In these methods the microcircuit patterns are broken down into simpler component parts, such as rectangles, whose co-ordinates are punched onto paper tape. A logic system has been developed to control an electron probe from coordinates read in on paper tape. Successive rectangles specified on the tape are scanned by the probe on the specimen, exposing an electron-sensitive material. A microcircuit pattern is thus built up from these basic rectangular elements. The use of an electron probe allows the generation of patterns with submicron dimensions within a reasonable time. The system outlined above has been used to produce microcircuit patterns using two techniques. In one, electron-sensitive resist is used to define a pattern etched in underlying material; in the other, metallic patterns are deposited directly by the decomposition of a metallic compound.
- Published
- 1972
8. Special section featuring selected papers from the 2000 european solid-state device research conference (ESSDERC)
- Author
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Douglas P. Verret
- Subjects
Engineering ,business.industry ,Special section ,Solid-state ,Mechanical engineering ,Electrical and Electronic Engineering ,business ,Engineering physics ,Electronic, Optical and Magnetic Materials - Published
- 2001
9. Expanded papers from the 1999 European solid-state device research conference
- Author
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Renuka P. Jindal
- Subjects
Engineering ,business.industry ,Systems engineering ,Solid-state ,Electrical and Electronic Engineering ,business ,Electronic, Optical and Magnetic Materials - Published
- 2000
10. Driving Method of Three-Particle Electrophoretic Displays
- Author
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Wen-Chung Kao and Jui-Che Tsai
- Subjects
010302 applied physics ,business.industry ,Computer science ,01 natural sciences ,Electronic, Optical and Magnetic Materials ,law.invention ,Visualization ,010309 optics ,Electrophoresis ,law ,0103 physical sciences ,Particle ,Waveform ,Tone reproduction ,Computer vision ,Artificial intelligence ,Electronic paper ,Electrical and Electronic Engineering ,business - Abstract
The electrophoretic display (EPD) is the main solution to electronic papers, but most of them can display the image or text in black and white particles only. The users may prefer the EPD showing multiple colors rather than the black/white content only. In this paper, we introduce the driving system for a color EPD, which is composed of three kinds of particles. The system aims at optimizing the visual quality based on a new driving waveform by equipping with an optimization method for color and tone reproduction. The experimental result shows that the proposed EPD driving system can display three-color pictures with promising visual quality.
- Published
- 2018
11. IIa-9 room-temperature operation of Ga(1-x)AlxAs/GaAs double heterostructure lasers grown by metalorganic chemical vapor deposition (late paper)
- Author
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R.D. Dupuis and P.D. Dapkus
- Subjects
Materials science ,Hybrid physical-chemical vapor deposition ,business.industry ,law ,Optoelectronics ,Chemical vapor deposition ,Electrical and Electronic Engineering ,Double heterostructure ,business ,Laser ,Electronic, Optical and Magnetic Materials ,law.invention - Published
- 1977
12. V-9 high radiance InGaAsP CW LEDs emitting at 1.30 µm (late paper)
- Author
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Andrew Dentai, E. Buehler, W.M. Muska, T.P. Lee, and C.A. Burrus
- Subjects
Materials science ,Optics ,business.industry ,law ,Radiance ,Optoelectronics ,Electrical and Electronic Engineering ,business ,Electronic, Optical and Magnetic Materials ,Light-emitting diode ,law.invention - Published
- 1977
13. Papers from the seventh IEEE photovoltaic specialists conference
- Author
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M. Wolf
- Subjects
Engineering ,business.industry ,Photovoltaic system ,Electrical and Electronic Engineering ,business ,Telecommunications ,Electronic, Optical and Magnetic Materials - Published
- 1971
14. Electrically Controlled Photocatalytic Reduction of Graphene Oxide Sheets by ZnO Nanostructures, Suitable for Tunable Optoelectronic Applications
- Author
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Yousef Khosravi, Bahram Abdollahi Nejand, Mohammad Hosein Feda, and Sara Darbari
- Subjects
Fabrication ,Materials science ,business.industry ,Graphene ,Nanowire ,Photodetector ,Biasing ,02 engineering and technology ,010402 general chemistry ,021001 nanoscience & nanotechnology ,01 natural sciences ,0104 chemical sciences ,Electronic, Optical and Magnetic Materials ,law.invention ,law ,Ribbon ,Photocatalysis ,Optoelectronics ,Electrical and Electronic Engineering ,0210 nano-technology ,business ,Graphene oxide paper - Abstract
In this paper, a fully controlled photocatalytic reduction of graphene oxide (GO) sheets is presented in which electrical bias is applied in combination with UV illumination. It is proved that this controllability allows higher conductivities and lower UV illumination times for the achieved reduced graphene oxide (rGO) sheets, which are not allowed without gate voltage. We attribute the observed enhancement mechanism in photocatalytic reduction to electron accumulation at the ZnO/GO interface and decrement of recombination of photogenerated carriers. Then, we applied ZnO nanowires to reduce the GO sheets locally and realize rGO ribbons. The optoelectric response of the fabricated photodetector based on the realized rGO ribbon shows that by controlling the photocatalytic reduction, we can achieve a tunable/selective photodetector ( $\lambda _{\mathrm {incident}} = 520$ , 595, and 633 nm have been investigated). These functionalities allow tuning the output sensitivity of the device in response to different incident wavelengths along the fabrication process or even after the fabrication process. We believe that the presented approach introduces a new generation of tunable devices suitable for different application fields, including optoelectronics.
- Published
- 2016
15. Plant-Based Completely Biodegradable Printed Circuit Boards
- Author
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Geethapriya Murugesan, Vijaykumar Guna, Bhuvaneswari Hulikal Basavarajaiah, Sharon Olivera, Venkatesh Krishna, Narendra Reddy, and Manikandan Ilangovan
- Subjects
Engineering ,business.industry ,Nanotechnology ,02 engineering and technology ,Epoxy ,010501 environmental sciences ,021001 nanoscience & nanotechnology ,Pulp and paper industry ,01 natural sciences ,Electronic waste ,Environmentally friendly ,Electronic, Optical and Magnetic Materials ,Cellulose fiber ,Printed circuit board ,visual_art ,Electronic component ,visual_art.visual_art_medium ,Electronics ,Electrical and Electronic Engineering ,Biocomposite ,0210 nano-technology ,business ,0105 earth and related environmental sciences - Abstract
Completely biodegradable printed circuit boards (PCBs) have been developed using biocomposites made from natural cellulose fibers extracted from banana stems and wheat gluten, which are normally considered as agricultural wastes or coproducts. PCBs were fabricated using these composites with properties suitable for electronic applications. The biocomposites are free of chemicals, and an environmentally benign approach was adopted to fabricate the PCBs. Conventional PCBs are critical components in electronics and are currently made using fire resistant plastics (FRPs). FRPs are typically made using glass fibers and epoxy, which are nonbiodegradable when disposed in the environment. Several attempts have been made to develop environmentally friendly PCBs and other electronic components. Although dissolvable electronics and foldable PCBs have been reported, so far, there are no 100% biodegradable PCBs. The dielectric constant for banana fiber/wheat gluten composite varied between 2–36, which is in the range of dielectric materials used for PCB and other electronic components. A significant amount of heat (up to 45 °C) was dissipated through the biocomposite preventing overheating and thus reducing risk of fires. PCBs did not show any deterioration in performance even after exposure to high humidity (90%) or high temperature (100 °C). LED connected to the PCB was able to glow without any interruption. Natural fibers and protein-based PCBs may provide an alternative to the synthetic polymer-based electronic components and help us to reduce the environmental burden due to the disposal of electronic waste (e-waste).
- Published
- 2016
16. IIb-5.5 MOS control of switches in single mode GaAs-AlxGa1-xAs optical rib waveguides (late paper)
- Author
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F. K. Reinhart, R. A. Logan, and J. C. Shelton
- Subjects
Materials science ,business.industry ,Electronic engineering ,Single-mode optical fiber ,Optoelectronics ,Rib waveguides ,Electrical and Electronic Engineering ,business ,Electronic, Optical and Magnetic Materials - Published
- 1977
17. IIA-10 submicron-length tungsten gate self-aligned GaAs MESFET (late paper)
- Author
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M. Yamazaki, K. Matsumoto, T. Kurosu, N. Atoda, M. Iida, N. Hashizume, T. Endo, K. Nishimura, and Kazutaka Tomizawa
- Subjects
Materials science ,chemistry ,business.industry ,Electronic engineering ,chemistry.chemical_element ,Optoelectronics ,MESFET ,Electrical and Electronic Engineering ,Tungsten ,business ,Electronic, Optical and Magnetic Materials - Published
- 1982
18. IIIb-5.5 liquid phase epitaxial InGaPAs multilayered heterojunction lasers exhibiting 'Quantum size effects' (late paper)
- Author
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Nick Holonyak, J. D. Fairing, D. L. Keune, G. E. Stillman, Bruce A. Vojak, J.A. Rossi, and E. A. Rezek
- Subjects
Materials science ,business.industry ,Liquid phase ,Heterojunction ,Epitaxy ,Laser ,Electronic, Optical and Magnetic Materials ,Quantum size ,law.invention ,chemistry.chemical_compound ,chemistry ,Effects late ,law ,Indium phosphide ,Optoelectronics ,Spontaneous emission ,Electrical and Electronic Engineering ,business - Published
- 1977
19. Papers of fifth photovoltaic specialists conference
- Author
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P. Rappaport
- Subjects
Engineering ,business.industry ,Photovoltaic system ,Library science ,Electrical and Electronic Engineering ,business ,Electronic, Optical and Magnetic Materials - Published
- 1967
20. Substrate-Induced Photofield Effect in Graphene Phototransistors
- Author
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Biddut K. Sarker, Nauman Zafar Butt, Yong P. Chen, and Muhammad A. Alam
- Subjects
Materials science ,business.industry ,Graphene ,Photoconductivity ,Substrate (electronics) ,Capacitance ,Electronic, Optical and Magnetic Materials ,law.invention ,Quantum capacitance ,law ,Optoelectronics ,Electrical and Electronic Engineering ,business ,Bilayer graphene ,Graphene nanoribbons ,Graphene oxide paper - Abstract
A single atomic layer of graphene, integrated onto an undoped bulk substrate in a back-gated transistor configuration, demonstrates surprising strong photoconduction, and yet, the physical origin of the photoresponse is not fully understood. Here, we use a detailed computational model to demonstrate that the photoconductivity arises from the electrostatic doping of graphene, induced by the surface accumulation of photogenerated carriers at the graphene/substrate interface. The accumulated charge density depends strongly on the rate of charge transfer between the substrate and the graphene; the suppression of the transfer rate below that of carrier’s thermal velocity is an essential prerequisite for a substantial photoinduced doping in the graphene channel under this mechanism. The contact-to-graphene coupling (defined by the ratio of graphene–metal contact capacitance to graphene’s quantum capacitance) determines the magnitude of photoinduced doping in graphene at the source/drain contacts. High-performance graphene phototransistors would, therefore, require careful engineering of the graphene–substrate interface and optimization of graphene–metal contacts.
- Published
- 2015
21. Computational Study of Hybrid Nanomaterial/Insulator/Silicon Solar Cells
- Author
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Nauman Zafar Butt and Hassan Imran
- Subjects
Materials science ,Silicon ,business.industry ,Graphene ,Doping ,Oxide ,chemistry.chemical_element ,Nanotechnology ,Polymer solar cell ,Electronic, Optical and Magnetic Materials ,law.invention ,Condensed Matter::Materials Science ,chemistry.chemical_compound ,Quantum capacitance ,chemistry ,law ,Condensed Matter::Superconductivity ,Optoelectronics ,Condensed Matter::Strongly Correlated Electrons ,Crystalline silicon ,Electrical and Electronic Engineering ,business ,Graphene oxide paper - Abstract
We present a computational study on hybrid nanomaterial-insulator-silicon solar cells where single-walled carbon nanotube or graphene forms the emitter as well as top conducting electrode on n-type crystalline silicon having a thin interfacial tunnel oxide. The effects of nanomaterial doping and tunnel oxide thickness on cell characteristics are modeled. Similar to bulk emitters, cell efficiency could be increased by chemical doping (p-type) of the nanomaterial. Unlike bulk, nanomaterial could get electrostatically doped (n-type) due to its low quantum capacitance, by the surface charge density in silicon. For chemically undoped graphene on lightly ( $10^{{16}}$ /cm $^{{3}}$ ) doped silicon, efficiency loss due to the electrostatic doping effect is $\sim 11$ %. A moderate p-type chemical doping (0.2 eV shift in Fermi level) of graphene reduces the aforementioned loss to $\sim 2$ %. The electrostatic doping effect in carbon nanotube-based cells is relatively small and independent to nanotube’s chemical doping. For tunnel oxide thickness $\ge 2$ nm, photogenerated carrier accumulation at silicon/oxide interface considerably enhances the electrostatic doping effect. The effect of tunnel oxide thickness variation on fill factor and open circuit voltage is shown to be qualitatively similar to standard bulk metal–insulator–silicon solar cells. Our model predicts an optimal oxide thickness of $\sim 1$ nm which confirms the experimental reports.
- Published
- 2015
22. A Triple-Layered Microcavity Structure for Electrophoretic Image Display
- Author
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Yong Eui Lee, Mann Ho Cho, Donggeun Jung, Hyoungsub Kim, Jaehyun Yang, Chul-Hwan Kim, Chee-Hong An, and Eunkyoung Nam
- Subjects
chemistry.chemical_classification ,Materials science ,business.industry ,Nanotechnology ,Polymer ,Electronic, Optical and Magnetic Materials ,Indium tin oxide ,law.invention ,Electrophoresis ,chemistry ,Resist ,law ,Electrode ,Optoelectronics ,Contrast ratio ,Electronic paper ,Electrical and Electronic Engineering ,business ,Layer (electronics) - Abstract
An electrophoretic display (EPD) cell with a triple-layered microcavity structure was fabricated using a convenient dry film resist. The inherent structural advantage arising from the function of the middle channel layer as a background colored state enabled the EPD to operate with two different-colored states by using a single type of electronic-ink particles, thereby eliminating the possible agglomeration of oppositely charged ink particles and supporting the potential application of the proposed structure to color the electronic paper. The preliminary operation of this new EPD structure was demonstrated as white and blue display states on a rigid glass exhibiting a contrast ratio of 1.5 : 1 with saturation voltages of + 30 and -30 V, respectively. Successful demonstrations on both the indium-tin-oxide-patterned glass and flexible polyethylene substrates are also provided.
- Published
- 2011
23. High-resolution microencapsulated electrophoretic display (EPD) driven by poly-si TFTs with four-level grayscale
- Author
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Hideyuki Kawai, Satoshi Inoue, Takayuki Saeki, Sadao Kanbe, and Tatsuya Shimoda
- Subjects
Materials science ,Video Graphics Array ,business.industry ,Viewing angle ,Grayscale ,Dot pitch ,Electronic, Optical and Magnetic Materials ,Display device ,law.invention ,law ,Thin-film transistor ,Electronic engineering ,Optoelectronics ,Electronic paper ,Electrical and Electronic Engineering ,business ,Pixel density - Abstract
A high-resolution active-matrix microencapsulated electrophoretic display (EPD) driven by polycrystalline-silicon thin-film transistors (poly-Si TFTs) with integrated drivers has been developed for the first feasibility study of electronic paper. The poly-Si TFTs were fabricated with a low temperature process below 425/spl deg/C. Microencapsulated electrophoretic material was coated on the TFT backplane, which was driven at 18 V. The resolution of the display is quarter VGA (video graphics array), and pixel pitch is 131 ppi (pixels per inch). As a result, this display offers a wide viewing angle, high contrast ratio and nonvolatilization of data. In addition, four-level grayscale images were also achieved by using an area ratio grayscale (ARG) driving method.
- Published
- 2002
24. New gray-scale printing method using a thermal printer
- Author
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Jun Ohya, K. Kubota, and Yukio Tokunaga
- Subjects
Imagination ,Brightness ,Engineering ,business.industry ,media_common.quotation_subject ,Thermal Head ,Electrical engineering ,Thermal paper ,Fixture ,Grayscale ,Electronic, Optical and Magnetic Materials ,Optics ,Electrical and Electronic Engineering ,business ,Continuous tone ,Thermal printing ,media_common - Abstract
A 3-level dot-pattern method (the 3-L method) has been developed in order to achieve stable and many gradational-level thermal printing with minimal loss in print resolution. This 3-L method employs dot-pattern matrices which consist of three density level dots; black (saturation density of thermal paper), gray (half-black density), and white (paper brightness) dots. The matrices are assigned to picture elements of continuous tone images according to their gradational levels. A theoretical analysis of the gradational printing characteristics was carried out on the basis of a modified Yule-Nielsen equation and an equation describing the color change of thermal paper. Using these equations, the numbers of equally spaced gradational levels were studied, and an optimum gray density for maximizing them was found. To further ensure high quality printing, optimum dot patterns were selected by the introduction of an evaluation function based on a discrete Fourier transform. The 3-L method was demonstrated to have good performance in tests with a thermal printing fixture employing a high-resolution (16 dots/mm) thermal head.
- Published
- 1983
25. The TTCRT: Thermal-transmission cathode-ray tube for thermal printing
- Author
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A. Olivei
- Subjects
Engineering ,Physics::Instrumentation and Detectors ,Cathode ray tube ,business.industry ,Electrical engineering ,Thermal paper ,Electronic, Optical and Magnetic Materials ,law.invention ,Optics ,law ,Deflection (engineering) ,Thermal ,Cathode ray ,Electrical and Electronic Engineering ,business ,Thermal printing - Abstract
We propose a new kind of cathode-ray tube, namely, the thermal-transmission cathode-ray tube (TTCRT). In the TTCRT the electron beam focused to a small spot is called upon to heat in sequence small elements of a matrix that constitutes the faceplate of the tube. A heat-sensitive or thermal paper passed across the screen and maintained in contact with it, and outside the tube, will record characters and dot patterns generated through suitable two-dimensional deflection of the electron beam. We give a description of the main parameters regulating the performance of the TTCRT.
- Published
- 1972
26. Full-Band Quantum Transport of Heterojunction Electron Devices With Empirical Pseudopotentials
- Author
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David Esseni, Marco G. Pala, Adel M'foukh, Centre de Nanosciences et de Nanotechnologies (C2N), and Université Paris-Saclay-Centre National de la Recherche Scientifique (CNRS)
- Subjects
heterojunctions ,Materials science ,Semiconductor device modeling ,Non-equilibrium thermodynamics ,Electron ,01 natural sciences ,Quantum transport ,Empirical pseudopotential ,0103 physical sciences ,[SPI.NANO]Engineering Sciences [physics]/Micro and nanotechnologies/Microelectronics ,Electrical and Electronic Engineering ,quantum transport ,[PHYS.COND.CM-MSQHE]Physics [physics]/Condensed Matter [cond-mat]/Mesoscopic Systems and Quantum Hall Effect [cond-mat.mes-hall] ,Quantum tunnelling ,Diode ,010302 applied physics ,business.industry ,NEGF ,Heterojunction ,Electronic devices ,empirical pseudopotential ,nonequilibrium Green's function (NEGF) ,Condensed Matter::Mesoscopic Systems and Quantum Hall Effect ,Electronic, Optical and Magnetic Materials ,Semiconductor ,electronic devices ,[PHYS.COND.CM-MS]Physics [physics]/Condensed Matter [cond-mat]/Materials Science [cond-mat.mtrl-sci] ,Optoelectronics ,business - Abstract
International audience; This paper presents the methodology, implementation and application of a full-band quantum transport model based on the non-equilibrium Green's function formalism and the empirical pseudopotentials. In particular the paper reports the treatment of heterojunctions between lattice matched semiconductors, comprising a gradual transition region described according to a virtual crystal approximation. Our approach entails several numerical techniques to make the full-band quantum transport method computationally affordable, and thus enable robust and efficient self-consistent device simulations. Then we employ our simulation scheme for the analysis of some exemplary devices based on quantum tunnelling, such as an Esaki tunnelling diode, as well as n-and p-type heterojunction Tunnel FETs. In particular we investigate the influence on the current-voltage characteristics of the width of the heterojunction transition region. We observe that a gradual transition region mainly affects the device characteristics by lengthening the tunnelling path at the heterojunction, which has a different impact on device current depending on the external bias conditions.
- Published
- 2020
27. Impact of Residual Carbon on Avalanche Voltage and Stability of Polarization-Induced Vertical GaN p-n Junction
- Author
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Kalparupa Mukherjee, Alessandro Caria, Carlo De Santi, Kazuki Nomoto, Hugues Marchand, Xiang Gao, Zongyang Hu, Gaudenzio Meneghesso, Huili Grace Xing, Elena Fabris, Debdeep Jena, Enrico Zanoni, Wenshen Li, and Matteo Meneghini
- Subjects
010302 applied physics ,Materials science ,business.industry ,Gallium nitride ,01 natural sciences ,Electronic, Optical and Magnetic Materials ,chemistry.chemical_compound ,chemistry ,Electric field ,0103 physical sciences ,Optoelectronics ,Breakdown voltage ,Power semiconductor device ,Electrical and Electronic Engineering ,business ,p–n junction ,Leakage (electronics) ,Voltage ,Diode - Abstract
We demonstrate that the residual carbon concentration in the drift region can have a significant impact on the reverse leakage, breakdown voltage, and breakdown stability of GaN-on-GaN vertical diodes. Two generations (Gen1, Gen2) of polarization-doped p-n junctions with different C concentrations were compared, in terms of avalanche voltage, avalanche instability, and deep-level concentration. The original results collected within this paper show that: 1) both generations of devices can safely reach the avalanche regime; diodes with a lower residual CN have a higher reverse leakage and a lower avalanche voltage, due to an uneven distribution of the electric field; 2) the presence of residual carbon can lead to breakdown walkout, i.e. a recoverable increase in breakdown voltage under reverse-bias stress. Specifically, devices with higher C concentration show a fully-recoverable breakdown walkout, whereas the breakdown voltage is stable in devices with lower C concentration; and 3) steady-state photocapacitance measurements confirm the presence of CN in both generations, and are used to assess the relative difference in concentration between Gen1 and Gen2, even for levels below secondary ion mass spectroscopy (SIMS) sensitivity. The results described in this paper indicate the existence of a trade-off between breakdown voltage (increasing by improving compensation) and breakdown stability (improving by reducing CN concentration) and are of fundamental importance for the optimization of GaN power devices.
- Published
- 2020
28. Alternating Current III-Nitride Light-Emitting Diodes With On-Chip Schottky Barrier Diode Rectifiers
- Author
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Chen Mo, Zhenyu Jiang, Jie Liu, Guanjun You, Zengzhi Pei, Bangzhi Liu, Jian Xu, and Min Chang
- Subjects
010302 applied physics ,Materials science ,business.industry ,Schottky barrier ,Schottky diode ,Gallium nitride ,Nitride ,01 natural sciences ,Electronic, Optical and Magnetic Materials ,law.invention ,chemistry.chemical_compound ,Rectifier ,chemistry ,law ,0103 physical sciences ,Optoelectronics ,Electrical and Electronic Engineering ,business ,Luminous efficacy ,Diode ,Light-emitting diode - Abstract
We report in this paper the design and fabrication of single-chip alternating current-LEDs (AC-LEDs) by monolithically integrating, for the first time, high-breakdown Schottky barrier diodes (SBDs) and micro-LED arrays using III-nitride LED epi-wafers of standard specs for volume production. A technique of cyclic mixed-etching has been introduced to restore the surface of inductively coupled-plasma (ICP) etching processed gallium nitride to device quality for fabricating high-breakdown Schottky junctions. Proof-of-concept single-chip AC-LED devices and a prototype driver-free white AC-LED lamp were demonstrated, showing high-efficiency LED emission, high chip area utilization efficiency, low power loss of the on-chip SBD bridge rectifier, and good luminous efficacy of the prototype AC-LED lamp. This paper paves the way toward mass-producing reliable and low-cost driver-free AC-LED lamps for solid-state lighting with existing LED manufacturing infrastructures.
- Published
- 2019
29. 555-Timer and Comparators Operational at 500 °C
- Author
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Muhammad Shakir, Alex Metreveli, Carl-Mikael Zetterling, Homer Alan Mantooth, Shuoben Hou, and Arman Ur Rashid
- Subjects
010302 applied physics ,Materials science ,Comparator ,business.industry ,Transistor ,Electrical engineering ,Integrated circuit ,01 natural sciences ,Electronic, Optical and Magnetic Materials ,law.invention ,Multivibrator ,555 timer IC ,chemistry.chemical_compound ,chemistry ,law ,Rise time ,0103 physical sciences ,Silicon carbide ,Electrical and Electronic Engineering ,Resistor ,business - Abstract
This paper reports an industry standard monolithic 555-timer circuit designed and fabricated in the in-house silicon carbide (SiC) low-voltage bipolar technology. This paper demonstrates the 555-timer integrated circuits (ICs) characterization in both astable and monostable modes of operation, with a supply voltage of 15 V over the wide temperature range of 25 °C–500 °C. Nonmonotonic temperature dependence was observed for the 555-timer IC frequency, rise time, fall-time, and power dissipation.
- Published
- 2019
30. Efficiency Enhancement in Thermally Activated Delayed Fluorescence Organic Light-Emitting Devices by Controlling the Doping Concentration in the Emissive Layer
- Author
-
M. Jabbari and Hadi Soofi
- Subjects
010302 applied physics ,Materials science ,business.industry ,Exciton ,Doping ,01 natural sciences ,Electronic, Optical and Magnetic Materials ,0103 physical sciences ,OLED ,Optoelectronics ,Quantum efficiency ,Charge carrier ,Electrical and Electronic Engineering ,business ,Current density ,Electrical efficiency ,Diode - Abstract
Efficiency roll-off defined as the rapid efficiency drop by increasing the electrical current density is a major issue in the design of novel organic light-emitting diodes (OLEDs) based on thermally activated delayed fluorescence (TADF). In this paper, it is shown that efficiency enhancement and suppression of efficiency roll-off in TADF OLEDs can be accomplished by broadening the exciton generation zone by precisely tuning the doping concentration of the TADF emissive material in the host matrix. This universal and simply tunable parameter can be applied to any TADF OLED to further enhance its performance characteristics. In this paper, a typical TADF OLED with realistic parameters is numerically investigated by solving the charge carrier transport and excitonic equations and taking into account all relevant processes such as triplet–triplet annihilation, triplet–polaron, and singlet–triplet quenching, and (reverse) intersystem crossing. It is shown that the internal quantum efficiency (IQE) decreases at very low and very high doping densities due to exciton distribution nonuniformity and charge balance factor reduction, respectively. Power efficiency depends on the IQE as well as the potential drop across the emissive layer and decreases at very low doping densities even for a perfectly balanced device; however, the reduction for an unbalanced device is much more substantial. For a perfectly balanced device with an emissive layer thickness of 30 nm, at a current density of 10 mAcm−2, the IQE can be increased from 18% to more than 58% by decreasing the doping concentration from ${c}= {15}$ % to 0.5%. Power efficiency reaches its peak value of 38 lm/W at 1.4% doping.
- Published
- 2019
31. Plasma Charge Accumulative Model in Quantitative FinFET Plasma Damage
- Author
-
Chrong Jung Lin, Ya-Chin King, Jiaw-Ren Shih, and Yi-Pei Tsai
- Subjects
010302 applied physics ,Materials science ,business.industry ,Gate dielectric ,Semiconductor device modeling ,Plasma ,01 natural sciences ,Electronic, Optical and Magnetic Materials ,Ion ,Logic gate ,0103 physical sciences ,Optoelectronics ,Wafer ,Field-effect transistor ,Electrical and Electronic Engineering ,business ,Quantum tunnelling - Abstract
A novel plasma Charge Accumulative Model (pCAM) by calculating time-integrated Fowler–Nordheim (FN) tunneling charges and field of the gate dielectric in plasma processes is proposed in this paper. Our prior studies have developed and presented a quantitative FinFET plasma recording device by an effective fin-shaped field effect transistor (FinFET) contact-to-metal coupling structure to record and quantify plasma ion charges created in FinFET backend processes. In this paper, a precise analytical model is proposed to model the magnitude of plasma ion charges, time-integrated stressing field, and the criteria of the plasma process for optimum FinFET process technology. The new pCAM is highly matching with the measurement result of 16- and 7-nm FinFET wafers. The model can be adapted to practically estimate the plasma damage with different charge types, process parameters, and ion distribution; it can optimize the FinFET process and further understand the plasma damage mechanism in charging processes of 7-nm FinFET and beyond.
- Published
- 2019
32. Performance Comparison of s-Si, In0.53Ga0.47As, Monolayer BP, and WS2-Based n-MOSFETs for Future Technology Nodes—Part I: Device-Level Comparison
- Author
-
Marc Heyns, Martin Rau, Wim Dehaene, Iuliana Radu, Mathieu Luisier, and Tarun Agarwal
- Subjects
010302 applied physics ,Electron mobility ,Applied physics ,business.industry ,Nanowire ,01 natural sciences ,Capacitance ,Electronic, Optical and Magnetic Materials ,Logic gate ,0103 physical sciences ,Monolayer ,Optoelectronics ,Electrical and Electronic Engineering ,business ,Efficient energy use ,Voltage - Abstract
The first part of this paper presented mymargin the device-level comparison of emerging materials (In0.53Ga0.47As and 2-D materials) and device architecture (NW FETs) with s-Si FinFETs. In order to further understand the performance and energy efficiency of these device options for future technology nodes, it is required to go beyond the device-level comparison by accounting for not only intrinsic but also the extrinsic parasitic elements. In this paper, we present the comparison of s-Si, In0.53Ga0.47As, and 2-D material-based n-type MOSFETs using the circuit-level figure of merits across three successive future technology nodes. The analysis incorporates both device characteristics obtained from an advanced quantum mechanical simulation tool and circuit-level comparison, which accounts for device parasitic elements and wiring load. The results show that 2-D material DG MOSFETs present a more energy-efficient device option than s-Si and In0.53Ga0.47As FinFETs in sub-0.7-V supply voltage regime and In0.53Ga0.47As nanowire (NW) FETs can outperform s-Si multi-gate (MuG) FETs and 2-D material FETs, but when considering non-idealities, s-Si NW FETs remain both faster and more energy-efficient device option.
- Published
- 2019
33. Design and AC Modeling of a Bipolar GNR-h-BN RTD With Enhanced Tunneling Properties and High Robustness to Edge Defects
- Author
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Mahdi Khoshbaten and Seyed Ebrahim Hosseini
- Subjects
010302 applied physics ,Materials science ,business.industry ,Doping ,Resonant-tunneling diode ,Nitride ,01 natural sciences ,Capacitance ,Electronic, Optical and Magnetic Materials ,Robustness (computer science) ,Vacancy defect ,0103 physical sciences ,Optoelectronics ,Electrical and Electronic Engineering ,business ,Quantum tunnelling ,Diode - Abstract
This paper proposes a robust to defects and short length device (RDSLD), a newly in-plane resonant tunneling diode (RTD), and its ac-modeling with the minimum length of 3 nm. The proposed structure has robust performance in the presence of defects. It also has a high degree of flexibility in tuning electronic specifications. By using bipolar doping and a special h-boron nitride barrier pattern, these unique features are obtained. The simulation results verify that the proposed structure has the potential for replacing conventional RTD diodes. Such that the peak-to-valley ratio (PVR) and the maximum current of 4500, 450 nA for perfect bowtie and 3.45, 1256 nA for rhombic barrier shape structure are obtained, respectively. Also, negative differential resistance (NDR) is observed in all of the structures with vacancy and impurity defects. The effect of the geometrical parameters on the charge transmission of the device is another issue that is addressed in this paper. Furthermore, the analytical and numerical capacitance model parameters are presented.
- Published
- 2019
34. Study on the Thermal and Optical Performance of Quantum Dot White Light-Emitting Diodes Using Metal-Based Inverted Packaging Structure
- Author
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Zongtao Li, Song Cunjiang, Cao Kai, Xinrui Ding, Jiasheng Li, Zi-Yu Qiu, and Yong Tang
- Subjects
010302 applied physics ,Materials science ,business.industry ,Phosphor ,Color temperature ,Electroluminescence ,01 natural sciences ,Electronic, Optical and Magnetic Materials ,law.invention ,Color rendering index ,Thermal conductivity ,law ,Quantum dot ,0103 physical sciences ,Optoelectronics ,Thermal stability ,Electrical and Electronic Engineering ,business ,Light-emitting diode - Abstract
Quantum dot (QD) white light-emitting diodes (LEDs) are promising devices in illumination and display applications, and the low thermal stability of QDs is one of the biggest problems limiting their practical use. In this paper, we proposed a metal-based inverted packaging (MIP) structure to enhance the thermal performance and stability of QD white LEDs. The results indicate that the thermal power of LED chips can greatly increase the surface temperature of QD white LEDs, especially that of the color-converted layer and the base. Therefore, the LED chip was separated from the QD layer and isolated with low thermal conductivity layers of air and glass using the MIP structure. This successfully reduces the base temperature and constrains the thermal power of the LED chip on the upper phosphor layer, thus enhancing the thermal performance for the QD layer. Consequently, MIP-QD white LEDs have a small deviation of 57.3 K in their correlated color temperature (CCT) and a deviation of 0.29 in their color rendering index (CRI) at injection power values in a wide range of 0.08–1.3 W, with mean values of 4382 K and 90.3, respectively. Moreover, these devices have negligible reduction in their electroluminescence intensity, and CCT and CRI values after aging for 10 h under severe conditions at an injection power of 0.9 W. Consequently, this paper can provide a general guide to enhance the thermal performance and stability of QD white LEDs by separating the thermal power of the LED chip from the QD layer.
- Published
- 2019
35. Fully Inkjet-Printed Photodetector Using a Graphene/Perovskite/Graphene Heterostructure
- Author
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Jr-Hau He, Mohammad Vaseem, Siu Leung, Amal M. Al-Amri, and Atif Shamim
- Subjects
010302 applied physics ,Materials science ,Fabrication ,business.industry ,Graphene ,Photodetector ,Heterojunction ,01 natural sciences ,Electronic, Optical and Magnetic Materials ,law.invention ,Responsivity ,law ,0103 physical sciences ,Electrode ,Optoelectronics ,Electrical and Electronic Engineering ,business ,Hybrid material ,Perovskite (structure) - Abstract
Photodetectors (PDs) based on organic–inorganic hybrid materials such as graphene and perovskites have recently emerged at the forefront of the research in optoelectronic devices. Despite the remarkable progress in the performance of optoelectronic devices based on hybrid materials, some aspects such as stability have so far not been thoroughly addressed. This paper serves to demonstrate a fully inkjet-printed PD fabricated by hybrid perovskite (CH3NH3PbClx-3I3) layer between the two graphene electrodes as graphene/perovskite/graphene (GPG) heterostructure. The fully inkjet-printed GPG PD is found to be effective for the visible light region, which can be attributed by the high uniformity and low defects of the printed materials. Thus, the GPG PD achieves a high responsivity of 0.53 A/W. Fully inkjet-printed hybrid perovskite PD demonstrated in this paper unveils the facile, potentially large-scale and cost-effective methods for fabrication of hybrid perovskites-based optoelectronic devices, including PDs and solar cells.
- Published
- 2019
36. Impact of Semiconductor Permittivity Reduction on Electrical Characteristics of Nanoscale MOSFETs
- Author
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Wen-Jay Lee, Tzung Rang Wu, Jyun-Hwei Tsai, Jia-Ming Liou, Shang-Wei Lian, Si-Hua Chen, Tay-Rong Chang, Nan-Yow Chen, Kuo-Hsing Kao, and Darsen D. Lu
- Subjects
010302 applied physics ,Permittivity ,Materials science ,business.industry ,Dielectric ,01 natural sciences ,Electronic, Optical and Magnetic Materials ,Threshold voltage ,Quantization (physics) ,Semiconductor ,0103 physical sciences ,MOSFET ,Optoelectronics ,Electric potential ,Electrical and Electronic Engineering ,Poisson's equation ,business - Abstract
The dielectric screening property of a semiconductor is very crucial for the electrical characteristics of a MOSFET, and which can be described mathematically by Poisson equation via the permittivity. While the theory and experiments have corroborated the permittivity reduction of nanoscale Si, this paper studies the electrical characteristics of MOSFETs considering the reduced channel permittivity by quantum transport simulations. It is found that the channel permittivity reduction may mitigate the short-channel effects, showing subthreshold swing improvement and threshold voltage shift of MOSFETs in nanoscale. Compared to quantization effects, the positive and negative impacts of the channel permittivity reduction on the devices in particularly nanoscale have been investigated. This paper elucidates the necessity of considering semiconductor permittivity reduction for nanoscale device design and simulations.
- Published
- 2019
37. Multifunctional Conductive Copper Tape-Based Triboelectric Nanogenerator and as a Self-Powered Humidity Sensor
- Author
-
Jiangming Fu, Zhiyuan Zhu, Yue Chi, Kequan Xia, and Zhiwei Xu
- Subjects
010302 applied physics ,Materials science ,business.industry ,Nanogenerator ,Copper tape ,01 natural sciences ,Electronic, Optical and Magnetic Materials ,0103 physical sciences ,Electrode ,Optoelectronics ,Relative humidity ,Electrical and Electronic Engineering ,business ,Electrical conductor ,Triboelectric effect ,Diode ,Power density - Abstract
In recent years, triboelectric nanogenerators (TENGs) have been increasingly attracting attention owing to the ability for converting multiple mechanical energy into electricity. In this paper, we first propose a multifunctional conductive copper tape-based TENG (CCT-TENG) that is constructed completely using one piece of conductive copper tape. The triboelectric pairs, supporting structure, and conductive electrode were composed using bottom paper, silicone oil, and copper foil, all of which came from one roll of conductive copper tape. The approximate output power density of the CCT-TENG reached $240.1~\mu \text{W}$ /cm2. By spraying the aqueous solution of LiCl onto the surface of the bottom paper, a CCT-TENG incorporating LiCl was fabricated and used as a self-powered active sensor to detect the relative humidity (RH) of the environment. The obtained results revealed that the humidity sensor had good humidity response, response linearity, and reversibility. In addition, the RH was reflected by the brightness of light-emitting diodes (LEDs) that was driven by the humidity sensor. This paper realizes a promising, affordable, and portable integration of power supply systems and sensing systems, which can promote the application of TENG in the field of electronic detection device and environment monitoring.
- Published
- 2019
38. Reconfigurable Ferroelectric Transistor—Part I: Device Design and Operation
- Author
-
Sumeet Kumar Gupta and Sandeep Krishna Thirumala
- Subjects
010302 applied physics ,Materials science ,business.industry ,Transistor ,Reconfigurability ,01 natural sciences ,Ferroelectricity ,Capacitance ,Electronic, Optical and Magnetic Materials ,law.invention ,Non-volatile memory ,law ,Logic gate ,0103 physical sciences ,Optoelectronics ,Electrical and Electronic Engineering ,business ,Leakage (electronics) ,Voltage - Abstract
In this paper, we propose a novel reconfigurable ferroelectric FET (R-FEFET), which can reconfigure its operation between volatile and nonvolatile modes during run-time by dynamically modulating its hysteresis. The R-FEFET comprises of two gates with ferroelectric (FE) in both the gate stacks. One of these terminals serves as a regular gate, while the other is used as a control to introduce reconfigurability. Employing Landau–Khalatnikov equation-based FEFET model, we extensively analyze the device characteristics in both FinFET and planar technologies. We show that by changing the control voltage between 0 and 1 V, the hysteresis width (HW) can be modulated between 1.1 and 0.3 V. In addition, we show the device characteristics and advantages that R-FEFETs possess to overcome the drawbacks encountered with gate leakage in standard FEFETs. The hold margins in the nonvolatile mode of R-FEFETs increase by ~ $10\times $ with respect to standard FEFETs, and the drive current strengths in the volatile mode show 13% improvements when compared to standard FETs. Using the proposed R-FEFETs, we examine a low-power nonvolatile memory design in Part II of this paper.
- Published
- 2019
39. Thin-Film Luminescent Solar Concentrators Using Inorganic Phosphors
- Author
-
Wei-Lun Tseng, Shang-Ping Ying, and Bing-Mau Chen
- Subjects
Materials science ,business.industry ,Photovoltaic system ,Phosphor ,Solar energy ,medicine.disease_cause ,Engineering physics ,Electronic, Optical and Magnetic Materials ,Electricity generation ,Quantum dot ,medicine ,Electrical and Electronic Engineering ,Thin film ,business ,Absorption (electromagnetic radiation) ,Ultraviolet - Abstract
Because of the predicted shortage of fossil fuels in the future, public interest in utilizing solar energy for photovoltaic (PV) electricity has exponentially increased in recent years. In particular, interest in the building integration of PVs is growing worldwide, and the use of building-integrated PVs (BIPVs) is one of the fastest growing segments of the PV industry. Luminescent solar concentrators (LSCs) are one of the possible approaches for BIPVs. However, the high cost and poor stability of the dyes or quantum dots used in conventional LSCs prevent the widespread adoption of electricity generation through the LSC-based solar energy. Therefore, inorganic phosphors with long lifetime and photostability under ultraviolet (UV) excitation and moisture are favorable luminescent materials for LSCs. In this paper, thin-film LSCs using commercial inorganic phosphors are proposed. The thin-film LSCs with different inorganic phosphors were examined. The phosphor concentration and relative position of the thin phosphor layer were investigated to determine the suitable structure of a thin-film LSC. This paper aimed to achieve an understanding of thin-film LSCs by using inorganic phosphors and to provide useful guidelines for future commercialization.
- Published
- 2019
40. Scalable Modeling of Transient Self-Heating of GaN High-Electron-Mobility Transistors Based on Experimental Measurements
- Author
-
Ali Soltani, Meriem Bouchilaoun, Samuel Graham, Georges Pavlidis, Hassan Maher, Christophe Rodriguez, Adrien Cutivet, Bilal Hassan, Francois Boone, Laboratoire Nanotechnologies Nanosystèmes (LN2 ), Université Grenoble Alpes [2016-2019] (UGA [2016-2019])-École Centrale de Lyon (ECL), Université de Lyon-Université de Lyon-Institut National des Sciences Appliquées de Lyon (INSA Lyon), Université de Lyon-Institut National des Sciences Appliquées (INSA)-Institut National des Sciences Appliquées (INSA)-Université de Sherbrooke (UdeS)-École supérieure de Chimie Physique Electronique de Lyon (CPE)-Centre National de la Recherche Scientifique (CNRS), Institut Interdisciplinaire d'Innovation Technologique [Sherbrooke] (3IT), Université de Sherbrooke (UdeS), Institut d’Électronique, de Microélectronique et de Nanotechnologie - UMR 8520 (IEMN), Centrale Lille-Institut supérieur de l'électronique et du numérique (ISEN)-Université de Valenciennes et du Hainaut-Cambrésis (UVHC)-Université de Lille-Centre National de la Recherche Scientifique (CNRS)-Université Polytechnique Hauts-de-France (UPHF), Puissance - IEMN (PUISSANCE - IEMN), Centrale Lille-Institut supérieur de l'électronique et du numérique (ISEN)-Université de Valenciennes et du Hainaut-Cambrésis (UVHC)-Université de Lille-Centre National de la Recherche Scientifique (CNRS)-Université Polytechnique Hauts-de-France (UPHF)-Centrale Lille-Institut supérieur de l'électronique et du numérique (ISEN)-Université de Valenciennes et du Hainaut-Cambrésis (UVHC)-Université de Lille-Centre National de la Recherche Scientifique (CNRS)-Université Polytechnique Hauts-de-France (UPHF), OMMIC, Université de Sherbrooke (UdeS)-École Centrale de Lyon (ECL), Université de Lyon-Université de Lyon-École Supérieure de Chimie Physique Électronique de Lyon (CPE)-Institut National des Sciences Appliquées de Lyon (INSA Lyon), Université de Lyon-Institut National des Sciences Appliquées (INSA)-Institut National des Sciences Appliquées (INSA)-Centre National de la Recherche Scientifique (CNRS)-Université Grenoble Alpes [2016-2019] (UGA [2016-2019]), Optoélectronique - IEMN (OPTO - IEMN), and This work was supported in part by the Fonds quèbècois de la recherche sur la nature et les technologies (FRQNT) and in part by the Natural Sciences and Engineering Research Council of Canada (NSERC). The review of this paper was arranged by Editor R. Venkatasubramanian
- Subjects
Materials science ,Thermal resistance ,Gallium nitride ,High-electron-mobility transistor ,01 natural sciences ,Temperature measurement ,law.invention ,[SPI]Engineering Sciences [physics] ,chemistry.chemical_compound ,gate resistance thermometry (GRT) ,law ,0103 physical sciences ,Thermal ,Electrical and Electronic Engineering ,ComputingMilieux_MISCELLANEOUS ,010302 applied physics ,high-electron-mobilitytransistors (HEMTs) ,business.industry ,Transistor ,modeling ,Electronic, Optical and Magnetic Materials ,chemistry ,Gallium nitride (GaN) ,Logic gate ,Optoelectronics ,thermoreflectance ,Transient (oscillation) ,business ,transient temperature measurement - Abstract
International audience; Abstract:This paper details an extraction procedure to fully model the transient self-heating of transistors from a GaN HEMT technology. Frequency-resolved gate resistance thermometry (f-GRT) is used to extract the thermal impedance of HEMTs with various gate widths. A fully scalable analytical model is developed from the experimental results. In the second stage, transient thermoreflectance imaging (TTI) is used to bring deeper insights into the HEMTs' temperature distribution by individually extracting the transient self-heating of each finger. TTI results are further used to successfully validate the f-GRT results and the modeling of the thermal impedance. Overall, f-GRT is demonstrated to be a fast and robust method for characterizing the transient thermal characteristics of a GaN HEMT. For the first time to the authors' knowledge, a scalable model of the thermal impedance is extracted fully from experimental results.
- Published
- 2019
41. Influence of Humidity on the Performance of Composite Polymer Electrolyte-Gated Field-Effect Transistors and Circuits
- Author
-
Ben Breitung, Subho Dasgupta, Falk von Seggern, Mehdi B. Tahoori, Jasmin Aghassi-Hagmann, Gabriel Cadilha Marques, Simone Dehm, and Horst Hahn
- Subjects
010302 applied physics ,Materials science ,business.industry ,Transistor ,Electrolyte ,Conductivity ,01 natural sciences ,Electronic, Optical and Magnetic Materials ,law.invention ,law ,Printed electronics ,Logic gate ,0103 physical sciences ,Optoelectronics ,Field-effect transistor ,Electrical and Electronic Engineering ,business ,Low voltage ,Electronic circuit - Abstract
In the domain of printed electronics (PE), field-effect transistors (FETs) with an oxide semiconductor channel are very promising. In particular, the use of high gate-capacitance of the composite solid polymer electrolytes (CSPEs) as a gate-insulator ensures extremely low voltage requirements. Besides high gate capacitance, such CSPEs are proven to be easily printable, stable in air over wide temperature ranges, and possess high ion conductivity. These CSPEs can be sensitive to moisture, especially for high surface-to-volume ratio printed thin films. In this paper, we provide a comprehensive experimental study on the effect of humidity on CSPE-gated single transistors. At the circuit level, the performance of ring oscillators (ROs) has been compared for various humidity conditions. The experimental results of the electrolyte-gated FETs (EGFETs) demonstrate rather comparable currents between 30%–90% humidity levels. However, the shifted transistor parameters lead to a significant performance change of the RO frequency behavior. The study in this paper shows the need of an impermeable encapsulation for the CSPE-gated FETs to ensure identical performance at all humidity conditions.
- Published
- 2019
42. Small-Signal Compact Circuit Modeling of Group IV Material-Based Heterojunction Phototransistors for Optoelectronic Receivers
- Author
-
Harshvardhan Kumar, Rikmantra Basu, and Jyoti Gupta
- Subjects
010302 applied physics ,Materials science ,business.industry ,Detector ,Heterojunction ,01 natural sciences ,Noise (electronics) ,Electronic, Optical and Magnetic Materials ,Signal-to-noise ratio ,Parasitic capacitance ,Operating temperature ,0103 physical sciences ,Optoelectronics ,Equivalent circuit ,Electrical and Electronic Engineering ,business ,Voltage - Abstract
This paper presents an optoelectronics-based compact equivalent circuit model of an n-Ge/p-Ge1– x Sn x /n-Ge1– x Sn x heterojunction phototransistor (HPT). This paper includes the static electrical and optical characteristics of the device, Gummel characteristics, effect of temperature, and overall noise analysis of HPT based on various parametric variations. We then investigate the effect of parasitic capacitance on the noise performance of the HPT. The estimated results show that the signal-to-noise ratio (SNR) is strongly dependent on not only the operating frequency but also the operating temperature and applied base-bias voltage. Estimated performance shows that SNR of HPT >90 dB up to 100 GHz and >80 dB up to 50 °C can be achieved, which ensured the operation of the device as high-speed and low-noise detector.
- Published
- 2019
43. High-Performance Organic Phototransistors With Vertical Structure Design
- Author
-
Guocheng Zhang, Tailiang Guo, Jianfeng Zhong, Qizhen Chen, Huipeng Chen, and Yujie Yan
- Subjects
010302 applied physics ,Materials science ,Dopant ,business.industry ,Exciton ,Doping ,Photoelectric effect ,01 natural sciences ,Electronic, Optical and Magnetic Materials ,Photodiode ,law.invention ,Responsivity ,Planar ,law ,Rise time ,0103 physical sciences ,Optoelectronics ,Electrical and Electronic Engineering ,business - Abstract
In this paper, a novel vertical phototransistor was reported and compared with planar phototransistors for the first time. As compared with the planar phototransistors, the vertical ones exhibited much better photoelectric performance, which is attributed to an ultrashort photo-generated holes transfer distance and a stronger excitons dissociating electrical field due to their ultrashort channel length (tens of nanometers). Moreover, in order to examine the transport and trapping of different carrier charges separately, the impact of [6,6]-phenyl C61-butyric acid methyl ester (PCBM) dopant on the performance of planar and vertical phototransistors was investigated. The vertical devices exhibited an ultrahigh responsivity (~6600 A/W) as well as an excellent detectivity ( $\sim 7\times 10^{15}~\text{Jones}$ ) and a fast photoresponse (rise time of 0.28 s), whereas slight changes were observed in the planar ones with doping of PCBM. The high performance of the blend vertical phototransistors is due to the trapping of the photo-generated electrons with PCBM and the effective transport of holes due to the ultrashort channel length. This paper provided a promising pathway for low-cost, high-performance phototransistors.
- Published
- 2019
44. Effects of Ultraviolet Light on the Dual-Sweep <tex-math notation='LaTeX'>$I$ </tex-math> – <tex-math notation='LaTeX'>$V$ </tex-math> Curve of a-InGaZnO4 Thin-Film Transistor
- Author
-
Hong-Yi Tu, Shengdong Zhang, Yu-Ching Tsao, Ting-Chang Chang, Yu-Lin Tsai, Jen-Wei Huang, Mao-Chou Tai, Shin-Ping Huang, and Hong-Chih Chen
- Subjects
010302 applied physics ,Materials science ,business.industry ,Transistor ,medicine.disease_cause ,01 natural sciences ,Electronic, Optical and Magnetic Materials ,law.invention ,Amorphous solid ,Threshold voltage ,Thin-film transistor ,law ,Logic gate ,0103 physical sciences ,Electrode ,medicine ,Ultraviolet light ,Optoelectronics ,Electrical and Electronic Engineering ,business ,Ultraviolet - Abstract
The instability of amorphous indium–gallium–zinc oxide (a-IGZO) thin-film transistors (TFTs) under ultraviolet (UV) light was thoroughly investigated in this paper. Unlike in a darkened state, an off-state leakage current can be found in the dual-sweep I–V transfer curve of a-IGZO TFTs under UV light illumination. Furthermore, despite the same UV light condition, the forward sweep and reverse sweep show different I–V curves, representing two different physical mechanisms. First, the subthreshold swing degradation and threshold voltage shift to the negative direction in the forward sweep are due to the total channel barrier lowering and can be confirmed by changing the light exposure region. Second, in the reverse sweep, the suggested back-channel leakage current can be controlled by dual-gate TFTs. UV light exposure of the metal–insulator–semiconductor–metal structure verifies that the off-state leakage current passes through the back channel in a reverse sweep. Finally, the physical mechanism links between forward and reverse sweeps have comprehensive interpretation in this paper.
- Published
- 2019
45. 43- and 50-Mp High-Performance Interline CCD Image Sensors
- Author
-
Eric G. Stevens, Ryan Kather, Joseph Summa, Peter Mersich, John McCarten, James E. Doran, Douglas A. Carpenter, Shen Wang, Eric J. Meisenzahl, Robert P. Fabinski, Tom Frank, Stephen L. Kosman, Brian Tobey, Cristian Tivarus, Richard Brolly, Alden Lum, and Adam DeJager
- Subjects
010302 applied physics ,Pixel ,business.industry ,Machine vision ,Image quality ,Computer science ,ComputingMethodologies_IMAGEPROCESSINGANDCOMPUTERVISION ,Electrical engineering ,Large format ,01 natural sciences ,Aspect ratio (image) ,Electronic, Optical and Magnetic Materials ,Optical format ,0103 physical sciences ,Electrical and Electronic Engineering ,Image sensor ,business ,Image resolution - Abstract
This paper describes the design and performance of two new high-resolution interline charge-coupled device image sensors for use in industrial, machine vision, and aerial photography applications. These sensors feature 4.5- $\mu \text{m}$ pixels, 4 outputs, fast dump gate, horizontal lateral overflow drain, and vertical electronic shutter. The 43-Mp sensor has a 35-mm optical format and the 50-Mp sensor has a larger format with a 2.175:1 aspect ratio that matches many modern mobile phone displays. This paper discusses the challenges and solutions to manufacture such large sensors with superior image quality such as uniformity, read noise, dark current, smear, transfer gate blooming, lag, and so on.
- Published
- 2019
46. An Analytical Model for the Electrical Characteristics of Passivated Carrier- Selective Contact (CSC) Solar Cell
- Author
-
Kunal Ghosh, Saurabh Lodha, Anil Kottantharayil, and Astha Tyagi
- Subjects
010302 applied physics ,Amorphous silicon ,Materials science ,Passivation ,Computer simulation ,Silicon ,business.industry ,Doping ,chemistry.chemical_element ,01 natural sciences ,Electronic, Optical and Magnetic Materials ,law.invention ,chemistry.chemical_compound ,chemistry ,law ,0103 physical sciences ,Solar cell ,Optoelectronics ,Crystalline silicon ,Electrical and Electronic Engineering ,Poisson's equation ,business - Abstract
In this paper, we have developed a physics-based analytical model for the electrical characteristics of passivated silicon carrier-selective contact (CSC) solar cells and validated it with numerical simulations. The model comprises analytical solutions of: 1) the Poisson equation, accurately capturing the level of inversion and accumulation at the crystalline silicon (c-Si) layer interfaces, and 2) the recombination current capturing the various recombination mechanisms at work in the solar cell. The calculations establish that CSC solar cells have the potential to achieve an efficiency greater than 26% even when both c-Si interfaces have realistic SRV values of 100 cm/s. The model helps illustrate the physics underlying the performance of CSC solar cells for variation in key device parameters such as surface recombination velocities, bulk lifetime, contact layer doping, and amorphous silicon (a-Si) thickness amongst others. By circumventing the need for resource-intensive numerical simulations, the analytical model described in this paper can assist in the design and development of high-performance CSC solar cells.
- Published
- 2019
47. A Self-Rectifying Resistive Switching Device Based on HfO2/TaO <tex-math notation='LaTeX'>$_{{x}}$ </tex-math> Bilayer Structure
- Author
-
Zhang Kaiping, Peng Yuan, Haili Ma, Xiaoxin Xu, Hangbing Lv, Jie Feng, Xumeng Zhang, Facai Wu, Tiancheng Gong, Yu Liu, Shengjie Zhao, Ming Liu, Lu Cheng, Qing Luo, and Zhang Peiwen
- Subjects
010302 applied physics ,Imagination ,Materials science ,Chemical substance ,business.industry ,media_common.quotation_subject ,Bilayer ,Dielectric ,Trapping ,01 natural sciences ,Electronic, Optical and Magnetic Materials ,Resistive random-access memory ,Search engine ,0103 physical sciences ,Optoelectronics ,Electrical and Electronic Engineering ,Science, technology and society ,business ,media_common - Abstract
To effectively solve the crosstalk issue in high-density crossbar array (CBA), high rectifying characteristics should be introduced in the resistance random-access memory (ReRAM) device, and in-depth understanding of the affecting factors on rectifying properties is essential for the large-scale application of ReRAM. In this paper, a high-performance self-rectifying device with CMOS compatible Pd/HfO2/TaO x /Ta structure was demonstrated in a 1-kb CBA. Forming-free, self-compliance, and high uniformity characteristics were successfully achieved. By modulating the thickness of the HfO2 rectifying layer, the rectifying ratio of device could be achieved as high as $\sim 2\times 10^{\textsf {3}}$ under ±3 V at low-resistance state (LRS). It was also experimentally confirmed that the selected unit cell in high-resistance state (logically the “ OFF” state) was stably readable when it was surrounded by unselected LRS (logically the “ ON” state) cells, in an array of up to $32 \times 32$ cells. Furthermore, a model based on interfacial barrier modulation and defects trapping/detrapping was proposed to elucidate the impact of the dielectric thickness on the self-rectifying characteristics of the device. The results presented in this paper provide a great potential for selector-free high-density memory applications.
- Published
- 2019
48. Static Random Access Memory Characteristics of Single-Gated Feedback Field-Effect Transistors
- Author
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Kyungah Cho, Sola Woo, Jinsun Cho, Doohyeok Lim, and Sangsig Kim
- Subjects
010302 applied physics ,Hardware_MEMORYSTRUCTURES ,business.industry ,Computer science ,Transistor ,Electrical engineering ,01 natural sciences ,Electronic, Optical and Magnetic Materials ,law.invention ,Memory management ,law ,Logic gate ,0103 physical sciences ,MOSFET ,Array data structure ,Field-effect transistor ,Static random-access memory ,Electrical and Electronic Engineering ,business ,Standby power - Abstract
In this paper, we propose a novel static random access memory (SRAM) unit cell design and its array structure consisting of single-gated feedback field-effect transistors (FBFETs). To verify the SRAM characteristics, the basic memory operations and write disturbances of the unit cell are investigated through the mixed-mode technology computer-aided design simulations. The unit cell exhibits the superior SRAM characteristics including a write speed of 0.6 ns, a fast read-out speed of ~0.1 ns, and a retention time of 3600 s. Furthermore, the unit cell design exhibits advantages in density, with a small cell area of 8F2, and in the power consumption; the standby power consumption is 0.24 nW/bit for holding “1” and negligible for holding “0.” Moreover, our SRAM array shows reliable ${3} \times {3}$ array operations without any disturbances. This paper demonstrates the promising potential of the FBFET SRAM for high-performance, high-density, and low-power memory applications.
- Published
- 2019
49. Part II: Proposals to Independently Engineer Donor and Acceptor Trap Concentrations in GaN Buffer for Ultrahigh Breakdown AlGaN/GaN HEMTs
- Author
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Shree Prakash Tiwari, Mayank Shrivastava, and Vipin Joshi
- Subjects
010302 applied physics ,Materials science ,Silicon ,business.industry ,Doping ,Wide-bandgap semiconductor ,chemistry.chemical_element ,Gallium nitride ,High-electron-mobility transistor ,01 natural sciences ,Acceptor ,Avalanche breakdown ,Electronic, Optical and Magnetic Materials ,chemistry.chemical_compound ,chemistry ,0103 physical sciences ,Breakdown voltage ,Optoelectronics ,Electrical and Electronic Engineering ,business - Abstract
In part I of this paper, we developed physical insights into the role and impact of acceptor and donor traps—resulting from C-doping in GaN buffer—on avalanche breakdown in AlGaN/GaN HEMT devices. It was found that the donor traps are mandatory to explain the breakdown voltage improvement. In this paper, silicon doping is proposed and explored as an alternative to independently engineer donor trap concentration and profile. Keeping in mind the acceptor and donor trap relative concentration requirement for achieving higher breakdown buffer, as depicted in part I of this paper, silicon & carbon codoping of GaN buffer is proposed and explored in this paper. The proposed improvement in breakdown voltage is supported by physical insight into the avalanche phenomena and role of acceptor/donor traps. GaN buffer design parameters and their impact on breakdown voltage as well as leakage current are presented. Finally, a modified Si-doping profile in the GaN buffer is proposed to lower the C-doping concentration near GaN channel to mitigate the adverse effects of acceptor traps in GaN buffer.
- Published
- 2019
50. ASM GaN: Industry Standard Model for GaN RF and Power Devices—Part-II: Modeling of Charge Trapping
- Author
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Sayed Ali Albahrani, Yogesh Singh Chauhan, Dhawal Mahajan, Jason Hodges, and Sourabh Khandelwal
- Subjects
010302 applied physics ,Materials science ,business.industry ,Spice ,Gallium nitride ,Ranging ,Trapping ,High-electron-mobility transistor ,01 natural sciences ,Electronic, Optical and Magnetic Materials ,chemistry.chemical_compound ,chemistry ,Logic gate ,0103 physical sciences ,Optoelectronics ,Power semiconductor device ,Electrical and Electronic Engineering ,business ,Voltage - Abstract
Because of charge trapping in GaN HEMTs, dc characteristics of these devices are not representative of high-frequency operation. The advanced spice model GaN model presented in Part I of this paper is combined with a Shockley–Reed–Hall-based trap model, yielding a comprehensive FET model for GaN HEMTs which can accurately model GaN devices exhibiting trapping-related dispersion effects. Measurement results of the dc and pulsed output and transfer characteristics of a commercially available GaN HEMT are presented, trapping in the device is modeled, and excellent fit to the measured data is shown. This paper presents an accurate model of trapping which is validated for eight different quiescent bias points of pulse measurements, with quiescent drain voltage ranging from 5 to 20 V and quiescent gate voltage ranging from −2.8 to −3.8 V, and a large range of gate and drain voltages to which the device was pulsed in the pulse measurements and at which the device was measured in the dc measurements, with gate voltage ranging from −4 to 0.4 V and drain voltage ranging from 0 to 40 V. This paper also presents high-frequency (10 GHz) large-signal RF validation of the model for optimal complex load condition.
- Published
- 2019
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