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The parasitic effect inside through-silicon via (TSV) packaging under radio frequency (RF) operation may cause abnormal signals in circuit performance. On the bases of a self-developed deembedding technique, we investigated the high-frequency characteristics of a typical TSV structure through direct measurements. To this end, a silicon substrate layout was first designed and constructed, followed by packaging mounting to build a suitable setting for RF measurements. Behaviors up to 3 GHz on different circuit segments in an actual TSV packaging were then measured directly by using an RF-inductance, capacitance, and resistance (LCR) meter, and R, L, and impedance (Z) data for test structures were then extracted and compared with those reported in the literature. To study the environmental effect on the RF properties of the TSV test samples, we monitored behaviors during a temperature-humidity reliability test.

The contact resistance of microbumps in a plastic ball grid array packaging with a through-silicon-via (TSV) structure was characterized. Accordingly, a self-designed TSV daisy-chain circuit was proposed to facilitate the formulation of the measurement paths, and the test samples were made by using a commercialized packaging process to simulate real product behaviors. Using the proposed single model and the complete model for the testing structure, about 25 $\text{m}\Omega $ was measured as the average contact resistance per microbump, and the contact resistance for each microbump was separately extracted between 4 and 60 $\text{m}\Omega $ In addition, decreasing contact resistance due to the annealing effect was observed from two different reliability tests.

Through silicon via (TSV) is the key technology used in 2.5-D and 3-D packaging. Evaluating the reliability of products using this new technology has been challenging because of complex environmental factors. The aim of this paper was to design and implement a systematic reliability experiment to test self-designed TSV samples under the combinations of several different environmental variables. The Weibull distribution model was used to extract parameters from the experimental data for the statistical evaluation of TSV reliability. After analyzing the Weibull parameters, the environmental stresses that accelerate TSV unreliability were identified and compared, and a simple empirical unreliability equation was proposed. In addition, we observed that using a power law was an effective mean on making TSV reliability curve fittings. Failure analyses by optical microscopy, scanning electron microscopy, and energy dispersive spectrometer were finally reported.

Because of the coefficient of thermal expansion and the hygroscopic swelling mismatches on plastic packaging materials, stress and reliability issues on microelectronic packaging structures are extremely important for the packaging industry. Through the self-design test chips with the piezoresistive microstress sensors, this paper presents the experimental methodologies for stress and reliability monitoring on typical plastic ball-grid-array packaging. To this end, coefficients of the sensors are first calibrated, and stress monitoring is next performed with simultaneously thermal and hygroscopic loadings under steady-state and cyclic environments, respectively. The Weibull reliability model is next applied based on the experimental data and the parameters of the model are extracted. After real-time monitoring on stress variations during the reliability test, about 0.8 MPa of stress decrease is measured on each reliability cycle.