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To increase the density of magnetoresistive random access memory (MRAM) beyond the 1T1MTJ MRAM cell in use today, the design space for 1S1MTJ MRAM array is analyzed by cooptimizing both selectors and MTJs. Current low-resistance MTJs for 1T1MTJ MRAM are not suitable for 1S1MTJ MRAM. Threshold-type selectors would induce a strong read disturb on the MTJ due to the snapback voltage ( ${V}_{\mathrm {TH}}$ – ${V}_{\mathrm {HOLD}}$ ) when the selector is turned on. Also, exponential-type selectors would degrade the read margin (RM) due to its large ON-state resistance. When using existing selectors to achieve a 1-M-bit 1S1MTJ array, it is necessary to adjust the product of resistance and area (RA) and the diameter of the MTJ. An MTJ with the RA $= 15\,\,\Omega \cdot \mu \text{m}^{2}$ and the diameter = 50 nm can meet the criterion of RM > 10% for both exponential-type selectors (exponential slope = 300–500 mV/decade with the current density ~ 1 MA/cm2) and threshold-type selectors ( ${V}_{\mathrm {TH}}$ – ${V}_{\mathrm {HOLD}} \sim ~250$ mV). A design space accommodating a selector variation of around 1% can be found for MTJs with tunnel magnetoresistance ratio (TMR) < 250%. With an increased TMR of 250%–350% of the MTJ, the tolerance of variations for exponential-type selectors and threshold-type selectors can be improved to 2% and 4%, respectively. This provides a chance for the 1S1MTJ MRAM with existing selectors.

In this paper, we thoroughly demonstrate the reliability of reflow qualified embedded S TT - MRAM integrated on 22nm technology. We show that STT-MRAM is capable of 1E5 endurance cycles across temperature (-40, 25 and 125°C) with extremely low fail bit rates (mean 0.04 ppm for −40°C) and can pass 1M cycle endurance using an enhanced process. Bit error rates (BERs) post three cycles of solder reflow at 260°C are below 1 ppm for both parallel (P) and anti-parallel (AP) storage states. Due to the associated high energy barrier for flipping states, chips can meet a very high retention lifetime spec (>200°C at 10yrs, BER 1 ppm) with a large margin. The balance of retention performance between the two states can be adjusted in an optimized process. In addition, we investigate the impact of magnetic field applied at tilted angles and report standby magnetic field immunity can reach 600 Oe at 125°C for 10 years for fields tilted 60 degrees from parallel to the die surface. Magnetic shields are demonstrated to sustain data exposed to perpendicular fields up to 3.5k Oe at 25°C for 100 hours.

MRAM can play a variety of on-chip memory roles in advanced VLSI technology spanning from high retention, solder-reflow-capable non-volatile memory (NVM) to dense non-volatile or high retention working RAMs. This paper describes results for a solder-reflow-capable MRAM NVM and for extensions that trade off high retention against speed, power, and density.

External magnetic field resistance under write, read operations for perpendicular STT-MRAM qualified for 260°C solder reflow is comprehensively reported for the first time. We show that the most critical polarization direction is writing from parallel to anti-parallel state with external field opposed to both the final free layer direction and the bottom pinned layer direction. It is also found that free layer failure to switch is the major cause rather than unexpected pinned layer flipping. Furthermore, various key factors including temperature, write condition and MTJ film stack are also studied here. Finally, we demonstrate that a low chip failure rate of 0.001 ppm can be achieved with an ECC scheme for external magnetic fields up to 240 Oe at 85°C.

Spin-torque Magnetoresistive Random Access Memory (ST-MRAM) is the subject of intense investigation since it extends MRAM technology to densities beyond those achieved with the earlier field-switched MRAM technology. This paper reviews recent developments in ST-MRAM MTJ device technology, including exciting progress in scaling MTJs down to dimensions approaching 20 nm. Fabrication issues relevant to development of ST-MRAM, including its integration with CMOS back-end-of-line (BEOL) processing, are also briefly discussed.

Successful implementation of on-chip power conversion using ferromagnetic inductors requires both high power efficiency and high power density. The theoretical limits to power density and efficiency possible with thin film ferromagnetic inductors in a buck converter topology with and without coupling are explored. Power density can be related to energy density of the inductor, while efficiency can be related to Q and the DC resistance loss of the inductor. To achieve 100 A/cm2 for a 100 MHz 2:1 V converter with a 90% inductor efficiency, a peak Q of more than 8 is required with an energy storage of more than 5 nJ/mm2. Using coupling, the power density can be further increased, but is ultimately limited by DC resistance loss in the coils. Figures of merit (FOM) for comparing inductors of various designs are also discussed.

Thin-film ferromagnetic inductors show great potential as the energy storage element for integrated circuits containing on-chip power management. In order to achieve the high energy storage required for power management, on-chip inductors require relatively thick magnetic yoke materials ({greater than or equal to} a micron). The first part of this paper includes a review of on-chip inductors with magnetic materials from earlier studies. The second part describes the fabrication and characterization of a magnetic inductor on a silicon interposer at IBM. These inductors contained a variety of yoke geometries, included single-turn and multi-turn coils, and were fabricated on 200mm silicon wafers in a CMOS back-end-of-line (BEOL) facility. Each inductor consisted of electroplated copper coils enclosed by electroplated Ni45Fe55 yokes. Aspects of the fabrication of the inductors are described, along with the magnetic properties of the electroplated yoke material and inductor performance.

An integrated voltage regulator (IVR) is presented that uses custom fabricated thin-film magnetic power inductors. The inductors are fabricated on a silicon interposer and integrated with a multi-phase buck converter IC by 2.5D chip stacking. Several inductor design variations have been fabricated and tested. The best performance has been achieved with a set of eight coupled inductors that each occupies 0.245 mm2 and provides 12.5 nH with 270 mΩ DC. With early inductor prototypes, the IVR efficiency for a 1.8 V:1.0 V conversion ratio peaks at 71% with FEOL current density of 10.8 A/mm2 and inductor current density of 1.53 A/mm2. At maximum load current, 69% conversion efficiency and 1.8 V:1.2 V conversion ratio the FEOL current density reaches 22.6 A/mm2 and inductor current density reaches 3.21 A/mm2.

A comprehensive reliability analysis of perpendicular Spin-Transfer-Torque Magnetic Random Access Memory (pSTT-MRAM) is demonstrated that pSTT-MRAM is capable of fast write, more than 107 cycles endurance, less than 10−20 read disturb error rate at 125°C, and 10 years data retention up to 225°C at chip level. Furthermore, we prove for the first time that pSTT-MRAM technology can withstand reflow soldering at 260°C, thus enabling the opportunity for embedded nonvolatile memories in consumer and automotive Microcontrollers (MCUs) applications.

Saturation in thin film coupled magnetic inductors was measured as a function of dc current in both windings. A simple mathematical model was created to approximate the inductor saturation level in the presence of the two currents. The model was compared both to FEM calculations of saturation in a linear model and to the experimental findings. Using the mathematical model, an expression for the maximum dc current and maximum flux levels in the yokes was derived for a two phase coupled buck converter, as a function of coupling.

Key design parameters of 64 Mb STT-MRAM at 90-nm technology node are discussed. A design point was developed with adequate TMR for fast read operation, enough energy barrier for data retention and against read disturbs, a write voltage satisfying the long term reliability against dielectric breakdown and a write bit error rate below 10-9. A direct experimental method was developed to determine the data retention lifetime that avoids the discrepancy in the energy barrier values obtained with spin current- and field-driven switching measurements. Other parameters detrimental to write margins such as backhopping and the existence of a low breakdown population are discussed. At low bit-error regime, new phenomenon emerges, suggestive of a bifurcation of switching modes. The dependence of the bifurcated switching threshold on write pulse width, operating temperature, junction dimensions and external field were studied. These show bifurcated switching to be strongly influenced by thermal fluctuation related to the spatially inhomogeneous free layer magnetization. An external field along easy axis direction assisting switching was shown to be effective for significantly reducing the percentage of MTJs showing bifurcated switching.

Phosphorylated fructose compounds have been reported to lessen neuronal injury in in vitro models of hypoxia and in vivo models of ischemia. Although a variety of mechanisms have been proposed to account for this finding, it is unknown if intracellular uptake and incorporation of these compounds into the glycolytic pathway contribute to the benefit. We evaluated phosphorylated fructose administration in an adult rat model of transient, near-complete cerebral ischemia to determine its impact on brain metabolism before, during, and after ischemia. Fifty-four pentobarbital anesthetized rats were randomly assigned to receive IV infusions of either fructose-1,6-bisphosphate, fructose-2,6-bisphosphate, or 0.9% saline. After 2 hours of infusion, 18 rats (6/treatment group) were subjected to brain harvesting before any ischemia, 18 additional rats had brain harvesting at the completion of 10 minutes of forebrain ischemia (2-vessel occlusion plus induced hypotension), and 18 rats had harvesting after ischemia and 15 minutes of reperfusion. Cortical brain samples were analyzed for ATP, ADP, AMP, phosphocreatine, glucose, and glycogen. When compared with placebo, neither phosphorylated fructose compound altered preischemic, intraischemic, or postischemic concentrations of brain high-energy phosphates, glucose, glycogen, or lactate, nor did they influence the intraischemic metabolism of endogenous brain glucose or glycogen. On the basis of these results, we conclude that mechanisms other than augmented carbohydrate metabolism are responsible for previous reports of neuronal protection by the bisphosphonates.

Anecdotal and documented reports from both patients and doctors have described unanticipated breaks in connections between implanted catheters and drug pumps. In extreme cases, such disconnections in patient-required therapies could result in either withdrawal symptoms or possible deaths. Patients typically attribute such device failures to falls or impacts associated with vigorous physical activity; subsequent failure analyses most often have indicated pump connector uncouplings. We fabricated a facsimile of the Medtronic®SynchroMed® II pump that included both an accelerometer and a force sensor. The force sensor measured forces imparted on the pump connector via the attached catheter and surrounding tissues. The test pump was implanted in the lower left abdominal areas of porcine cadavers in various orientations. Wire-reinforced catheters were tunneled for 20–25cm under the abdominal epidermis, anteriorly toward the head, and the non-connector pump ends were secured by sutures. Following each simulated implant, the cadaver specimens were loaded into a harness and hoisted to a height where either their buttocks or backs were 80–86cm above the floor, simulating a worst-case scenario in which a patient might have fallen down a flight of stairs or off a step stool. The cadavers were then quick released from the hoist attachment, while forces (X, Y, and Z) and accelerations (X, Y, and Z) versus time were simultaneously recorded. Six porcine cadaver specimens were utilized for a total of 72 trials. Subsequent Monte Carlo analyses allowed us to model the variation in stress imparted onto the pump connectors and the estimated variation of the pump connector strength, as a means of predicting required connector retention impact specification for future designs. The recorded forces applied onto the connectors, including data from all three connector axes (X, Y, and Z), were typically within the range of 4.5–9N. However, in several trials, applied forces ranged as high as 30–49N. Monte Carlo modeling provided a maximum resultant load specification of 100.4N for a 0.033msec duration. Based on this value, due to predicted impact events, subsequent failures of future designs would be estimated at 7ppm. Based on our data, a new design requirement has been generated to ensure that implantable drug pump connector assemblies will, in high probability, perform their intended functions.

This paper presents a three-dimensional (3D) fully integrated high-speed multiphase voltage regulator. A complete switched-inductor regulator is integrated with a four-plane NoC in a two-high chip stack combining integrated magnetics, through-silicon vias (TSVs), and 45-nm SOI CMOS devices. Quasi-V2 hysteretic control is implemented over eight injection-locked fixed-frequency phases to achieve fast response, steady-state regulation, and fixed switching frequency. Peak efficiency of 82% for conversion from 1.66 V to 0.83 V is observed at a 150 MHz per-phase switching frequency. This is the first demonstration of high-speed voltage regulation using on-chip magnetic-core inductors in a 3D stack and achieves sub-μs dynamic supply voltage scaling for high-density embedded processing applications.

MRAM (magnetic random access memory) technology, based on the use of magnetic tunnel junctions (MTJs) as memory elements, is a potentially fast nonvolatile memory technology with very high write endurance. This paper is an overview of MRAM design considerations. Topics covered include MRAM fundamentals, array architecture, several associated design studies, and scaling challenges. In addition, a 16-Mb MRAM demonstration vehicle is described, and performance results are presented.

The implementation of magnetic random access memory (MRAM) hinges on complex magnetic film stacks and several critical steps in back-end-of-line (BEOL) processing. Although intended for use in conjunction with silicon CMOS front-end device drivers, MRAM performance is not limited by CMOS technology. We report here on a novel test site design and an associated thin-film process integration scheme which permit relatively inexpensive, rapid characterization of the critical elements in MRAM device fabrication. The test site design incorporates circuitry consistent with the use of a large-area planar base electrode to enable a processing scheme with only two photomask levels. The thin-film process integration scheme is a modification of standard BEOL processing to accommodate temperature-sensitive magnetic tunnel junctions (MTJs) and poor-shear-strength magnetic film interfaces. Completed test site wafers are testable with high-speed probing techniques, permitting characterization of large numbers of MTJs for statistically significant analyses. The approach described in this paper provides an inexpensive means for rapidly iterating on MRAM development alternatives to converage on an implementation suitable for a production environment.

This paper reviews the remarkable developments of the magnetic tunnel junction over the last decade and in particular, work aimed at demonstrating its potential for a dense, fast, and nonvolatile random access memory. The initial focus is on the technological roots of the magnetic tunnel junction, and then on the recent progress made with engineered materials for this device. Following that, we discuss the development of the magnetic random access memory (MRAM) technology, in which the magnetic tunnel junction serves as both the storage device and the storage sensing device. The emphasis is on work at IBM, including demonstrations of basic capabilities of the technology and work on a 16-Mb "product demonstrator" design in 180-nm node technology, which was targeted to be a realistic test bed for the MRAM technology. Performance and cost are compared with those of competing technologies. The paper also serves as an introduction to more specialized papers in this issue on MRAM device physics, magnetic tunnel junction materials and device characterization, MRAM processing, and MRAM design.

A 16-Mb magnetic random access memory (MRAM) is demonstrated in 0.18-/spl mu/m three-Cu-level CMOS with a three-level MRAM process adder. The chip, the highest density MRAM reported to date, utilizes a 1.42/spl mu/m/sup 2/ 1-transistor 1-magnetic tunnel junction (1T1MTJ) cell, measures 79 mm/sup 2/ and features a /spl times/16 asynchronous SRAM-like interface. The paper describes the cell, architecture, and circuit techniques unique to multi-Mb MRAM design, including a novel bootstrapped write driver circuit. Hardware results are presented.

Background Isolated mammalian hearts have been used in numerous studies that have led to many important discoveries in cardiac physiology, pharmacology, and surgery. Multiple methods of perfusion have been described including retrograde and/or antegrade flows and crystalloid or blood perfusates. Furthermore, multiple species have been utilized for such studies including the following: rat, rabbit, guinea pig, canine, and swine. The objective of this study was to describe a unique isolated heart preparation, utilizing human hearts not viable for transplant, which allows for physiologic perfusion and endocardial imaging. Methods Utilizing standard cardiac transplantation procedures, 12 human hearts deemed not viable for transplant were explanted to an isolated heart apparatus. A clear, modified Krebs-Henseleit buffer was used as a blood substitute, which allowed for endocardial imaging utilizing 6.0 mm endoscopic video cameras inserted into the cardiac chambers. The hearts were perfused in Langendorff (retrograde) and/or working (physiologic) mode. Results Eleven of 12 hearts achieved the following performance in working mode: peak left ventricular pressure of 21.5 to 75.8 mm Hg, with an average of 42.7 ± 19.9 mm Hg. Intracardiac anatomical imaging was possible in all hearts, providing unique views of normal and pathological endocardial anatomy as well as biomedical device-heart interactions. Conclusions We have described a unique isolated heart preparation with which we have successfully reanimated 11 human hearts deemed not viable for transplant, perfused them by working mode, and performed intracardiac anatomical imaging. This approach provides a novel means for obtaining images of functional human cardiac anatomy and various types of unique biomedical assessments.

A 128-kb magnetic random access memory (MRAM) test chip has been fabricated utilizing, for the first time, a 0.18-/spl mu/m V/sub DD/=1.8 V logic process technology with Cu metallization. The presented design uses a 1.4-/spl mu/m/sup 2/ one-transistor/one-magnetic tunnel junction (1T1MTJ) cell and features a symmetrical high-speed sensing architecture using complementary reference cells and configurable load devices. Extrapolations from test chip measurements and circuit assessments predict a 5-ns random array read access time and random write operations with

We present results of magnetization and magnetic anisotropy measurements in thin magnetic films of the alloys Ni81Fe19; Co90Fe10 and Ni65Fe15Co20 that are commonly used in magnetoelectronic devices. The films were sandwiched between layers of Ta. At room temperature the critical thickness for all the films to become ferromagnetic is in the range 11–13 ( A. In Co90Fe10 the coercivity and the anisotropy field both depend strongly on layer thickness.

With the promise of nonvolatility, practically infinite write endurance, and short read and write times, magnetic tunnel junction magnetic random access memory could become a future mainstream memory technology.

Air-core slab inductors with specially designed current return paths are proposed to achieve the ultra-high Q required for on-chip power delivery and management at >90% efficiency. Uniquely optimized for buck converter circuits, this CMOS-compatible structure avoids the challenges of thin-film magnetics. Q∼25–30 at 200–300MHz is experimentally demonstrated.

Background . Opioid receptor agonists are involved in ischemic preconditioning and natural hibernation. The aim of this study was to determine whether pretreatment with d-Ala2-Leu5-enkephalin or morphine confers cardioprotection in large mammalian hearts. We assessed myocardial functional recovery and global energy metabolism after ischemic cold storage. Methods . After pretreatment with d-Ala2-Leu5-enkephalin, morphine sulfate, or saline (n = 6 each), swine hearts were excised and stored for 75 minutes at 4°C, then reperfused in a four-chamber isolated working heart apparatus. Serial myocardial biopsies were performed to assess cellular energy metabolism. Results . Improved systolic (cardiac output, contractility) and diastolic (tau) left ventricular functions were observed in hearts pretreated with d-Ala2-Leu5-enkephalin or morphine. These benefits were not correlated with changes in high-energy phosphate levels. Cardiac enzyme leakage (creatine kinase, troponin-I) was similar among treated and control groups. Lactate efflux increased significantly in controls, but not in opioid-pretreated hearts ( p Conclusions . d-Ala2-Leu5-enkephalin and morphine pretreatments improve postischemic function after cold storage of swine hearts. Postischemic lactate reduction, but not high-energy phosphate levels, may account for the observed cardioprotective effects.

Background In the rat model of forebrain ischemia, long-term dexamethasone treatment is reported to cause hyperglycemia and worsen postischemic functional and histologic injury. This effect was assumed to result from glucose enhancement of intraischemic lactic acidosis within the brain. Short-term insulin therapy restored normoglycemia but did not return histologic injury completely to baseline values. Using a nonischemic rat model, the current study attempted to identify a metabolic basis for such outcome data. Methods Fifty-eight halothane-anesthetized (1.3% inspired) Sprague-Dawley rats were assigned randomly to be administered either no treatment (N = 18) or 2 mg/kg intraperitoneal dexamethasone (N = 40). The latter were administered dexamethasone 3 h before the study only (N = 8) or for 3 h before the study plus daily for 1 day (N = 8), 2 days (N = 8), or 4 days (N = 16). Of the rats treated with dexamethasone for 4 days, one half (N = 8) were administered an insulin-containing saline infusion subsequently to restore normoglycemia short-term. All other rats (N = 50) were administered an infusion of saline without insulin. Plasma glucose was quantified, and brains were excised after in situ freezing. Brain glucose and glycogen concentrations were measured using enzymatic fluorometric analyses. Results After 4 days of dexamethasone treatment, plasma glucose was 159% greater than in rats administered placebo (i.e., 22.01 +/- 4.66 vs. 8.51 +/- 1.65 micromol/ml; mean +/- SD; P < 0.0001). Brain glucose concentrations increased parallel to plasma glucose. An insulin infusion for 27 +/- 5 min restored normoglycemia but resulted in a brain-to-plasma glucose ratio that was 32% greater than baseline values (P < 0.01). Neither dexamethasone nor the combination of dexamethasone plus insulin affected brain glycogen concentrations. Conclusions In a nonischemic rat model, dexamethasone alone had no independent effect on the brain-to-plasma glucose ratio. However, short-term insulin therapy caused a dysequilibrium between plasma and brain glucose, resulting in an underestimation of brain glucose concentrations when normoglycemia was restored. The dysequilibrium likely was caused by the rapid rate of glucose reduction. The magnitude of the effect may account for the failure of insulin to reverse dexamethasone enhancement of neurologic injury completely in a previous report that used the rat model of forebrain ischemia.

We have observed low-frequency noise due to quasiequilibrium thermal magnetization fluctuations in micron-scale magnetic tunnel junctions (MTJs). This strongly field-dependent magnetic noise occurs within the magnetic hysteresis loops, either as $1/f$ or Lorentzian (random telegraph) noise. We attribute it to the thermally excited hopping of magnetic domain walls between pinning sites. Our results show that magnetic stability is a crucial factor in reducing the low-frequency noise in small MTJs.

Exchange biased magnetic tunnel junction (MTJ) structures are shown to have useful properties for forming magnetic memory storage elements in a novel cross-point architecture. MTJ elements have been developed which exhibit very large magnetoresistive (MR) values exceeding 40% at room temperature, with specific resistance values ranging down to as little as ∼60 Ω(μm)2, and with MR values enhanced by moderate thermal treatments. Large MR values are observed in magnetic elements with areas as small as 0.17 (μm)2. The magnetic field dependent current–voltage characteristics of an MTJ element integrated with a silicon diode are analyzed to extract the MR properties of the MTJ element itself.

We have measured and simulated the dynamics of magnetization reversal in 5 nm by 0.8 by 1.6 $\ensuremath{\mu}\mathrm{m}$ ${\mathrm{Ni}}_{60}{\mathrm{Fe}}_{40}$ thin films. The films measured form the upper electrode of a spin-polarized tunnel junction so that the magnetization direction of the film can be probed by measuring the tunneling resistance of the junction. When a magnetic field pulse is applied, the time to switch the film magnetization changes from greater than 10 ns to less than 500 ps as the pulse amplitude is increased from the coercive field to 10 mT and beyond. We have simulated these transitions using micromagnetic modeling of the exact experimental conditions. The simulations agree well with the experimental measurements.

We have investigated the response of the flux-locked output of several high-Tc SQUID magnetometers to small changes in temperature and for magnetic fields 0–30 μT. The temperature response DT≡dΦS/dT is observed to be linear in the applied magnetic field Ba and can be as large as 500 mΦ0/K where ΦS is the flux through the SQUID loop and Φ0 is the flux quantum. Our measurements can be explained using a simple model that takes into account the geometry of a given device and is based on the idea that DT is due to the temperature dependence of the superconducting penetration depth. Our results can be used to optimize device performance in applications where the noise of a device is dominated by ambient temperature fluctuations.

A number of materials related problems have hindered the development of a reproducible process for the fabrication of high-quality SQUIDs and magnetometers. In this paper we discuss the use of GdBa/sub 2/Cu/sub 3/O/sub 7/ and YBa/sub 2/Cu/sub 3/O/sub 7/ thin films for the fabrication of step-edge and bicrystal magnetometers and how materials selection can influence issues such as reproducibility, yield and noise performance. Magnetometers with noise performance as low as 63 fT//spl radic/Hz have been made with variations in junction parameters (I/sub c/ and R/sub n/) that are as low as 25% on-chip and 57% from chip-to-chip.

We have used a simple self-aligned process to fabricate magnetic tunnel junctions down to submicron sizes. Optical and electron-beam lithographies were used to cover a range of areas spanning five orders of magnitude. The bottom magnetic electrodes (Co or permalloy) in our junctions were exchange biased by an antiferromagnetic layer (MnFe). The top electrodes were made of soft magnetic materials (Co or permalloy). We have consistently obtained large magnetoresistance ratios (15%–22%) at room temperature and in fields of a few tens of Oe. The shape of the field response of the magnetoresistance was varied from smooth to highly hysteretic by adjusting the shape anisotropy of one junction electrode.

Magnetic tunnel junctions consisting of permalloy and cobalt thin film electrodes, separated by a thin aluminum oxide tunnel barrier, have been fabricated by e-beam lithography at dimensions down to 120 nanometers. The devices are fabricated by sputter deposition and ion milling. They exhibit magnetoresistances of up to 22% at room temperature. Evidence of individual domain switching is observed. The smaller junctions have resistances in the kilohm range, which are easily measured, leading to the possibility of sensing and microelectronic applications.

We demonstrate the writability of an entire 8 Mb STT-MRAM chip and present data on the expected endurance and data retention up to 90°C. The chip utilizes a device structure that displays high spin-transfer torque efficiency and proper write-current scaling, down to write pulse width of about 1.5 ns.

Background Hyperglycemia associated with diabetes mellitus will exacerbate neurologic injury after global brain ischemia. Studies in a rat model of forebrain ischemia (bilateral carotid occlusion plus hypotension for 10 min) discovered that acute restoration of normoglycemia in diabetics, using an insulin infusion, resulted in a neurologic outcome that was similar to normoglycemic rats without diabetes. The current study evaluated cerebral glucose, glycogen, lactate, and high-energy phosphate concentrations to identify metabolic correlates that might account for an alteration in postischemic outcome. Methods Fifty-four pentobarbital-anesthetized Sprague-Dawley rats were assigned to three groups: chronically hyperglycemic diabetic rats (D; N = 18); insulin-treated, acutely normoglycemic diabetic rats (ID; N = 18); and nondiabetic rats (ND; N = 18). These groups were further divided into groups of six rats each that received either no ischemia, forebrain ischemia of 10 min duration without reperfusion, or ischemia plus 15 min of reperfusion. Brains were excised after in situ freezing, and metabolites were measured using enzymatic fluorometric techniques. Results Before ischemia, D rats had greater concentrations of brain glucose (12.18 +/- 2.67 micromol/g) than did either ID (5.10 +/- 1.33) or ND (3.20 +/- 0.27) rats (P < 0.05). Preischemic brain glycogen was similar in all groups. At the completion of ischemia, brain lactate concentrations in D were 86% greater than in ID and 61% greater than in ND (P < 0.05), reflecting a higher intraischemic consumption of glucose plus glycogen in D (P < 0.05). High-energy phosphate concentrations, as assessed by the energy charge of the adenylate pool, were better preserved in D (energy charge = 0.60 +/- 0.28) than in either ID (0.29 +/- 0.09) or ND (0.36 +/- 0.07; P < 0.05) rats. After 15 min of reperfusion, the energy charge returned to preischemic values (i.e., 0.91-0.92) in all groups. Conclusions These studies demonstrated greater intraischemic carbohydrate consumption and lactate production in D than in ID or ND rats. Under these conditions, intraischemic-but not postischemic-energy status was better in D rats. Acute insulin therapy in ID rats resulted in a metabolic profile that was similar to that of ND rats. These results suggest that, in this model, primary energy failure during ischemia is not the origin of greater injury in hyperglycemic diabetics, nor is energy enhancement the origin of improved outcome after acute insulin treatment.

The scanning SQUID (Superconducting Quantum Interference Device) microscope is an extremely sensitive instrument for imaging local magnetic fields. The authors describe one such instrument which combines a novel pivoting lever mechanism for coarse-scale imaging with a piezoelectric tube scanner for fine-scale scans. The magnetic field sensor is an integrated miniature SQUID magnetometer. This instrument has a demonstrated magnetic field sensitivity of

Integrated dc-dc power converters have been the subject of intense research interest over the past 10 – 12 years because they offer so many potential benefits, not just in promising savings of up 20% of board space, but also enabling control of individual chip voltages and delivering power at high voltage and low current, thus reducing power train I2R loss. Among the various power converter options, the inductive Buck converter is the most attractive because it can deliver a wide output voltage range with an expected high efficiency (≥ 90%). However, for on-chip applications, the inductive Buck converter is the least developed power converter, there being at present no such inductor ready for use in a standard CMOS back-end-of-line (BEOL) fabrication facility. Major strides towards the realization of on-chip power conversion have been made by IBM in case of its POWER8TM processor (1), and by Intel in case of its 4th generation (Haswell) processor (2), which uses near-chip- integrated power converters; although neither company’s new power converter used an integrated magnetic inductor. After highlighting the important role that magnetic inductors are expected to play in on-chip power conversion, this talk will describe new developments in magnetic materials for inductors, especially those employed at IBM, and the fabrication challenges faced in integrating these materials in inductors. Yoke material and thickness (typically 1 - 5 microns) can be tailored to reach desired inductance values (i.e., 1 – 30 nH) in thin-film ferromagnetic inductors, while endeavoring to maintain a high enough operating frequency (i.e., 20 – 200 MHz). Electrodeposition was an enabling technology for the thin-film magnetic recording head, and was thus used for yoke fabrication of our earlier inductors (3, 4). IBM and Columbia University recently demonstrated an efficiency of 82% in a World's first 3D-integrated inductor/voltage regulator that employed thru-silicon via technology and electrodeposited Ni45Fe55 yokes (5). Nevertheless, significant advancements in eddy current suppression through electrodeposition of either sufficiently resistive or insulating-layer-laminated magnetic layers have proved elusive. Thus, considerable efforts have gone into developing new, higher resistivity, sputtered magnetic alloys (> 100 µΩcm), usually with insulating lamination layers. A notable example produced by sputtering is amorphous Co91.5Zr4Ta4.5 (CZT), which has, for example, been used as the yoke material in inductors fabricated on top of 90 nm CMOS structures by Gardner et al. (6). We chose to explore sputtered, laminated, amorphous Co20Fe60B20 magnetic films due to their extremely soft magnetic soft properties (Hc ≤ 0.1 Oe) and low, magnetic-permeability-related, loss tangent (≤ 0.1) for a wide range of frequencies, and thermal stability up to 350oC. This required development of a new fabrication scheme to integrate the blanket-deposited, sputtered magnetic layers with 200 mm CMOS substrates. We employed ion beam etching (IBE) patterning methods since no other method, e.g., wet etching, could anisotropically etch all of the inductor yoke stack materials. Peak quality factors (Q) ≥ 12 (at 120MHz) were demonstrated on magnetic inductors containing laminated Co20Fe60B20 magnetic films as shown in Fig. 1, double the Q values of previous inductors that had electrodeposited Ni45Fe55. All inductor devices functioned across a 200 mm wafer, the consistent device performance observed indicative of a reliable, high-yield fabrication process. Fig. 1. Left: Comparison of Q values for inductors with sputtered Co20Fe60B20 materials and electrodeposited Ni45Fe55 (for the latter, see ref. 3). Right: Summary of Qpeak values for single-turn inductors on a 200 mm wafer. [1] Z. Toprak-Deniz et al., ISSCC Digest, 112 (2014). [2] E. A. Burton, et al., Proc. Applied Power Electronics and Expositions (IEEE-APEC), p. 432-439 (2014) [3] N. Wang et al., J. Appl. Phys., 111, 07E732 (2012). [4] N. Sturcken et al., ISSCC, 48, 244 (2013). [5] K. Tien et al., in VLSI Technology (VLSI technology), 2015 Symposium on, Kyoto, 2015, pp.C192-C193. [6] D. S. Gardner et al., J. Appl. Phys., 103, 07E927 (2008). Figure 1

We have fabricated junctions and DC SQUIDs using laser ablation for both the YBCO electrodes and the thin SrTiO/sub 3/ (STO) barrier regions in a variety of device configurations. These SQUIDs operate reliably at 77 K and preliminary results on a limited number of devices show that they store reasonably well for periods in excess of one year, and exhibit only small changes with repeated cycles (/spl sim/10) between room temperature and 77 K. Noise measurements made using bias reversing on a SQUID (92 pH) at 77 K give a white noise of about 15 /spl mu//spl Phi//sub 0///spl radic/Hz and a 1/f upturn at about 0.2 Hz. >

A quantitative comparison study of single-level step-edge junction-based SQUIDs and bicrystal-substrate-based SQUIDs is given. Similar SQUID performance was found in terms of white flux noise level and junction-critical-current-related 1/f noise. Excess current was found in most step-edge devices. Issues related to systems applications, such as magnetic field-induced noise, junction cyclability upon repeated use, and environmental stability of oxide-metal contacts are also discussed. >

We have measured the current‐voltage, flux‐voltage, and noise characteristics of 77 K superconducting quantum interference devices made with step edge junctions and multilevel edge junctions on SrTiO3 substrates and with step edge junctions on LaAlO3. We find in each case that the I‐V curves can have excess currents of up to 50%–80%, that the responsivity, ∂V/∂Φ, can be substantially smaller than expected from the resistively shunted junction (RSJ) model, but that the white noise voltage spectral density is about as expected. We discuss the extent to which the reduction of the responsivity is correlated with the excess current. We note that the observed unchanged magnitude of the voltage noise and the reduced responsivity would both be expected if we based the RSJ predictions on a model in which the excess current is not considered part of the Josephson current. Finally and perhaps fundamentally, we find that simulations made assuming a nonsinusoidal current‐phase relationship give rise to an excess curre...

The switching current of Spin Torque Magnetic Random Access Memory (MRAM) can be reduced significantly by using perpendicularly magnetized materials. The Ta|CoFeB|MgO system provides both high tunneling magnetoresistance and perpendicular anisotropy. Using this materials system we have demonstrated basic write functionality in fully integrated Spin Torque MRAM arrays. Here, we further demonstrate device scaling down to 20 nm diameter, opening up the possibility of ultra-dense Spin Torque MRAM.

This talk will review emerging MRAM technologies, beginning with field-switched MRAMs that have been in product form for several years now, and extending to spin-torque MRAM under development now for higher density applications. Considerations for scaling to very small cell sizes will be discussed; in particular the importance of perpendicular magnetic anisotropy materials. Standard MRAM approaches involve the two-terminal magnetic tunnel junction device, that both stores the information and is used to read it out. A three-terminal magnetic device with potential advantages for speed will also be discussed, along with another approach dubbed "Racetrack" memory, which has the potential for three-dimensional shift-register like storage and very high densities.

Energy consumption is a dominant constraint on the performance of modern microprocessors and systems-on-chip. Dynamic voltage and frequency scaling (DVFS) is a promising technique for performing “on-the-fly” energy-performance optimization in the presence of workload variability. Effective implementation of DVFS requires voltage regulators that can provide many independent power supplies and can transition power supply levels on nanosecond timescales, which is not possible with modern board-level voltage regulator modules (VRMs) [1]. Switched-inductor integrated voltage regulators (IVRs) can enable effective implementation of DVFS, eliminating the need for separate VRMs and reducing power distribution network (PDN) impedance requirements by performing dc-dc conversion close to the load while supporting high peak current densities [2–3]. The primary obstacle facing development of IVRs is integration of suitable power inductors. This work presents an early prototype switched-inductor IVR using 2.5D chip stacking for inductor integration.

In this paper, we report the first demonstration of CMOS-integrated racetrack memory. The devices measured are complete memory cells integrated into the back end of line of IBM 90 nm CMOS. We show good integration yield across 200 mm wafers. With magnetic field-assist, we demonstrate current-driven read and write operations on cells within a 256-cell CMOS-integrated array.

Recently developed magnetic tunnel junctions with full perpendicular magnetization that are spin-torque switchable allow for quantitative comparison of spin-torque switching statistics with a macrospin model. For typical devices above 50 nm in lateral size, the comparison suggests the presence of subvolume magnetic excitations which often dominate the switching process and which degrade the spin-torque switching efficiency. A simple model of subvolume spin-torque-driven magnetic switching is presented to account for the experimental observations. The origin of the subvolume thermal excitation is traced to a competition between the macrospin fluctuation within a simple uniaxial anisotropy potential and that of thermal magnon excitation. The subvolume excitation problem highlights the importance of improving the magnetic exchange stiffness of the junction free layer, and the reduction of junction lateral sizes below 50 nm where an improved spin-torque efficiency is seen as the switching dynamics cross over to a more macrospin-like process.

PMA spin-torque switchable junctions have been demonstrated with lower switching current and faster switching speed compared to IMA devices. They are promising for further technology exploration in solid-state memory applications.

A 28-channel system for neuromagnetic measurements operative at CNR-IESS (Instituto di Elettronica dello Stato Solido) is described. The instrument uses 28 Nb/PbAuIn DC-SQUID (superconducting quantum interference device) sensors coupled with a flux transformer configuration. The detection coils are arranged on concentric circumferences. Sixteen axial first-order gradiometers are arranged in the internal circles, while the external circle consists of 12 first-order planar gradiometers. The vertical gradiometers show a white noise level of approximately=5 fT/ square root Hz, while the planar ones have a noise approximately=6 fT/cm square root Hz, with a 1/f corner at a few hertz. The evoked potentials of normal subjects and patients affected by various kinds of vascular disturbances have been studied. The system has succeeded at one-shot localization of some cortical activity. The instrument has also been used to record the spontaneous brain activity in patients affected by focal epilepsy. >

Josephson edge junctions have been fabricated using thin sputtered films of MgO (8-32 AA) to produce a weak connection between high-T/sub c/ electrodes. The current-voltage characteristics of these junctions can be well modeled by the resistively shunted junction (RSJ) equation, and they possess excellent Josephson properties, exhibiting strong magnetic field modulation and microwave response at 10 and 100 GHz up to 85 K. The best high temperature (T>70 K) operation has been obtained with devices which have critical current densities in excess of 10/sup 5/ A/cm/sup 2/ at 4.2 K, and junction critical current resistance products I/sub c/R/sub n/ equivalent to 0.10 mV at 83 K. Experiments indicate that improvements in device quality are expected as the base electrode junction surface is improved. Preliminary results indicate that the cyclability of these junctions is good. >

We examine the sweep-rate dependence of magnetic switching field, Hs, in submicron magnetic tunnel junctions where shape anisotropy is dominant. Experimental data support the use of a single-domain thermal activation model for description of activated magnetic reversal in junctions 0.2 by 0.5 μm or less in size. A scaling law is obtained for the thermal activation energy which varies as the cube of junction size.