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The issues concerning tunable rapid single flux quantum (RSFQ) control, thermal management and non-adiabatic perturbation are discussed.

The thermal activation of Josephson junctions as a thermometer is used to investigate heat flow from a hot resistor at milliKelvin temperatures on a silicon chip used for superconducting qubit experiments. The results indicate that on-chip resistors can be used below a certain power level, but not above that level.

The dynamics of a current biased Josephson phase qubit capacitively coupled to an LC circuit is studied. It is found that the eigenstates of this system are dressed states that are entangled states between the phase qubit and the LC resonator.

A model is presented having to do with heat flow through standard rapid single flux quantum (RSFQ) structures.

Research involving isolation filters for macroscopic quantum coherence experiments is described.

A Rapid Single Flux Quantum (RSFQ) oscillator with a variable duty cycle is described. It is for driving a superconductive qubit.

Research describing a control technique for the quantum state of a rf-superconducting quantum interference device is presented. Single flux quantum pulses are magnetically coupled to the qubit junction for critical current suppression.

Research describing submicron technology for rapid single flux quantum integrated circuits is presented. The basic scaling laws for niobium based Josephson junctions are reviewed.

Research describing macroscopic quantum coherence in an rf-superconducting quantum interference device is presented. The quantum state of a qubit is examined by means of a rapid single flux quantum digital control circuit.

Research describing the design of a circuit for the investigation of energy levels in superconducting quantum interference devices is presented. Rapid single flux quantum circuitry is used as the control mechanism.

The development of a novel timing design of rapid single flux quantum data loops is discussed. The characteristics of this design were examined and its use as the basis for a random number generator, up to 50 GHz, is presented.

The bit-error rate (BER) of an RS latched, clocked single-flux quantum circuit has been determined by using a digital error-correction circuit in measuring the BER between unity to 10 to the negative 13th power. The BER was measured as a function of control current with the application of both positive and negative control currents. The error rate has a minimum value of 10 to the negative 80th power at 5.5 K. A comparison of theoretical error-function estimates of BER indicate that the noise is purely thermal.

Research was conducted to experimentally examine on-chip parameter variations in Rapid Single Flux Quantum (RSFQ) circuits for the first time. A simple method to investigate the variations and their influence on the performance of RSFQ circuits was developed. Experimental results provide evidence that the construction of such RSFQ circuits covering the entire area of the integrated circuit is feasible using current fabrication technology.

Research was conducted to determine the bit-error rate of a 64-bit single-flux-quantum circular shift register that operates at a clock frequency of 10-16 GHz. The error-rate curves obtained indicate an effective temperature of 8-9 K. Despite the fact that it is much higher than the bath temperature, the result is in good agreement with results of previous studies. The timing jitter of 290 fs per JTL stage was also investigated.

A 64-bit superconducting rapid single flux quantum (RSFQ) circular shift register (CSR) has been observed to function at clock frequencies up to 18 GHz. Timing constraints were primary concerns in the design of the CSR because they are more severe for recurrent circuits than for systolic arrays where only local timing constraints are important. The testing process used was unusual in that the data circulated up to 50 million times before verification.

The problems and prospects of using superconducting electronics-based quantum computers are discussed. Quantum dephasing time in milliseconds for quantum coherent computations of 10(super 10) or more steps were proven for Josephson junction devices operating at milli-Kelvin temperatures. The figure of merit obtained were consistent with findings using atomic systems for quantum computation.

The Verilog hardware description language was employed for the functional modeling of rapid single flux quantum (RSFQ) basic gates. The approach permits the use of standard computer-aided design tools for the simulation of large RSFQ circuits consisting of thousand of Josephson junctions and hundreds of gates. A library of Verilog models was developed for more than 15 basic RSFQ gates.

A decimation filter four-bit rapid single flux quantum (RSFQ) multiplier-accumulator was designed and tested. Six types of 38 synchronous RSFQ cells arranged into a rectangular systolic array fed by on serial input and one parallel input make up the device. A counter-flow clock distribution scheme with a 11 GHz simulated maximum clock frequency was used for timing. The circuit features a 1100 Josephson junctions, an area less than 2.5 mm2 and power consumption below 0.2 mW.

A high-speed test scheme is proposed for maximum clock frequency measurement in a four-bit rapid single flux quantum decimation digital filter. The approach only requires standard low-cost measurement devices and a low-speed interface. Results demonstrate the testing scheme's superiority over other high-speed tests in terms of added circuitry, in control, measurement equipment parameters and high-speed input/output requirements.

Three new designs for rapid single flux quantum circular shift registers were proposed. The simulated parameter margins and the maximum operating frequencies, areas and latencies of the designs were compared. The designs feature different clock distribution networks, topologies and data path storage element types. Only two of the designs exhibit large maximum clock frequency and satisfactory parameter margins.

A new approach based on the method of finite segments was proposed for solving inductances in complex superconducting thin film microcircuits. The approach was developed to ensure inductance estimation accuracy in high speed superconducting digital circuit layout design studies. Simulations were conducted on such common inductance elements as Josephson junctions, short stripline, corner and tee connection. The resulting database was used to develop high speed rapid single flux quantum digital devices.

The results of an active SFQ bit-error rate experiment were compared to theoretic prediction. The Fokker-Planck equation was employed to develop a theory of thermally-induced errors. The experiment showed that the equivalent noise temperature was 11.0 K. Results also reveal that the error rate vs the bias current was dependent on error function and extrapolate at optimal bias to a very small error rate.

The inscribed hyperspheres algorithm was used as a tool in the multiparameter optimization of rapid single flux quantum (RSFQ) circuits. The method of inscribed spheres is based on the interaction of a set of parameter values inside the operating region, which are called the starting point, and the points in the boundary of the operating region. It is effective for as many as nine parameters. An illustration of the starting point and first three iterations of the method is included.

A novel clocking scheme for rapid single flux quantum (RSFQ) logic was developed based on the concurrent flow of the clock and data signals. In this scheme, the clock flows in the same direction as the data but require additional delay added to the clock path to achieve maximum intrinsic speed of the RSFQ cells. It is particularly well-suited for structured architectures because it allows circuit throughput to be independent of inter-cell connection delays.

Researchers are currently developing a finite impulse response filter for use in a digital signal processing system based on rapid single flux quantum logic. An adder-accumulator multiplier that will serve the filter's arithmetic unit has already been developed. Two cells have been fabricated and tested at low speed to perform accumulated binary addition for the multiplier.

Superconducting single flux quantum (SFQ) digital signal processing circuits which use residue number system (RNS) arithmetic in place of traditional binary arithmetic are developed. Experiments suggest that RNS enhances SFQ circuits and are more effective for digital computations than the binary system. Actual use of RNS in Josephson shift registers support these findings.

We have used the quantum theory of mixing for extensive numerical calculations to determine the mixer source conductance G(sub s) required to optimize a superconductor-insulator-superconductor (SIS) quasiparticle heterodyne receiver. The optimum G(sub s) matches an empirical formula which can be understood by a simple derivation. Previous work indicated that G(sub s) should vary inversely with frequency, and this implies that the critical current density of SIS junctions used for mixing should increase as frequency squared, a stringent constraint on the design of submillimeter SIS mixers. On the contrary, we find that G(sub s) is more weakly dependent upon frequency, and we discuss the implications for the design of submillimeter SIS mixers.

A survey of CAD tools targeting superconducting digital electronics was conducted. Circuit optimizers, circuit simulators, inductance estimators, layout tools and logic simulators comprised the five categories of tools that were studied. Other tools that were discussed included tools for timing analysis and integrated design environments that allowed the effective data interchange among different tools. Survey results demonstrate that future tools for timing optimization, automated layout synthesis and automated logic synthesis are required for superconducting circuit design at the very large scale of integration level of integration.

A new design methodology created specifically for rapid single flux quantum (RSFQ) circuits is proposed. The basis of the methodology is a semiconductor semicustom design approach. For the design of the basic RSFQ cells, an established design methodology for small-scale RSFQ digital circuits based on circuit simulation and device parameter optimization was used. The method was then successfully used at the University of Rochester for the design of two large-scale digital circuits.