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Energy-Efficient Versatile Memories With Ferroelectric Negative Capacitance by Gate-Strain Enhancement

Authors :
Yu-Chien Chiu
Guan-Lin Liou
Chun-Hu Cheng
Chun-Yen Chang
Source :
IEEE Transactions on Electron Devices. 64:3498-3501
Publication Year :
2017
Publisher :
Institute of Electrical and Electronics Engineers (IEEE), 2017.

Abstract

In this brief, we reported a ferroelectric versatile memory with strained-gate engineering. The versatile memory with high-strain-gate showed a >40% improvement on ferroelectric hysteresis window, compared to low-strain case. The high compressive stress induced from high nitrogen-content TaN enhances monoclinic-to-orthorhombic phase transition to reach stronger ferrolectric polarization and lower depolarization field. The versatile memory featuring ferroelectric negative capacitance exhibited excellent transfer characteristics of the sub-60-mVdec subthreshold swing, ultralow off-state leakage of $\mu \text{m}$ and $> 10^{\mathsf {8}}$ on/off current ratio. Furthermore, the ferroelectric versatile memory can be switched by ±5 V under 20-ns speed for a long endurance cycling (~1012 cycles). The low-power operation can be ascribed to the amplification of the surface potential to reach the strong inversion and fast domain polarization at the correspondingly low program/erase voltages.

Details

ISSN :
15579646 and 00189383
Volume :
64
Database :
OpenAIRE
Journal :
IEEE Transactions on Electron Devices
Accession number :
edsair.doi...........9b4d4cb46c8201766f8d095b74432d44
Full Text :
https://doi.org/10.1109/ted.2017.2712709