Energy-Efficient Versatile Memories With Ferroelectric Negative Capacitance by Gate-Strain Enhancement

MLA

Yu-Chien Chiu, et al. “Energy-Efficient Versatile Memories With Ferroelectric Negative Capacitance by Gate-Strain Enhancement.” IEEE Transactions on Electron Devices, vol. 64, Aug. 2017, pp. 3498–501. EBSCOhost, https://doi.org/10.1109/ted.2017.2712709.

APA

Yu-Chien Chiu, Guan-Lin Liou, Chun-Hu Cheng, & Chun-Yen Chang. (2017). Energy-Efficient Versatile Memories With Ferroelectric Negative Capacitance by Gate-Strain Enhancement. IEEE Transactions on Electron Devices, 64, 3498–3501. https://doi.org/10.1109/ted.2017.2712709

Chicago

Yu-Chien Chiu, Guan-Lin Liou, Chun-Hu Cheng, and Chun-Yen Chang. 2017. “Energy-Efficient Versatile Memories With Ferroelectric Negative Capacitance by Gate-Strain Enhancement.” IEEE Transactions on Electron Devices 64 (August): 3498–3501. doi:10.1109/ted.2017.2712709.