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Temperature influence on analog figures-of-merit of nanosheet nMOSFET devices for sub-7nm technology node
- Source :
- 2020 Joint International EUROSOI Workshop and International Conference on Ultimate Integration on Silicon (EUROSOI-ULIS).
- Publication Year :
- 2020
- Publisher :
- IEEE, 2020.
-
Abstract
- This work analyzes the impact of temperature on the Analog figures of Merit of vertically stacked nanosheet nMOSFETs. The excellent electrostatic control between gate and channel results in a strong reduction of the short channel effect, as expected. The analog parameters like the intrinsic voltage gain, transistor efficiency and Early voltage are analyzed as a function of temperature. A high intrinsic voltage gain and a weak temperature dependence are observed, mainly at strong inversion region. The transistor efficiency and subthreshold swing maintain their value close to the theoretical limit.
- Subjects :
- Materials science
Temperature control
business.industry
Transistor
Short-channel effect
Hardware_PERFORMANCEANDRELIABILITY
Condensed Matter::Mesoscopic Systems and Quantum Hall Effect
law.invention
law
Logic gate
Node (physics)
Hardware_INTEGRATEDCIRCUITS
Optoelectronics
Figure of merit
business
Hardware_LOGICDESIGN
Nanosheet
Voltage
Subjects
Details
- Database :
- OpenAIRE
- Journal :
- 2020 Joint International EUROSOI Workshop and International Conference on Ultimate Integration on Silicon (EUROSOI-ULIS)
- Accession number :
- edsair.doi...........5b777d3d7b6dc7276d2a9676f3491952