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Limits of gate-oxide scaling in nano-transistors

Authors :
Ming-Ren Lin
Qi Xiang
Bin Yu
C. Riccobene
Haihong Wang
Source :
2000 Symposium on VLSI Technology. Digest of Technical Papers (Cat. No.00CH37104).
Publication Year :
2002
Publisher :
IEEE, 2002.

Abstract

This paper explores the ultimate scaling limit of gate oxide due to MOSFET gate leakage and device performance. The limit on Tox reduction with respect to gate leakage tolerance is considered by the concept of "dynamic" gate leakage in nano-scale MOSFET's. Tox scaling is also limited by transistor performance degradation due to the loss of inversion layer charge through gate leakage and the degradation of carrier mobility in the channel from increased scattering. All the three effects are investigated experimentally on CMOS devices with gate length down to 50 nm and gate Tox down to 12 A. The minimum Tox is proposed and the implications on voltage scaling, high-k gate dielectrics and low-temperature CMOS are discussed.

Details

Database :
OpenAIRE
Journal :
2000 Symposium on VLSI Technology. Digest of Technical Papers (Cat. No.00CH37104)
Accession number :
edsair.doi...........4bccfbe090a6c4f028c0cc6d226f1ea1
Full Text :
https://doi.org/10.1109/vlsit.2000.852781