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A 60-ns 16-Mbit CMOS DRAM with a transposed data-line structure.
- Source :
- IEEE Journal of Solid-State Circuits; 1988, Vol. 23 Issue 5, p1113-1119, 7p
- Publication Year :
- 1988
Details
- Language :
- English
- ISSN :
- 00189200
- Volume :
- 23
- Issue :
- 5
- Database :
- Complementary Index
- Journal :
- IEEE Journal of Solid-State Circuits
- Publication Type :
- Academic Journal
- Accession number :
- 92812019
- Full Text :
- https://doi.org/10.1109/4.5932