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Low-power DRAM-compatible Replacement Gate High-k/Metal Gate stacks.

Authors :
Ritzenthaler, R.
Schram, T.
Bury, E.
Mitard, J.
Ragnarsson, L.-A.
Groeseneken, G.
Horiguchi, N.
Thean, A.
Spessot, A.
Caillat, C.
Srividya, V.
Fazan, P.
Source :
2012 Proceedings of the European Solid-State Device Research Conference (ESSDERC); 1/ 1/2012, p242-245, 4p
Publication Year :
2012

Abstract

In this paper, the feasibility of High-k/Metal Gate (HKMG) Replacement Metal Gate (RMG) stacks for low power DRAM compatible transistors is assessed. It is shown that traditional RMG gate stacks cannot be used because of the additional anneal needed in a DRAM process. New solutions are developed, and a PMOS stack HfO2/TiN with TiN deposited in three times combined with Work Function metal oxidations is demonstrated, featuring a Work Function of 4.95 eV. On the NMOS side, a new solution based on the use of oxidized Ta as a diffusion barrier is proposed, and a HfO2/TiN/Ta/TiAl/TiN/TiN gate stack featuring an aggressive Work Function of 4.35 eV (allowing a Work Function separation of 600 mV between NMOS and PMOS) is demonstrated. [ABSTRACT FROM PUBLISHER]

Details

Language :
English
ISBNs :
9781467317078
Database :
Complementary Index
Journal :
2012 Proceedings of the European Solid-State Device Research Conference (ESSDERC)
Publication Type :
Conference
Accession number :
86592198
Full Text :
https://doi.org/10.1109/ESSDERC.2012.6343378