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An investigation of wafer-to-wafer alignment tolerances for three-dimensional integrated circuit fabrication.

Authors :
Warner, K.
Chen, C.
D'Onofrio, R.
Keast, C.
Poesse, S.
Source :
2004 IEEE International SOI Conference (IEEE Cat. No.04CH37573); 2004, p71-72, 2p
Publication Year :
2004

Details

Language :
English
ISBNs :
9780780384972
Database :
Complementary Index
Journal :
2004 IEEE International SOI Conference (IEEE Cat. No.04CH37573)
Publication Type :
Conference
Accession number :
82110804
Full Text :
https://doi.org/10.1109/SOI.2004.1391560