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Exploiting VHDL-RTL features to reduce the complexity of power estimation in combinational circuits.

Authors :
Machado, F.
Torroja, Y.
Riesgo, T.
Source :
2005 PhD Research in Microelectronics & Electronics; 2005, p111-114, 4p
Publication Year :
2005

Details

Language :
English
ISBNs :
9780780393455
Database :
Complementary Index
Journal :
2005 PhD Research in Microelectronics & Electronics
Publication Type :
Conference
Accession number :
81876477
Full Text :
https://doi.org/10.1109/RME.2005.1542949