Discrete sine area equalization PWM technique based cascaded multilevel inverter topology for harmonic minimization.

This paper proposes a new Pulse Width Modulation technique for single phase cascaded H-bridge multilevel inverter for maintaining the output voltage across the load side with reduction in Total Harmonic Distortion (THD). The novelty of this paper is to equalize the area under the multilevel output voltage with that of area under the pure sine wave in discrete time periods. The main objective of this design is to maintain the desired output voltage with minimization of THD at the dynamic load conditions. The comparison between the proposed PWM technique with conventional Optimized Harmonic Stepped Waveform PWM is also shown and the results are proven that the proposed method is comparatively better. Particle Swarm Optimization algorithm is employed for solving the non-linear objective function and finding out the optimal switching angles for the MLM switches. MATLAB software is used to simulate the proposed design. The detailed mathematical modeling on the area equalization techniques with the advantage of using the proposed method than OHSW PWM technique is also presented in this paper. [ABSTRACT FROM AUTHOR]