Discrete sine area equalization PWM technique based cascaded multilevel inverter topology for harmonic minimization.

MLA

Sundari, M. S.Sivagama. “Discrete Sine Area Equalization PWM Technique Based Cascaded Multilevel Inverter Topology for Harmonic Minimization.” AIP Conference Proceedings, vol. 2587, no. 1, Nov. 2023, pp. 1–11. EBSCOhost, https://doi.org/10.1063/5.0150632.

APA

Sundari, M. S. S. (2023). Discrete sine area equalization PWM technique based cascaded multilevel inverter topology for harmonic minimization. AIP Conference Proceedings, 2587(1), 1–11. https://doi.org/10.1063/5.0150632

Chicago

Sundari, M. S. Sivagama. 2023. “Discrete Sine Area Equalization PWM Technique Based Cascaded Multilevel Inverter Topology for Harmonic Minimization.” AIP Conference Proceedings 2587 (1): 1–11. doi:10.1063/5.0150632.