Second-Bit-Effect-Free Multibit-Cell Flash Memory Using Si3N4/ZrO2 Split Charge Trapping Layer.

In this paper, a Si3N4/ZrO2 split charge trapping layer (SCTL) is proposed for multibit-cell Flash memory. T complementary potential wells of Si3N4/ZrO2 storage nodes en able independent node control when the Fowler-Nordheim (F-N) method is applied for programming/erasing (P/E). Experiment and simulation results suggest that the 2-bit (2-b) charge storage is accomplished by physical data node separation for the SCTL rather than charge injection control. The well-confined charge storages suppress the second-bit effect, enabling excellent 2-b data clearance for short-channel SCTL devices. It was found that the remaining memory windows after 1010 s decrease, dependent on the difference of the trap properties between Si3N4 and ZrO2. [ABSTRACT FROM AUTHOR]