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Today’s photovoltaics market is dominated by silicon-based technology, as it is inexpensive and mature. Solar cells (SCs) based on III-V compound semiconductors have attained the highest reported efficiency of any photovoltaic devices to date. However, the high cost for producing these cells is limiting their use to concentrated photovoltaic (CPV) space applications. The market demand will be higher if the cost of III-V solar cells was reduced and adapted for low-concentration applications. The major contribution in the cost for III-V SCs scaled up to high volume manufacturing is associated with the cost of the substrate. This could substantially be reduced, if a Ge/Si substrate were used, especially that Ge offers advantages in strength and cost over GaAs substrates while providing a similar lattice constant. However, the integration of these lattice-mismatched materials (Ge/Si) remains difficult and presents physical and technological challenges. Threading dislocations introduced inside the germanium layers have a detrimental effect on device performances. In this research, we seek to accommodate the effects of the lattice mismatch by introducing a voided germanium interface layer (porous Ge layer) on the silicon substrate to intercept dislocations and prevent them from reaching the active layers of the device. The nanovoids are formed by a scalable process, through dislocation-selective electrochemical deep etching and thermal annealing, which leads to the formation of a continuous Ge layer, in which, a large portion of the original threading dislocations are pinned and annihilated close to a free surface. The fabrication process of these virtual substrates meets the industrial criteria: Monocrystalline on the surface, defect-fee, epi-ready and obtained at the wafer scale by a low cost process. The averaged threading dislocation density is reduced by over three orders of magnitude, from ~107 cm−2 to ~104 cm−2 for 1.5 µm thick Ge layers, which is considered very low for such a thin epitaxial layer. Our technique may be applied to realize virtual substrates for multi-junctions solar cells on a Si support. As a result, significant cost savings become possible if the bulk Ge substrates can be replaced with our virtual analogs consisting of micron-thick Ge buffers grown on Si wafers.; L'électricité d'origine photovoltaïque constituera une composante majeure des apports énergétiques domestiques dans les prochaines décennies. Aujourd'hui et malgré des rendements records, le coût des cellules solaires à base de matériau III-V sur germanium (Ge) est toujours trop dispendieux pour démocratiser cette technologie au niveau grand public. Le prix du substrat de Ge s’élève à plus de 50 % du prix de la cellule au complet alors que moins de 1% du substrat de Ge constitue la zone active du composant où le courant est généré. Une alternative serait donc d’intégrer une couche épitaxiale de Ge sur un support mécanique ou un substrat semi-conducteur à faible coût comme le silicium. Cependant, l’épitaxie de Ge sur substrat de Si présente des barrières physiques et technologiques. Le fort désaccord en paramètre de maille (4,2%) engendre des dislocations et contribuent majoritairement à dégrader le rendement des cellules. Dans le cadre de cette thèse, nous avons développé de nouvelles architectures de substrat virtuels de germanium-sur-silicium à base de porosification électrochimique. Les dislocations sont éliminées de la couche épitaxiale par un procédé de nano structuration thermo-électrochimique, permettant de créer une barrière de nano-cavités qui piège les dislocations. Le procédé de fabrication de ces substrats virtuels répond aux critères industriels : Monocristallins en surface, exempts de défauts, epi-ready et réalisés sur des substrats de grande taille par un procédé faible coût. La densité de dislocations moyenne est réduite de plus de trois ordres de grandeur, de ~ 107 cm-2 à ~ 104 cm-2 pour des couches de Ge de 1,5 μm d'épaisseur, ce qui est considéré comme très faible pour une couche épitaxiale aussi mince.L'utilisation de ces procédés simples, par anodisation électrochimique et recuit thermique adéquat, s’est révélée très efficace et innovante permettant de réduire significativement le coût des cellules photovoltaïques à base de matériau III-V sur substrat silicium, ainsi que leurs intégrations probables dans le marché grand public.

Today’s photovoltaics market is dominated by silicon-based technology, as it is inexpensive and mature. Solar cells (SCs) based on III-V compound semiconductors have attained the highest reported efficiency of any photovoltaic devices to date. However, the high cost for producing these cells is limiting their use to concentrated photovoltaic (CPV) space applications. The market demand will be higher if the cost of III-V solar cells was reduced and adapted for low-concentration applications. The major contribution in the cost for III-V SCs scaled up to high volume manufacturing is associated with the cost of the substrate. This could substantially be reduced, if a Ge/Si substrate were used, especially that Ge offers advantages in strength and cost over GaAs substrates while providing a similar lattice constant. However, the integration of these lattice-mismatched materials (Ge/Si) remains difficult and presents physical and technological challenges. Threading dislocations introduced inside the germanium layers have a detrimental effect on device performances. In this research, we seek to accommodate the effects of the lattice mismatch by introducing a voided germanium interface layer (porous Ge layer) on the silicon substrate to intercept dislocations and prevent them from reaching the active layers of the device. The nanovoids are formed by a scalable process, through dislocation-selective electrochemical deep etching and thermal annealing, which leads to the formation of a continuous Ge layer, in which, a large portion of the original threading dislocations are pinned and annihilated close to a free surface. The fabrication process of these virtual substrates meets the industrial criteria: Monocrystalline on the surface, defect-fee, epi-ready and obtained at the wafer scale by a low cost process. The averaged threading dislocation density is reduced by over three orders of magnitude, from ~107 cm−2 to ~104 cm−2 for 1.5 µm thick Ge layers, which is considered very low for such a thin epitaxial layer. Our technique may be applied to realize virtual substrates for multi-junctions solar cells on a Si support. As a result, significant cost savings become possible if the bulk Ge substrates can be replaced with our virtual analogs consisting of micron-thick Ge buffers grown on Si wafers., L'électricité d'origine photovoltaïque constituera une composante majeure des apports énergétiques domestiques dans les prochaines décennies. Aujourd'hui et malgré des rendements records, le coût des cellules solaires à base de matériau III-V sur germanium (Ge) est toujours trop dispendieux pour démocratiser cette technologie au niveau grand public. Le prix du substrat de Ge s’élève à plus de 50 % du prix de la cellule au complet alors que moins de 1% du substrat de Ge constitue la zone active du composant où le courant est généré. Une alternative serait donc d’intégrer une couche épitaxiale de Ge sur un support mécanique ou un substrat semi-conducteur à faible coût comme le silicium. Cependant, l’épitaxie de Ge sur substrat de Si présente des barrières physiques et technologiques. Le fort désaccord en paramètre de maille (4,2%) engendre des dislocations et contribuent majoritairement à dégrader le rendement des cellules. Dans le cadre de cette thèse, nous avons développé de nouvelles architectures de substrat virtuels de germanium-sur-silicium à base de porosification électrochimique. Les dislocations sont éliminées de la couche épitaxiale par un procédé de nano structuration thermo-électrochimique, permettant de créer une barrière de nano-cavités qui piège les dislocations. Le procédé de fabrication de ces substrats virtuels répond aux critères industriels : Monocristallins en surface, exempts de défauts, epi-ready et réalisés sur des substrats de grande taille par un procédé faible coût. La densité de dislocations moyenne est réduite de plus de trois ordres de grandeur, de ~ 107 cm-2 à ~ 104 cm-2 pour des couches de Ge de 1,5 μm d'épaisseur, ce qui est considéré comme très faible pour une couche épitaxiale aussi mince.L'utilisation de ces procédés simples, par anodisation électrochimique et recuit thermique adéquat, s’est révélée très efficace et innovante permettant de réduire significativement le coût des cellules photovoltaïques à base de matériau III-V sur substrat silicium, ainsi que leurs intégrations probables dans le marché grand public.

While silicon represents the dominant material in the semiconductor industry, the continuous improvement in the performance of Si based devices is reaching its upper bound due to the approaching of insuperable physical limitations intrinsic to Si, which requires the introduction of new semiconductor materials and the development of new assembly techniques to guarantee the future performance improvement and reduction in fabrication costs. The integration of high-quality germanium epilayers on Si substrates has received great attention from the semiconductor community due to the chance to extend the range of performance offered by Si-based technology by taking advantage of both the superior properties of Ge such as a higher carrier mobility, a lattice constant close to that of GaAs which enables III-V epitaxy and a quasi-direct bandgap, and of the possibility of strain and bandgap engineering offered by the formation of a heterojunction. To overcome the 4.2% lattice constant mismatch existing between Ge and Si which hamper the direct integration approach, this thesis investigates a novel technique for the realization of high-quality Ge on Si virtual substrates (VSs), consisting in the introduction of a porous silicon (pSi) buffer layer in between Ge and Si. pSi is a versatile, self-assembled, nanomaterial which can be realized at very high growth rates through electrochemical etching of Si. Thanks to its reduced Young’s and shear moduli pSi can deform during epitaxy, potentially alleviating part of the lattice mismatch between Ge and Si and reducing the density of misfit dislocations and associated threading segments necessary for complete Ge relaxation. Together with the very high throughput of the anodization process, other fundamental advantages of the proposed approach are its low cost, its simple scalability to large area Si substrates and the possibility to lift-off the grown epilayers from the starting substrates, giving Ge on pSi VSs the possibility to outperform other existing techniques for Ge integration on Si. During the course of this work, several Ge on pSi VSs have been grown through low energy plasma enhanced chemical vapor deposition (LEPECVD) technique, and the resulting crystalline quality has been compared to that of Ge on Si VSs. Using X-ray diffraction techniques, together with electron microscopy analysis and selective etching techniques, it will be shown how the main physical parameters of pSi buffers affect the crystalline quality of Ge heteroepilayers. Finally, it will be demonstrated that strong threading dislocation reduction is possible in Ge grown on low porosity pSi buffers compared to Ge on bulk Si, at parity of experimental conditions, and the main mechanisms responsible for crystalline quality improvement in Ge grown on pSi will be uncovered.