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A brief overview will be provided on superconducting memory elements incorporating Josephson junctions, from the tunneling cryotrons in the 1960's to contemporary RSFQ devices, with an outlook to future developments such as Josephson junction-based neuromorphic circuitry. [ABSTRACT FROM AUTHOR]

The demand for low-dissipation nanoscale memory devices is as strong as ever. As Moore’s law is staggering, and the demand for a low-power-consuming supercomputer is high, the goal of making information processing circuits out of superconductors is one of the central goals of modern technology and physics. So far, digital superconducting circuits could not demonstrate their immense potential. One important reason for this is that a dense superconducting memory technology is not yet available. Miniaturization of traditional superconducting quantum interference devices is difficult below a few micrometers because their operation relies on the geometric inductance of the superconducting loop. Magnetic memories do allow nanometer-scale miniaturization, but they are not purely superconducting (Baek et al 2014 Nat. Commun. 5 3888). Our approach is to make nanometer scale memory cells based on the kinetic inductance (and not geometric inductance) of superconducting nanowire loops, which have already shown many fascinating properties (Aprili 2006 Nat. Nanotechnol. 1 15; Hopkins et al 2005 Science 308 1762). This allows much smaller devices and naturally eliminates magnetic-field cross-talk. We demonstrate that the vorticity, i.e., the winding number of the order parameter, of a closed superconducting loop can be used for realizing a nanoscale nonvolatile memory device. We demonstrate how to alter the vorticity in a controlled fashion by applying calibrated current pulses. A reliable read-out of the memory is also demonstrated. We present arguments that such memory can be developed to operate without energy dissipation.

Scalable memories that can match the speeds of superconducting logic circuits have long been desired to enable a superconducting computer. A superconducting loop that includes a Josephson junction can store a flux quantum state in picoseconds. However, the requirement for the loop inductance to create a bistate hysteresis sets a limit on the minimal area occupied by a single memory cell. Here, we present a miniaturized superconducting memory cell based on a three-dimensional (3D) Nb nano-superconducting quantum interference device (nano-SQUID). The major cell area here fits within an 8 × 9 μm 2 rectangle with a cross-selected function for memory implementation. The cell shows periodic tunable hysteresis between two neighboring flux quantum states produced by bias current sweeping because of the large modulation depth of the 3D nano-SQUID (∼66%). Furthermore, the measured current-phase relations (CPRs) of nano-SQUIDs are shown to be skewed from a sine function, as predicted by theoretical modeling. The skewness and the critical current of 3D nano-SQUIDs are linearly correlated. It is also found that the hysteresis loop size is in a linear scaling relationship with the CPR skewness using the statistics from characterization of 26 devices. We show that the CPR skewness range of π/4-3π/4 is equivalent to a large loop inductance in creating a stable bistate hysteresis for memory implementation. Therefore, the skewed CPR of 3D nano-SQUID enables further superconducting memory cell miniaturization by overcoming the inductance limitation of the loop area.