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In this paper, a data-driven method is proposed for fast cascading outage screening in power systems. The proposed method combines a deep convolutional neural network (deep CNN) and a depth-first search (DFS) algorithm. First, a deep CNN is constructed as a security assessment tool to evaluate system security status based on observable information. With its automatic feature extraction ability and the high generalization, a well-trained deep CNN can produce estimated AC optimal power flow (ACOPF) results for various uncertain operation scenarios, i.e., fluctuated load and system topology change, in a nearly computation-free manner. Second, a scenario tree is built to represent the potential operation scenarios and the associated cascading outages. The DFS algorithm is developed as a fast screening tool to calculate the expected security index value for each cascading outage path along the entire tree, which can be a reference for system operators to take predictive measures against system collapse. The simulation results of applying the proposed deep CNN and the DFS algorithm on standard test cases verify their accuracy, and the computational efficiency is thousands of times faster than the model-based traditional approach, which implies the great potential of the proposed algorithm for online applications. [ABSTRACT FROM AUTHOR]

Several works have been conducted regarding the reduction of the energy consumption in electrical circuits. Reversible circuit synthesis is considered to be one of the major efforts at reducing the amount of power consumption. The field of reversible circuit synthesis uses a large number of proposed algorithms to minimize the overall cost of circuits synthesis (represented in the line number and quantum cost), with minimal concern paid for synthesis time. However, because of the iterative nature of the synthesis optimization algorithms, synthesis time cannot be neglected as a parameter which needs to be tackled, especially for large-scale circuits which need to be realized by cascades of reversible gates. Reducing the synthesis cost can be achieved by Binary Decision Diagrams (BDDs), which are considered to be a step forward in this field. Nevertheless, the mapping of each BDD node into a cascade of reversible gates during the synthesis process is time-consuming. In this work, we implement the idea of the subtree-based mapping of BDD nodes to reversible gates instead of the classical nodal-based algorithm to effectively reduce the entire reversible circuit synthesis time. Considering Depth-First Search (DFS), we convert an entire BDD subtree in one step into a cascade of reversible gates. A look-up table for all possible combinations of subtrees and their corresponding reversible gates has been constructed, in which a hash key is used to directly access subtrees during the mapping process. This table is constructed as a result of a comprehensive study of all possible BDD subtrees and considered as a reference during the conversion process. The conducted experimental tests show a significant synthesis time reduction (around 95% on average), preserving the correctness of the algorithm in generating a circuit realizing the required Boolean function. [ABSTRACT FROM AUTHOR]

Single-cell screening is used to sort a stream of cells into clusters (or types) based on prespecified biomarkers, thus supporting type-driven biochemical analysis. Reconfigurable flow-based microfluidic biochips (RFBs) can be utilized to screen hundreds of heterogeneous cells within a few minutes, but they are overburdened with the control of a large number of valves. To address this problem, we present a pin-constrained RFB design methodology for single-cell screening. The proposed design is analyzed using computational fluid dynamics simulations, mapped to an RC-lumped model, and combined with intervalve connectivity information to construct a high-level synthesis framework, referred to as cell sorter using multiplexed control (Sortex). Simulation results show that Sortex significantly reduces the number of control pins and fulfills the timing requirements of single-cell screening. [ABSTRACT FROM AUTHOR]

A critical node (cut vertex or articulation point) in wireless sensor networks, is a node which its failure breaks the connectivity of the network. Therefore, it is crucial that critical nodes be detected and treated with caution. This paper provides two localized distributed algorithms for determining the states of nodes (critical or noncritical). The first proposed algorithm identifies most of the critical and noncritical dominator nodes from two-hop local subgraph and connected dominating set (CDS) information that limits the computational complexity to $O(\Delta ^2)$ and bit complexity to $O(c\text{log}_2n)$ where $\Delta$ is the maximum node degree, $c$ is the critical node count, and $n$ is the node count. The testbed experiments and simulation results show that this algorithm detects up to 93% of critical nodes and achieves up to 91% of state determination with low energy consumption. The second proposed algorithm, which is based on the first one, finds the states of all nodes by running a limited distributed depth-first search algorithm in unrecognized parts of the network without traversing the whole network. Comprehensive testbed experiments and simulation results reveal that, in the presence of a CDS, this algorithm finds all critical nodes with lower energy consumption than all existing algorithms. [ABSTRACT FROM AUTHOR]

Several works have been conducted regarding the reduction of the energy consumption in electrical circuits. Reversible circuit synthesis is considered to be one of the major efforts at reducing the amount of power consumption. The field of reversible circuit synthesis uses a large number of proposed algorithms to minimize the overall cost of circuits synthesis (represented in the line number and quantum cost), with minimal concern paid for synthesis time. However, because of the iterative nature of the synthesis optimization algorithms, synthesis time cannot be neglected as a parameter which needs to be tackled, especially for large-scale circuits which need to be realized by cascades of reversible gates. Reducing the synthesis cost can be achieved by Binary Decision Diagrams (BDDs), which are considered to be a step forward in this field. Nevertheless, the mapping of each BDD node into a cascade of reversible gates during the synthesis process is time-consuming. In this work, we implement the idea of the subtree-based mapping of BDD nodes to reversible gates instead of the classical nodal-based algorithm to effectively reduce the entire reversible circuit synthesis time. Considering Depth-First Search (DFS), we convert an entire BDD subtree in one step into a cascade of reversible gates. A look-up table for all possible combinations of subtrees and their corresponding reversible gates has been constructed, in which a hash key is used to directly access subtrees during the mapping process. This table is constructed as a result of a comprehensive study of all possible BDD subtrees and considered as a reference during the conversion process. The conducted experimental tests show a significant synthesis time reduction (around 95% on average), preserving the correctness of the algorithm in generating a circuit realizing the required Boolean function.

Previously, an optical code-division multiplexing (OCDM)-based network architecture was proposed to improve the wavelength utilization and to provide finer bandwidth granularities to users. By this technology, different channels using distinct optical codes (OCs) can be multiplexed onto the same wavelength, in which an OC is considered as the basic unit in lightpath provisioning. In the ideal case, multiaccess interference (MAI) inherent to the OCDM technology is assumed to be removed completely at intermediate nodes and cannot be propagated or accumulated along the lightpath. However, since no optical-electrical (O/E) or electrical-optical (E/O) conversion is allowed in transparent OCDM-based optical networks, the MAI cannot be removed completely at intermediate nodes with current all-optical regeneration techniques. As a result, the residual MAI may be propagated and accumulated along the lightpath and affect other active lightpaths carried by the same wavelength in the network. The affected active lightpaths may build unintended cycles along which the MAI is accumulated. Furthermore, this MAI keeps increasing when the lightpaths traversed by the cycle are active, which deteriorates the lightpath signal quality. Since this deterioration may eventually result in unacceptable signal quality and service disruption, the phenomenon caused by the MAI is termed as cycle attack in this paper. The explanations of the MAI propagation mechanism and the cycle attack problem are given. A depth-first search (DFS)-based algorithm is proposed to diagnose such cycle attacks under dynamic traffic conditions. The numerical results show that our DFS-based cycle attack diagnostic algorithm enables one to detect cycle attacks effectively, and the two-way resource reservation method associated with heuristic wavelength assignment is shown to mitigate the blocking performance degradation due to cycle attacks greatly with some proper wavelength and OC configuration. [ABSTRACT FROM PUBLISHER]