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This paper compares the analytical approach and optimization algorithm for designing a two-bilinear-section-based two-port transfer function hinged on a numerical sweep with the intention of implementing fractional-order (FO) systems in many sensing areas. The study compares analytical and algorithm-based design approaches and tests their effectiveness in designing a two-port system that accommodates phase shifts within the 10° to 80° range and with various phase ripple limits. The impact of phase changes on usable bandwidth (yield maximization) is also explored. The proposed algorithm represents the most optimal approach and calculates zeros/poles frequencies to precisely keep the required mean phase value and phase ripple value for the defined center frequency. Experimental results are provided, utilizing two bilinear sections featuring the current feedback amplifier. Moreover, the implementation of the novel two-port Cole model as an application example of the proposed design is presented and evaluated. The approaches presented are useful in sensing, modeling, and instrumentation.

This paper describes an integrated ISFETs instrumentation system in a 0.18 µm 1-poly-6-metal CMOS process. The chip is able to compute the average of CMOS ISFETs' threshold voltages by using an averaging array employing global negative current feedback. In addition, neither reference voltage nor current is required to set up the sigma-delta modulator because the internal signal is converted and processed in the frequency domain. The chip operates at 3.3 V for the analog blocks and the digital input/output blocks, and at 1.8 V for the core digital logic. It achieves 8 bits accuracy under 80 µW static power consumption. The die area is 2.6 mm². [ABSTRACT FROM AUTHOR]

A novel CMOS current feedback op-amp is presented. The solution works using a low supply voltage and provides a wide input/output swing as well as a high current driving capability. Experimental results from a prototype implemented in a 0.35-μm technology and powered with 1.5 V are also given. The circuit exhibits a better than 500 kHz closed-loop bandwidth and a ±1 mA current drive capability. [ABSTRACT FROM AUTHOR]