186 results on '"Witters, Liesbeth"'
Search Results
2. The Challenges and Solutions of Cu/SiCN Wafer-to-Wafer Hybrid Bonding Scaling Down to 400nm Pitch
3. New Cu “Bulge-Out” Mechanism Supporting SubMicron Scaling of Hybrid Wafer-to-Wafer Bonding
4. A Study of SiCN Wafer-to-Wafer Bonding and Impact of Wafer Warpage
5. The implant-free quantum well field-effect transistor: Harnessing the power of heterostructures
6. Monolithic Integration of Nano-Ridge Engineered InGaP/GaAs HBTs on 300 mm Si Substrate
7. The influence of TiN thickness and Si[O.sub.2] formation method on the structural and electrical properties of TiN/Hf[O.sub.2]/Si[O.sub.2] gate stacks
8. Experimental investigation of optimum gate workfunction for CMOS four-terminal multigate MOSFETs (MUGFETs)
9. (Plenary) The Revival of Compound Semiconductors and How They Will Change the World in a 5G/6G Era
10. EB metrology of Ge channel gate-all-around FET: buckling evaluation and EB damage assessment
11. Optimization of Resist Ash Processes on Si0.45Ge0.55 Substrates for Post Extension-Halo Ion Implantation
12. Observation of Plasma-Induced Damage in Bulk Germanium ${p}$ -Type FinFET Devices and Curing in High-Pressure Anneal
13. Ground Plane Impact on Performance of Relaxed Ge FinFETs
14. Fabrication challenges and opportunities for high-mobility materials: from CMOS applications to emerging derivative technologies
15. Low temperature epitaxial growth of Ge:B and Ge0.99Sn0.01:B source/drain for Ge pMOS devices: in-situ and conformal B-doping, selectivity towards oxide and nitride with no need for any post-epi activation treatment
16. Understanding the intrinsic reliability behavior of $\boldsymbol{n}$ -/$\boldsymbol{p}$-Si and $\boldsymbol{p}$-Ge nanowire FETs utilizing degradation maps
17. (Invited) Raman Stress Measurements at the Nanoscale
18. Strain and Compositional Analysis of (Si)Ge Fin Structures Using High Resolution X‐Ray Diffraction
19. The Impact of Dummy Gate Processing on Si-Cap-Free SiGe Passivation: A Physical Characterization Study on Strained SiGe 25% and 45%
20. (Invited) Epitaxial CVD Growth of Ultra-Thin Si Passivation Layers on Strained Ge Fin Structures
21. ESD ballasting of Ge FinFET ggNMOS devices
22. Demonstration of sufficient BTI reliability for a 14-nm finFET 1.8 V I/O technology featuring a thick ALD SiO2 IL and Ge p-channel
23. Effects of Negative-Bias-Temperature-Instability on Low-Frequency Noise in SiGe ${p}$ MOSFETs
24. Impact of the low temperature operation on long channel strained Ge pFinFETs fabricated with STI first and last processes
25. On the assessment of electrically active defects in high-mobility materials and devices
26. Low-Frequency Noise Assessment of Different Ge pFinFET STI Processes
27. Wet Selective SiGe Etch to Enable Ge Nanowire Formation
28. Low Temperature Effect on Strained and Relaxed Ge pFinFETs STI Last Processes
29. GR-Noise Characterization of Ge pFinFETs With STI First and STI Last Processes
30. (Invited) Generation-Recombination Noise in Advanced CMOS Devices
31. (Invited) Processing Technologies for Advanced Ge Devices
32. Technology development challenges for advanced group IV semiconductor devices
33. Low-Resistance Titanium Contacts and Thermally Unstable Nickel Germanide Contacts on p-Type Germanium
34. Buried silicon-germanium pMOSFETs: Eanalysis in VLSI logic circuits under aggressive voltage scaling
35. Charge Collection Mechanisms of Ge-Channel Bulk $p$ MOSFETs
36. Total Ionizing Dose Effects on Ge Channel $p$FETs with Raised ${\rm Si}_{0.55}{\rm Ge}_{0.45}$ Source/Drain
37. Activation Energies for Oxide- and Interface-Trap Charge Generation Due to Negative-Bias Temperature Stress of Si-Capped SiGe-pMOSFETs
38. (Invited) Advanced Semiconductor Devices for Future CMOS Technologies
39. TCAD Strain Calibration Versus Nanobeam Diffraction of Source/Drain Stressors for Ge MOSFETs
40. (Invited) Heterogeneous Nano- to Wide-Scale Co-Integration of Beyond-Si and Si CMOS Devices to Enhance Future Electronics
41. Strain and Compositional Analysis of (Si)Ge Fin Structures Using High Resolution X-Ray Diffraction.
42. Strained Ge FinFET structures fabricated by selective epitaxial growth
43. High-Performance Si0.45Ge0.55Implant-Free Quantum Well pFET With Enhanced Mobility by Low-Temperature Process and Transverse Strain Relaxation
44. Nickel Selective Etch for Contacts on Ge Based Devices
45. (Invited) High Ge Content SiGe Thin Films: Growth, Properties and Integration
46. Use of X-ray techniques in the development and production of novel transistor structures
47. Spike Anneal Peak Temperature Impact on 1T-DRAM Retention Time
48. Endurance of One Transistor Floating Body RAM on UTBOX SOI
49. (Invited) Raman Stress Measurements at the Nanoscale
50. NBTI Reliability of SiGe and Ge Channel pMOSFETs With $ \hbox{SiO}_{2}/\hbox{HfO}_{2}$ Dielectric Stack
Catalog
Books, media, physical & digital resources
Discovery Service for Jio Institute Digital Library
For full access to our library's resources, please sign in.