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37 results on '"Weger, Alan J."'

2. Product yield prediction system and critical area database

Author

Barnett, Thomas S., Bickford, Jeanne P., and Weger, Alan J.

Subjects
Integrated circuit fabrication -- Information management, Integrated circuit fabrication -- Management, Production engineering -- Research, Semiconductor wafers -- Production processes, Databases -- Usage, Database, Integrated circuit fabrication, Company systems management, Company business management, Company process management, CD-ROM catalog, CD-ROM database, Business, Computers, Electronics, Electronics and electrical industries
Abstract

Pre-silicon yield estimators for ASIC products have the potential for improved accuracy based on retrospective critical area and yield analysis of completed designs. A prototype closed-loop system, in which a database of observed yield and computed critical areas is continuously compiled and updated, is described in this paper. The database allows a yield model based on circuit content, which is available at the time of quote, but before the physical layout, to be optimized to more accurately reflect a technology's random defect sensitivities. Confining one's observations to the mature 130-nm technology minimizes the inclusion of systematic defects in the observed yield and allows for a more complete view of the random defect component of yield loss. Index Terms--Critical area analysis, yield learning, yield modeling.

Published
2008

6. Effect of temperature on superconducting nanowire single-photon detector noise

Author

Massachusetts Institute of Technology. Department of Electrical Engineering and Computer Science, Massachusetts Institute of Technology. Department of Materials Science and Engineering, Sunter, Kristen A, Najafi, Faraz, Berggren, Karl K, Anant, Vikas, Bahgat Shehata, A., Ruggeri, A., Stellari, F., Weger, Alan J., Song, P., Massachusetts Institute of Technology. Department of Electrical Engineering and Computer Science, Massachusetts Institute of Technology. Department of Materials Science and Engineering, Sunter, Kristen A, Najafi, Faraz, Berggren, Karl K, Anant, Vikas, Bahgat Shehata, A., Ruggeri, A., Stellari, F., Weger, Alan J., and Song, P.

Abstract

Today Superconducting Nanowire Single-Photon Detectors (SNSPDs) are commonly used in different photon-starved applications, including testing and diagnostics of VLSI circuits. Detecting very faint signals in the near-infrared wavelength range requires not only good detection efficiency, but also very low Dark Count Rate (DCR) and jitter. For example, low noise is crucial to enable ultra-low voltage optical testing of integrated circuits. The effect of detector temperature and background thermal radiation on the noise of superconducting single-photon detectors made of NbN meanders is studied in this paper. It is shown that two different regimes can be identified in the DCR vs. bias current characteristics. At high bias, the dark count rate is dominated by the intrinsic noise of the detector, while at low bias current it is dominated by the detection of stray photons that get onto the SNSPD. Changing the detector temperature changes its switching current and only affects the high bias branch of the characteristics: a reduction of the DCR can be achieved by lowering the SNSPD base temperature. On the other hand, changing the temperature of the single-photon light source (e.g. the VLSI circuit under test) only affects the low bias regime: a lower target temperature leads to a smaller DCR. © (2015) COPYRIGHT Society of Photo-Optical Instrumentation Engineers (SPIE). Downloading of the abstract is permitted for personal use only., United States. Air Force Research Laboratory. Intelligence Advanced Research Projects Activity (IARPA ) (contract number FA8650-11-C_7105)

Published
2017

13. A Superconducting Nanowire Single-Photon Detector (SnSPD) System for Ultra Low Voltage Time-Resolved Emission (TRE) Measurements of VLSI Circuits

Author

Stellari, Franco, additional, Weger, Alan J., additional, Kim, Seongwon, additional, Maliuk, Dzmitry, additional, Song, Peilin, additional, Ainspan, Herschel A., additional, Kwark, Young, additional, Baks, Christian W., additional, Kindereit, Ulrike, additional, Anant, Vikas, additional, and Lundquist, Ted, additional

Published
2013
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23. Power-efficient, reliable microprocessor architectures

Author

Bose, Pradip, primary, Buyuktosunoglu, Alper, additional, Cher, Chen-Yong, additional, Darringer, John A., additional, Gupta, Meeta S., additional, Hamann, Hendrik, additional, Jacobson, Hans, additional, Kudva, Prabhakar N., additional, Kursun, Eren, additional, Madan, Niti, additional, Nair, Indira, additional, Rivers, Jude A., additional, Shin, Jeonghee, additional, Weger, Alan J., additional, and Zyuban, Victor, additional

Published
2010
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25. Keeping hot chips cool

Author

Puri, Ruchir, primary, Varma, Devadas, additional, Edwards, Darvin, additional, Weger, Alan J, additional, Franzon, Paul, additional, Yang, Andrew, additional, and Kosonocky, Stephen, additional

Published
2008
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30. Power management of multi-core chips.

Author

Bose, Pradip, Buyuktosunoglu, Alper, Darringer, John A., Gupta, Meeta S., Healy, Michael B., Jacobson, Hans, Nair, Indira, Rivers, Jude A., Shin, Jeonghee, Vega, Augusto, and Weger, Alan J.

Published
2012

31. Power management of multi-core chips: Challenges and pitfalls.

Author

Bose, Pradip, Buyuktosunoglu, Alper, Darringer, John A., Gupta, Meeta S., Healy, Michael B., Jacobson, Hans, Nair, Indira, Rivers, Jude A., Shin, Jeonghee, Vega, Augusto, and Weger, Alan J.

Abstract

Modern processor systems are equipped with on-chip or on-board power controllers. In this paper, we examine the challenges and pitfalls in architecting such dynamic power management control systems. A key question that we pose is: How to ensure that such managed systems are “energy-secure” and how to pursue pre-silicon modeling to ensure such security? In other words, we address the robustness and security issues of such systems. We discuss new advances in energy-secure power management, starting with an assessment of potential vulnerabilities in systems that do not address such issues up front. [ABSTRACT FROM PUBLISHER]

Published
2012
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32. Development of a flexible chip infrared (IR) thermal imaging system for product qualification.

Author

Lian, Chenzhou, Knox, Marc, Sikka, Kamal, Xiaojin Wei, and Weger, Alan J

Abstract

A flexible and efficient chip Infrared (IR) thermal imaging system was implemented on the product manufacturing test platform by collaboration with the burn-in/wafer test, systems, process, and failure analysis teams. A liquid cooling cell was successfully designed and tested. The imaging system was applied to investigate some wafer probe power/thermal issues for server high end products. Furthermore, we applied the method of Spatially-resolved Imaging of Microprocessor Power (SIMP) [1] to translate the thermal map into a power map. Finally, we propose a new concept of product thermal qualification as a supplement and potential alternative to the traditional thermal test vehicle (TTV) qualification. [ABSTRACT FROM PUBLISHER]

Published
2012
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37. Keeping Hot Chips Cool: Are IC Thermal Problems Hot Air?

Author

Puri, Ruchir, Varma, Devadas, Edwards, Darvin, Franzon, Paul, Kosonocky, Stephen, Weger, Alan J., and Yang, Andrew

Subjects
INTEGRATED circuit design, SEMICONDUCTORS, HEAT, PACKAGING, CRISES
Abstract

Thermal issues are becoming more important but is the hype getting the better of the facts? Does this deserve more attention than for some niche designs and technologies such as 3D ICs.? Does the broader design community need to worry about it at 32nm and beyond or it will only impact a small segment of designs? In short, does the severity of power issues coupled with packaging complexity translate into a thermal crisis in future? This is an educational panel with a little bit of controversy that will address the thermal issue in IC design. When will this issue be emerging as a crucial concern if at all? What are the solutions to resolve this potential crisis? [ABSTRACT FROM AUTHOR]

Published
2008

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