1. Investigation of hot carrier degradation in bulk FinFET
- Author
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Hongseon Yang, Hye-Jin Kim, Toshiro Nakanishi, Thomas Kauerauf, Dong-Won Kim, Hyun-Woo Lee, Sangwoo Pae, Kab-Jin Nam, Guangfan Jiao, Sung-il Park, Eun-ae Chung, and Ki Hyun Hwang
- Subjects
010302 applied physics ,Materials science ,business.industry ,Hardware_PERFORMANCEANDRELIABILITY ,02 engineering and technology ,Trapping ,021001 nanoscience & nanotechnology ,01 natural sciences ,Impact ionization ,Planar ,Reliability (semiconductor) ,Logic gate ,0103 physical sciences ,Hardware_INTEGRATEDCIRCUITS ,Electronic engineering ,Optoelectronics ,Degradation (geology) ,0210 nano-technology ,business ,Intensity (heat transfer) ,Hot-carrier injection - Abstract
In this paper, a physical mechanism for hot carrier injection (HCI) induced trap generation and degradation in bulk FinFETs is investigated and verified with both experiment and simulation evidence. HCI degradation is mainly caused by interface states generated by drain avalanche hot carrier injection. From this model, impact ionization intensity, location and trapping immunity are proposed as key parameters to modulate HCI degradation. HCI reliability in I/O FinFETs is severely degraded with respect to planar FETs because of the enhanced capability of the gate to control the channel potential profiles increasing the intensity of the lateral E-field in comparison with planar devices. Based on this FinFET HCI mechanism, we have successfully optimized source/drain junction process to achieve reliable HCI characteristics for 14nm and 10nm FinFET devices.
- Published
- 2017
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