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We developed 16 Mb 1T1R NRAM integrating CNTs resistor elements into the intermediate wirings of 55 nm CMOS. Excellent reliabilities were proven by the retention test at 150 °C extrapolated for 100 kh and the endurance test of 1E6 cycles. The switching speed was realized for cell array at 200 ns. In addition, we successfully fabricated CNTs resistor elements with 49% shrunk small via pitch cell area and realized advantageous high switching speed with 0.5 ns single pulse even omitting verify operation.

Root-cause of instability in carbon nanotubes memristors is analyzed employing ultra-short pulse technique in combination with atomic-level material modeling. Separating various factors affecting switching operations allowed to identify structural features and operational conditions leading to improved cell characteristics.

Carbon nanotubes (CNT) resistance-change memory devices were assessed for neuromorphic applications under high frequency use conditions by employing the ultra-short (100 ps -10 ns) voltage pulse technique. Under properly selected operation conditions, CNTs demonstrate switching characteristics promising for various NN implementations.

Advanced memory technology based on carbon nanotubes (NRAM) has been shown to possess desired properties for implementation in a host of integrated systems due to demonstrated advantages of its operation including high speed (Nanotubes can switch state in picoseconds), high endurance (over a trillion), and low power (with essential zero standby power). The applicable integrated systems have markets that will see compound annual growth rates (CAGR) of over 62% between 2018 and 2023, with an embedded systems CAGR of 115% in 2018 to 2023 [1]. These opportunities for NRAM technology are helping drive the realization of a shift from silicon to a carbon-based memory. NRAM is made up of an interlocking matrix of carbon nanotubes, either touching or slightly separated, leading to low or higher resistance states respectively. The small movement of atoms, as opposed to electrons for traditional memories, renders NRAM with a more robust endurance and high temperature retention/operation which, along with high speed/low power, is expected to blossom in this memory technology to be a disruptive replacement for the current status quo of DRAM (dynamic RAM), SRAM (static RAM), and NAND flash memories.

Advanced memory technology based on carbon nanotubes (CNTs) (NRAM) possesses desired properties for implementation in a host of integrated systems due to demonstrated advantages of its operation including high speed (nanotubes can switch state in picoseconds), high endurance (over a trillion), and low power (with essential zero standby power). The applicable integrated systems for NRAM have markets that will see compound annual growth rates (CAGR) of over 62% between 2018 and 2023, with an embedded systems CAGR of 115% in 2018-2023 (http://bccresearch.com/pressroom/smc/bcc-research-predicts:-nram-(finally)-to-revolutionize-computer-memory). These opportunities are helping drive the realization of a shift from silicon-based to carbon-based (NRAM) memories. NRAM is a memory cell made up of an interlocking matrix of CNTs, either touching or slightly separated, leading to low or higher resistance states respectively. The small movement of atoms, as opposed to moving electrons for traditional silicon-based memories, renders NRAM with a more robust endurance and high temperature retention/operation which, along with high speed/low power, is expected to blossom in this memory technology to be a disruptive replacement for the current status quo of DRAM (dynamic RAM), SRAM (static RAM), and NAND flash memories.

Manufacturability of most electronic devices based on carbon nanotubes depends on the ability to place, manipulate, and control individual structures at the molecular level. This approach is problematic due to the precise placement and registration required thus making large scale manufacturing difficult if not impossible. A novel technique has been developed to overcome this hurdle, allowing CNT based nano-devices to be fabricated directly on existing production CMOS fabrication lines. This technique has been demonstrated in a Class 1 commercial fab and enables the fabrication of CNT nonvolatile memory devices directly onto CMOS substrates. This unique approach relies on the deposition and lithographic patterning, using standard semiconductor toolsets, of a 1-2 nm thick fabric of carbon nanotubes which retain their molecular scale, electro-mechanical characteristics, even when patterned to less than 100 nm feature sizes. The non-volatile CNT switch is turned on using electrostatic forces and remains in the ON state through van der Waals (VDW) attraction. The switch is turned off by overcoming the VDW forces and creating separation of the tubes from a contact.

Manufacturability of most electronic devices based on carbon nanotubes depends on the ability to place, manipulate, and control individual structures at the molecular level. This approach is problematic due to the precise placement and registration required thus making large scale manufacturing difficult if not impossible. A novel technique has been developed to overcome this hurdle, allowing CNT based nanodevices to be fabricated directly on existing production CMOS fabrication lines. This technique has been demonstrated in a Class 1 commercial fab and enables the fabrication of CNT non-volatile memory devices. This unique approach relies on the deposition and lithographic patterning, using standard semiconductor toolsets, of a 1-2 nm thick fabric of nanotubes which retain their molecular scale electro-mechanical characteristics, even when patterned to less than 100 nm feature sizes. The non-volatile CNT switch is turned on using electrostatic forces and remains in the on state through van der Waals (VDW) attraction. The switch is turned off by overcoming the VDW forces and creating separation of the tubes from a contact. The resulting devices are free from metallic or material contaminants and particulates. Because these non-volatile memory elements are created in an all thin-film process, they are easily integrated directly within existing CMOS circuitry to facilitate addressing and readout. Devices fabricated on a commercial line and integrated with transistors have been switched successfully both as single bits and in arrays. Devices have been switched over 50 million times without failure - continued testing is underway. Write and erase voltages can be less than 5 V and can scale downwards with smaller geometries. Additionally, the switch has been tested and shown to switch in less than 3 ns. Design consideration, device structure, testing, and reliability data are presented

Manufacturability of electronic devices based on carbon nanotubes (CNT) generally depends on the ability to manipulate and control individual structures at the molecular level. A novel technique has been developed to overcome this hurdle, allowing CNT-based nano-electromechanical devices to be fabricated directly on existing production CMOS fabrication lines. The first demonstration of this technique has resulted in a CNT nonvolatile memory element. This unique approach relies on the deposition and lithographic patterning of a 1-2 nm thick fabric of nanotubes which retain their molecular-scale electromechanical characteristics, even when patterned with 180 nm feature sizes. Individual patches of this CNT fabric can be elastically deformed by electro-static attraction to metal electrodes, creating a pair of stable nonvolatile states around the equilibrium of two molecular-level forces: an attractive van der Waals force and the restoring tensile strain within the deformed fabric. A CMOS-compatible fabrication process for these devices has been developed and demonstrated which is free from metallic or material contaminants and particulates. Because these nonvolatile memory elements are created in an all thin-film process, they can be monolithically integrated directly within existing CMOS circuitry to facilitate addressing and readout. Design considerations and preliminary device switching characteristics are presented.

This paper details the results of a project to transition Nantero's laboratory carbon nanotube (CNT) process technology into the BAE Systems radiation-hard CMOS production foundry to enable the development of novel nanotechnology-based solutions for government space applications. Working jointly, BAE Systems and Nantero have successfully developed the necessary processes, recipes, and protocols to enable BAE Systems to develop rad-hard CMOS-CNT hybrid devices and circuits. The success of this project has established the BAE Systems Manassas, VA facility as the first U.S. government sponsored foundry to qualify carbon nanotubes for use within a production fab line. The project addressed all aspects needed to qualify nanotubes and comprised three main steps: 1) development of recipes for coating a 150 mm wafer with a monolayer fabric of single-walled nanotubes (SWNTs), 2) edge-bead removal (EBR) of the CNTs from around the edge, bevel, and backside of the wafer to prevent contamination of further processing equipment, 3) demonstration of repeatable coating and EBR of the CNTs between various wafers over multiple lots. The fabrication process for creating a 1-2 nm thick monolayer fabric of SWNTs is described and characterized with respect to the fabric thickness, resistivity, elemental composition, particle count and uniformity

The radiation hardness characteristics of nano-electromechanical single-walled carbon nanotube (SWNT) memory elements has been studied. The NRAM bits have been exposed to 100 krad, 1 Mrad and 10 Mrad of gamma-radiation. Initial test results indicate that NRAM is an extremely radiation hard memory.