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2. Noise behavior of a 180 nm CMOS SOI technology for detector front-end electronics

3. Impact of lateral isolation oxides on radiation-induced noise degradation in CMOS technologies in the 100-nm regime

5. Noise performance of 0.13 [micro]m CMOS technologies for detector front-end applications

6. Survey of noise performances and scaling effects in deep submicrometer CMOS devices from different foundries

7. Response of SOI bipolar transistors exposed to [gamma]-rays under different dose rate and bias conditions

8. Fermilab silicon strip readout chip for BTeV

9. Noise analysis of NPN SOI bipolar transistors for the design of charge measuring systems

10. Effects of [gamma]-rays on JFET devices and circuits fabricated in a detector-compatible process

11. Comparison of ionizing radiation effects in 0.18 and 0.25 [micro]m CMOS technologies for analog applications

12. JFET front-end circuits integrated in a detector-grade silicon substrate

14. Radiation hardness perspectives for the design of analog detector readout circuits in the 0.18-/[micro]m CMOS generation

15. A fabrication process for silicon microstrip detectors with integrated front-end electronics

17. Monolithic pixel detectors in a 0.13 µm CMOS technology with sensor level continuous time charge amplification and shaping

18. A bulk-JFET and CMOS/SIMOX technology for low noise, high speed charge-sensitive amplifier

27. Noise Performance of 0.13 μm CMOS Technologies for Detector Front-End Applications.

28. Total Ionizing Dose Effects on the Noise Performances of a 0.13 ,μm CMOS Technology.

29. Response of SOT Bipolar Transistors Exposed to γ-Rays Under Different Dose Rate and Bias Conditions.

30. Proton-Induced Damage in JFET Transistors and Charge Preamplifiers on High-Resistivity Silicon.

31. Effects of γ-Rays on JFET Devices and: Circuits Fabricated in a Detector-Compatible Process.

32. Comparison of Ionizing Radiation Effects in 0.18 and 0.25 &um;m CMOS Technologies for Analog Applications.

33. Radiation Hardness Perspectives for the Design of Analog Detector Readout Circuits in the 0.18-μm CMOS Generation.

34. A Fabrication Process for Silicon Microstrip Detectors With Integrated Front-End Electronics.

35. ILC Reference Design Report Volume 3 - Accelerator

36. International Linear Collider Reference Design Report Volume 2: Physics at the ILC

37. ILC Reference Design Report Volume 4 - Detectors

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