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38th European Photovoltaic Solar Energy Conference and Exhibition; 198-203, In this paper, we investigate the quality of epitaxially grown, 110 μm thick, n- and p-type silicon (Si) layers deposited in a CVD batch reactor of microelectronic standard. Two types of wafers are characterized: ‘EpiRef’ grown on chemically and mechanically polished reference substrates and ‘EpiWafer’ grown on substrates with a porous silicon detachment layer. EpiRef wafers exhibit excellent minority carrier lifetimes of 2.5 ms for n-type and 1.3 ms for p-type. EpiWafers show reduced, but still promising lifetimes of 0.5 ms (in local areas up to 1 ms) for n-type and 40 μs for p-type. For EpiWafers, we found that quality limitations are due to stacking faults as well as interstitial iron contamination for p-type. An efficiency limiting bulk recombination analysis (ELBA), allows for an assessment of the corresponding efficiency potential assuming a TOPCon cell model with a cell limit of 25.9 % for n-type and a TOPCoRE cell model with a cell limit of 26.5 % for p-type. In selected 1 cm² areas, potential efficiencies of EpiRef wafers are only -0.4 %abs below the theoretical cell limit for n-type and -1.3 %abs for p-type whereas EpiWafers feature losses of -1.2 %abs for n-type and even -5.4 %abs for p-type.

37th European Photovoltaic Solar Energy Conference and Exhibition; 444-448, We work on the transfer from CZ wafers to epitaxially grown Si and Ge wafers on reusable substrates with a porous detachment layer (“kerfless wafering”) to reduce material and energy consumption. We report on our progress of applying the kerfless wafering approach to Si and to Ge wafers. For Si, we develop templates and epitaxially grown wafers (SiEpiWafers) since many years in our self-made CVD reactor (“RTCVD”) and are now bringing their quality to the next level with a new, microelectronic CVD reactor (“PEpi”) which allows us to grow 6” and 156x156 mm² (M0) epitaxial Si wafers with adjustable thickness and doping level (n- and p-type). In the first test runs, we achieved as-grown lifetimes up to 840 µs and a total thickness variation of ~ 10%. For Ge, we were successful in developing and understanding a porous layer stack leading to 4” detachable Ge templates for future Ge or III-V epitaxial growth.

35th European Photovoltaic Solar Energy Conference and Exhibition; 309-313, In this publication we discuss inline aspects of fabricating freestanding epitaxially grown thin silicon for solar cells. Especially the inline electrochemical porosification and its limitations are discussed and homogeneity improvements achieved with aid of electric simulations are presented. Different types of inhomogeneity for porous silicon layers lead to difficulties when forming a proper separation layer through reorganization and the detachment yield of the epitaxial thin film is affected. One of the solutions to ensure good detachment of the films is to form several local separation layers in a kind of puff pastry like structure where detachment of epitaxial film might proceed in any of the separation layers thus increasing yield. However, in case of too high porosity of the highly porous layer, large cavities without smaller supporting silicon pillars can collapse during reorganization and the surface layer can re-attach to the substrate making detachment of this area impossible. Additionally, local warping of the reorganized template before epitaxy can lead to detrimental defects like stacking faults.