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A metasurface is a layer of subwavelength-scale nanostructures that can be used to design functional devices in ultrathin form. Various metasurface-based optical devices – coined as flat optics devices – have been realized with distinction performances in research laboratories using electron beam lithography. To make such devices mass producible at low cost, metasurfaces over a large area have also been defined with lithography steppers and scanners, which are commonly used in semiconductor foundries. This work reviews the metasurface process platforms and functional devices fabricated using complementary metal-oxide-semiconductor-compatible mass manufacturing technologies. Taking both fine critical dimension and mass production into account, the platforms developed at the Institute of Microelectronics (IME), A*STAR using advanced 12-inch immersion lithography have been presented with details, including process flow and demonstrated optical functionalities. These developed platforms aim to drive the flat optics from lab to fab.

Metalenses made of artificial sub-wavelength nanostructures have shown the capability of light focusing and imaging with a miniaturized size. Here, we report the demonstration of mass-producible amorphous silicon metalenses on a 12-inch glass wafer via the complementary metal-oxide-semiconductor compatible process. The measured numerical aperture of the fabricated metalens is 0.496 with a focusing spot size of 1.26 μm at the wavelength of 940 nm. The metalens is applied in an imaging system to test the imaging resolution. The minimum bar of the resolution chart with a width of 2.19 μm is clearly observed. Furthermore, the same system demonstrates the imaging of a fingerprint, and proofs the concept of using metalens array to reduce the system size for future compact consumer electronics.

Half-wave plate (HWP) is one of the key polarization controlling devices in optical systems. The conventional HWPs based on birefringent crystals are inherently bulky and difficult to be monolithically integrated with other optical components. In this work, metasurface-based HWPs with high compactness are demonstrated on a 12-inch silicon complementary metal-oxide-semiconductor platform. Three-dimensional finite difference time domain simulation is used to design the nanostructure and investigate the impact of fabrication process variation on the device performance. In addition, the cross- and co-polarization transmittance (Tcross and Tco) of the HWPs located at different wafer locations are characterized experimentally. The peak Tcross and valley Tco values of 0.69 ± 0.053 and 0.032 ± 0.005 are realized at the wavelength around 1.7 μm, respectively. This corresponds to a polarization conversion efficiency of 95.6% ± 0.8%.

Metasurface-based beam deflector, as an important optical element to bend the light propagation direction, has drawn a lot of interests in research to achieve miniaturization of devices and reduction of system complexity. Based on the 12-inch immersion lithography technology, in this work, an ultra-thin and large-area pixelated metasurface beam deflector with a footprint of 2500 × 2500 μm, formed by nanopillars with diameters from 221 to 396 nm, is demonstrated on a 12-inch glass wafer. The 21 × 21 array of deflectors is designed to bend the input light in different directions and to generate 441 random points. In addition, the layer transfer on the 12-inch glass wafer makes the device working in transmission mode at a 940-nm wavelength. The random point array generated from the experiment shows good match with the design. This pixelated metasurface beam deflector can generate random points simultaneously and has potential to make beam steering by switching each pixel of the beam deflector, which can be applied on motion detection, facial recognition, and light detection and ranging.

An effective 2-D self-consistent solution of Schrodinger-Poisson (SP) within the effective mass approximation was used to gain insight into the capacitance-voltage [C([V.sub.g])] features of cylindrical gate-all-around n- and p-channel Si nanowire MOS structures. The studies related to the density-of-states features of the Si channel from the capacitance-voltage characteristics at room temperature measurements are also presented.

Several simulations are conducted for the calibration of the various charge-based capacitance measurement techniques that are used for the nanoscale devices. The various effects of charge injection and numerical error in the technique are also discussed.

The technology status for realizing the gate-all-around nanowire (GAA NW) device structures and their applications in logic circuit and nonvolatile memories are reviewed. The top-down techniques for GAA NW CMOS provide different ways to newer application opportunities for Si technology.

Arrays of highly ordered n-type silicon nanowires (SiNW) are fabricated using complementary metal-oxide semi-conductor (CMOS) compatible technology, and their applications in biosensors are investigated. Peptide nucleic acid (PNA) capture probe-functionalized SiNW arrays show a concentration-dependent resistance change upon hybridization to complementary target DNA that is linear over a large dynamic range with a detection limit of 10 fM. As with other SiNW biosensing devices, the sensing mechanism can be understood in terms of the change in charge density at the SiNW surface after hybridization, the so-called 'field effect'. The SiNW array biosensor discriminates satisfactorily against mismatched target DNA. It is also able to monitor directly the DNA hybridization event in situ and in real time. The SiNW array biosensor described here is ultrasensitive, non-radioactive, and more importantly, label-free, and is of particular importance to the development of gene expression profiling tools and point-of-care applications.