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This work reports first original results on the impact of active in-situ electro-thermal recovery, on the electrical and low-frequency noise characteristics of N-type MOS transistor with thick high-k metal gate oxide, from 28 nm Fully Depleted Silicon-On-Insulator (FDSOI) process. In order to recover “typical” device characteristics, four cycles of local thermal annealing up to 590K are applied for 14 ms each, using an active silicide source. Experimental results reveal an important improvement of the “corner” transistor’s I-V behavior allowing the recovery of “typical” device characteristics. An increase of the maximum transconductance by 43% is obtained. In the same time, a typical device stays unaffected by this local annealing. Low-frequency noisemeasurements showa clear reduction of the 1/f noise and Random Telegraph Noise by almost one decade, after the electro-thermal recovery. This can explain the improvement of the electrical characteristics by annealing of defects.

In this work, we discuss the I-V and low-frequency noise characteristics of on-membrane 6$\mu$m-wide 1$\mu$m-long n-MOSFETs for analog low-power sensor interfaces, in e.g. pressure or gas measurements. After MEMS processing (i.e. bulk Si Deep Reactive Ion Etching), a high power spectral density (PSD) with clear signs of Random Telegraph Noise (RTN) (with $\Delta$Id/Id as high as 40%) is observed. Cadence simulations predict lower PSD values. At the same time, the MOSFET I-V measurements show threshold voltage, transconductance and subthreshold slope discrepancies compared to simulations. In order to heal these detrimental effects of DRIE, a high-temperature in-situ thermal annealing ($T=265^{\circ}$C for 2 min) is applied. As a result, the noise power is reduced by a factor of about 10, the MOSFET electrical characteristics are also partially recovered and become close to simulations. An analytical study based on noise and current models fits the interpretation of effects linked to interface traps.

In this paper, we investigate the recovery of some semiconductor-based components, such as N/P-type field-effect transistors (FETs) and a complementary metal–oxide–semiconductor (CMOS) inverter, after being exposed to a high total dose of gamma ray radiation. The employed method consists mainly of a rapid, low power and in situ annealing mitigation technique by silicon-on-insulator micro-hotplates. Due to the ionizing effect of the gamma irradiation, the threshold voltages showed an average shift of −580 mV for N-channel transistors, and −360 mV for P-MOSFETs. A 4 min double-cycle annealing of components with a heater temperature up to 465 °C, corresponding to a maximum power of 38 mW, ensured partial recovery but was not sufficient for full recovery. The degradation was completely recovered after the use of a built-in high temperature annealing process, up to 975 °C for 8 min corresponding to a maximum power of 112 mW, which restored the normal operating characteristics for all devices after their irradiation.

In this work we investigate the characteristics and critical operating temperatures of on-membrane embedded MOSFETs from an experimental and analytical point of view. This study permits us to conclude the possibility of integrating electronic circuitry in the close vicinity of micro-heaters and hot operation transducers. A series of calibrations and measurements has been performed to examine the behaviors of transistors, inverters and diodes, actuated at high temperature, on a membrane equipped with an on-chip integrated micro-heater. The studied n- and p-channel body-tied partially-depleted MOSFETs and CMOS inverter are embedded in a 5 ?m-thick membrane fabricated by back-side MEMS micromachining using SOI technology. It has been noted that a pre-stabilization step after the harsh post-CMOS processing, through an in situ high-temperature annealing using the micro-heater, is mandatory in order to stabilize the MOSFETs characteristics. The electrical characteristics and performance of the on-membrane MOS components are discussed when heated up to 335 ?C. This study supports the possibility of extending the potential of the micro-hotplate concept, under certain conditions, by embedding more electronic functionalities on the interface of on-membrane-based sensors leading to better sensing and actuation performances and a total area reduction, particularly for environmental or industrial applications.