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Trap Recovery by in-Situ Annealing in Fully-Depleted MOSFET With Active Silicide Resistor

Authors :
Sedki Amor
Ph. Galy
Valeriya Kilchytska
Denis Flandre
Source :
IEEE Electron Device Letters. 42:1085-1088
Publication Year :
2021
Publisher :
Institute of Electrical and Electronics Engineers (IEEE), 2021.

Abstract

This work reports first original results on the impact of active in-situ electro-thermal recovery, on the electrical and low-frequency noise characteristics of N-type MOS transistor with thick high-k metal gate oxide, from 28 nm Fully Depleted Silicon-On-Insulator (FDSOI) process. In order to recover “typical” device characteristics, four cycles of local thermal annealing up to 590K are applied for 14 ms each, using an active silicide source. Experimental results reveal an important improvement of the “corner” transistor’s I-V behavior allowing the recovery of “typical” device characteristics. An increase of the maximum transconductance by 43% is obtained. In the same time, a typical device stays unaffected by this local annealing. Low-frequency noisemeasurements showa clear reduction of the 1/f noise and Random Telegraph Noise by almost one decade, after the electro-thermal recovery. This can explain the improvement of the electrical characteristics by annealing of defects.

Details

ISSN :
15580563 and 07413106
Volume :
42
Database :
OpenAIRE
Journal :
IEEE Electron Device Letters
Accession number :
edsair.doi...........8799743d2d68219acfbd9c2184e7dc24