46 results on '"Sangmoo Choi"'
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2. Extraction of intrinsic contact resistance in organic thin-film transistors with single channel length and high capacitance density
3. High work-function metal gate and high-k dielectrics for charge trap flash memory device applications
4. Influence of Intercell Trapped Charge on Vertical NAND Flash Memory
5. Organic Field-Effect Transistors with a Bilayer Gate Dielectric Comprising an Oxide Nanolaminate Grown by Atomic Layer Deposition
6. Self-forming electrode modification in organic field-effect transistors
7. Organic field-effect transistor circuits using atomic layer deposited gate dielectrics patterned by reverse stamping
8. Stable Organic Field-Effect Transistors for Continuous and Nondestructive Sensing of Chemical and Biologically Relevant Molecules in Aqueous Environment
9. Recent advances in the science and engineering of organic light-emitting diodes (Conference Presentation)
10. Highly stable organic field-effect transistors with engineered gate dielectrics (Conference Presentation)
11. A novel three-dimensional dual control-gate with surrounding floating-gate (DC-SF) NAND flash cell
12. A Study on Reducing Contact Resistance in Solution-Processed Organic Field-Effect Transistors
13. Solution-based electrical doping of semiconducting polymer films over a limited depth
14. New Pixel Circuit Design Employing an Additional Pixel Line Insertion in AMOLED Displays Composed by Excimer Laser-Crystallized TFTs
15. 27.1: Integrated pMOS Gate Driver for a 3D AMOLED Display
16. An Advanced External Compensation System for Active Matrix Organic Light-Emitting Diode Displays With Poly-Si Thin-Film Transistor Backplane
17. Improvement of memory properties for MANOS-type nonvolatile memory devices with high-pressure wet vapor annealing
18. Top-gate organic field-effect transistors fabricated on shape-memory polymer substrates
19. Stable low-voltage operation top-gate organic field-effect transistors on cellulose nanocrystal substrates
20. Improved metal-oxide-nitride-oxide-silicon-type flash device with high-k dielectrics for blocking layer
21. Nano-Scale Memory Characteristics of Silicon Nitride Charge Trapping Layer with Silicon Nanocrystals
22. Effective Work Function of Scandium Nitride Gate Electrodes on SiO2and HfO2
23. High-pressure deuterium annealing for improving the reliability characteristics of silicon–oxide–nitride–oxide–silicon nonvolatile memory devices
24. High-k Gate Dielectric Prepared by Low-Temperature Wet Oxidation of Ultrathin Metal Nitride Directly Deposited on Silicon
25. Inherent Issues and Challenges of Program Disturbance of 3D NAND Flash Cell
26. High Pressure H2/D2 Annealed SONOS Nonvolatile Memory Devices
27. Excellent Electrical Characteristics of SONOS-type Flash Memory with High-κ Dielectric as Trapping and Blocking Layer
28. Electrical Characteristics of ZrO2Gate Dielectric Deposited on Ultrathin Silicon Capping Layer for SiGe Metal-Oxide-Semiconductor Device Applications
29. Voltage Drop Compensation Method for Active Matrix Organic Light Emitting Diode Displays
30. 53.3: Redundant Pixel Line Insertion for Laser Crystallization Based Large Size LTPS AMOLED Displays
31. Formation of TaN nanocrystals embedded in silicon nitride by phase separation methods for nonvolatile memory applications
32. Improved Conductance Method for Determining Interface Trap Density of Metal–Oxide–Semiconductor Device with High Series Resistance
33. Electrical Characteristics of Metal–Oxide–Semiconductor Device with Sc Gate on Atomic-Layer-Deposited HfO2
34. Memory characteristics of silicon nitride with silicon nanocrystals as a charge trapping layer of nonvolatile memory devices
35. Highly thermally stable TiN nanocrystals as charge trapping sites for nonvolatile memory device applications
36. Effect of Capacitance-Voltage Sweep on the Flat-Band Voltage of Metal-Oxide-Semiconductor Device with High-k Gate Dielectric
37. 38.4: 6-bit AMOLED with RGB Adjustable Gamma Compensation LTPS TFT Circuit
38. High density silicon nanocrystal embedded in sin prepared by low energy (<500eV) SiH/sub 4/ plasma immersion ion implantation for non-volatile memory applications.
39. Improved Charge-Trapping Nonvolatile Memory with Dy-doped HfO2 as Charge-Trapping Layer and Al2O3 as Blocking Layer
40. Improved metal–oxide–nitride–oxide–silicon-type flash device with high-k dielectrics for blocking layer
41. Atomic-layer deposited IrO2nanodots for charge-trap flash-memory devices.
42. High Work-Function Metal Gate and High-κ Dielectrics for Charge Trap Flash Memory Device Applications.
43. Impact of Metal Work Function on Memory Properties of Charge-Trap Flash Memory Devices Using Fowler—Nordheim PIE Mode.
44. Improved reliability characteristics of ultrathin SiO2 grown by low temperature ozone oxidation
45. Multi-layered Vertical Gate NAND Flash overcoming stacking limit for terabit density storage.
46. The impact of work-function of metal gate and fixed oxide charge of high-k blocking dielectric on memory properties of NAND type charge trap flash memory devices.
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