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This paper proposes a novel wavelet transform based relaying scheme for power transformer protection. The relay logic consists of two parts: disturbance detection based on first level high frequency details of the voltage signals only and fault discrimination using a power based directional signal derived from the first level high frequency details of both voltage and current signals. The logic is deterministic, computationally efficient, fast, secure and highly reliable. The operating time is 6 ms, about 1/3rd of power frequency cycle (20 ms). The scheme uses only the sign of the directional signals, rather than the difference in their magnitudes, hence it can work reliably in the presence of transformer tap variation, fault resistance and CT saturation. The validity of the proposed logic was exhaustively tested by simulating various types of internal and external faults, energization conditions and load variations on a 132 kV system modeled in ATP/EMTP with a 31.5 MVA, 132/33 kV, Y-? transformer. The proposed logic was able to correctly discriminate between internal faults, external faults and non-fault disturbances for all the 880 test cases. � 2007 Elsevier B.V. All rights reserved.

A wavelet-based digital directional relay for power transformer protection, implemented using field programmable gate array. The general purpose SPARTAN3E FPGA kit was employed for developing the prototype relay, with all the coding done using the hardware description language VHDL. The relay logic consists of two parts: disturbance detection based on first-level high-frequency details of the voltage signals and fault discrimination using a power-based directional signal derived from the first-level high-frequency details of both voltage and current signals. The real-time windows target Toolbox of MATLAB was used to apply the current and voltage input signals to the prototype relay in real-time. The logic is deterministic, computationally efficient, fast, secure and highly reliable. The operating time is 6 ms, about one-third of power frequency cycle (20 ms). The scheme uses only the sign of the directional signals, rather than the difference in their magnitudes, hence it can work reliably in the presence of fault resistance and current transformer saturation. The validity of the proposed logic was exhaustively tested by simulating various types of internal and external faults, energisation conditions and load variations on a 132 kV system modelled in EMTP/ATP with a 31.5 MVA, 132/33 kV, Y-Delta transformer. The relay was able to correctly discriminate between internal faults, external faults and non-fault disturbances for the entire 880 test cases.

This paper presents a fast hardware-efficient logic for fault detection and classification in transmission lines, implemented using a field-programmable gate array (FPGA). The general-purpose SPARTAN3E FPGA was employed for developing the prototype, with all the coding done using a hardware description language (HDL) called very high speed integrated circuit (VHDL). The proposed logic employs only one-terminal current samples and is based on wavelet analysis. Depending on the amount of high frequency components in the current signals after processing, the faults are classified into ten types. The Real Time Windows Target Toolbox of MATLAB was used to apply the current signal inputs to the prototype in real time. An adaptive threshold value is chosen, rather than a fixed threshold in the case of faults involving the ground, to make the classification reliable and accurate. The fault classification time is 6 ms, which is about 1/3 of the power frequency cycle (20 ms). A high level of computational efficiency is achieved as compared to the other wavelet-transform-based algorithms, since only the high frequency details at first level are employed in this algorithm. The validity of the proposed logic was exhaustively tested by simulating various types of faults on a system modeled in the Electromagnetic Transients Program/Alternative Transients Program. The proposed logic was found to be highly reliable and accurate, even in the presence of fault resistance. � 2009 IEEE.

This paper presents a high speed, computationally efficient scheme for protection of transmission lines. The relay logic consists of three parts: directional protection, fault classification and fault location. Wavelet transform is used for extracting information from the fault transients and only the first level high frequency details of the voltages and currents are used. Proposed protection logic compares the directional signals from both terminals to discriminate between faults inside and outside the zone of interest. Fault classification is achieved using local terminal current information. An estimate of the location of the faults is obtained utilizing single faulted phase current information from both terminals. The logic is deterministic and can work reliably in the presence of fault resistance, load variation and CT saturation. The validity of the proposed logic was exhaustively tested by simulating various types of faults on a four bus meshed system modeled in EMTP/ATP. � 2009 Elsevier Ltd. All rights reserved.

This article presents a fast, hardware efficient logic for fault detection and classification in transmission lines. The proposed logic employs only one-terminal current samples and is based on multi-resolution wavelet analysis. First-level high-frequency details of the modal currents in the range of 5 to 10 kHz are extracted. Depending on the amount of high-frequency components in the transformed current signals after processing, the faults are classified into ten types. An adaptive threshold value is chosen, rather than a fixed threshold in the case of faults involving the ground, to make the classification reliable and accurate. The validity of the proposed logic was exhaustively tested by simulating various types of faults on a system modeled in Alternative Transient Program (ATP)/Electromagnetic Transient Program (EMTP).The proposed logic was found to be acceptably reliable and accurate even in the presence of fault resistance and current transformer (CT) saturation.

A new method for the solution of the problems of unit commitment (UC) and economic dispatch (ED) using Hopfield neural network (HNN) is proposed in this paper. The difficulty in combining these problems is that while the first one requires a discrete neuron model, the latter requires a continuous neuron model. The combined solution of these problems using HNN requires the interconnection of discrete and continuous neural network models and the formulation of a unified energy function, which is quite complicated. The important contribution of this work is the proposal of a new architecture for the discrete HNN for UC and the output of the UC module is used as input to the continuous HNN for ED. The associated advantage of using HNN for the combined solution of UC and ED is the decoupling of their interdependency i.e:, both the UC and ED are iteratively solved using respective HNN for the particular period. The implementation of the proposed method causes a considerable reduction in the HNN size and hence complexity and computation requirements, compared to earlier attempts. The method was successfully tested for different cases (3,10,11 and 26 generator units), with varying load pattern of different durations (24 and 168 hours).