68 results on '"Ryszard Szplet"'
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2. A brief review of wave union TDCs.
3. Multisampling wave union time-to-digital converter.
4. Time-to-Digital Converter with Pseudo-Segmented Delay Line.
5. A 9 ps time interval digitizer based on pulse repetition and averaging.
6. Efficient Implementation of Multiple Time Coding Lines-Based TDC in an FPGA Device.
7. Digital-to-time converter with pulse train generation capability.
8. Measurement Uncertainty of Precise Interpolating Time Counters.
9. Four-channel, precise, time-event recorder in programmable device.
10. A time digitizer based on multiphase clock implemented in FPGA device.
11. A comparison of methods for time-to-digital conversion based on independent coding lines and multi-edge coding.
12. High-Precision Time Digitizer Based on Multiedge Coding in Independent Coding Lines.
13. An Eight-Channel 4.5-ps Precision Timestamps-Based Time Interval Counter in FPGA Chip.
14. Subpicosecond-resolution time-to-digital converter with multi-edge coding in independent coding lines.
15. Subpicosecond resolution time interval counter with multisampling wave union type B TDCs in 28 nm FPGA device
16. An FPGA-Integrated Time-to-Digital Converter Based on Two-Stage Pulse Shrinking.
17. Efficient Implementation of Multiple Time Coding Lines-Based TDC in an FPGA Device
18. Bubble-Proof Algorithm for Wave Union TDCs
19. Two-Stage Clock-Free Time-to-Digital Converter Based on Vernier and Tapped Delay Lines in FPGA Device
20. A combination of multi-edge coding and independent coding lines for time-to-digital conversion.
21. A brief review of wave union TDCs
22. Interpolating time counter with 100 ps resolution on a single FPGA device.
23. Multisampling wave union time-to-digital converter
24. Stanowisko do badań termicznych z dedykowanym oprogramowaniem
25. Zautomatyzowane stanowisko do identyfikacji charakterystyki przetwarzania precyzyjnego generatora odcinków czasu
26. 5 ps Jitter Programmable Time Interval/Frequency Generator
27. Measurement subsystem for evaluation of local atomic clocks quality
28. Time-to-Digital Converter with Pseudo-Segmented Delay Line
29. A 9 ps time interval digitizer based on pulse repetition and averaging
30. Precise Time Digitizer Based on Counting Method and Multiphase In-Period Interpolation
31. Time interval measurement module implemented in SoC FPGA device
32. An Eight-Channel 4.5-ps Precision Timestamps-Based Time Interval Counter in FPGA Chip
33. High-Precision Time Digitizer Based on Multiedge Coding in Independent Coding Lines
34. Digital-to-time converter with pulse train generation capability
35. Picosecond-precision multichannel autonomous time and frequency counter
36. A time digitizer based on multiphase clock implemented in FPGA device
37. An FPGA-Integrated Time-to-Digital Converter Based on Two-Stage Pulse Shrinking
38. Precise three-channel integrated time counter
39. A combination of multi-edge coding and independent coding lines for time-to-digital conversion
40. Modular time interval counter
41. Subpicosecond-resolution time-to-digital converter with multi-edge coding in independent coding lines
42. A 7.5 ps single-shot precision integrated time counter with segmented delay line
43. Local Clocks quality Evaluation Subsystem
44. Single-chip low-cost time counter for distance measurements with 3 cm resolution
45. Field-programmable-gate-array-based time-to-digital converter with 200-ps resolution
46. Time-to-Digital Converters
47. Several issues on the use of independent coding lines for time-to-digital conversion
48. Interpolating time counter with multi-edge coding
49. A two-stage time-to-digital converter based on cyclic pulse shrinking
50. Quantization error in precision time counters
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