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Resonant clock distributions have the potential to save power by recycling energy from cycle-to-cycle while at the same time improving performance by reducing the clock distribution latency and filtering out non-periodic noise. While these features have been successfully demonstrated in several small-scale experiments, there remained a number of concerns about whether these techniques would scale to a product application. By modifying the Cell broadband engine processor to incorporate a large resonant global clock network, power savings with full functionality is demonstrated over a 20% range in clock frequencies, and a 6-8 Watt power savings at 4 GHz. This was achieved by changing one wiring level and adding an additional thick copper level to create inductors and capacitors.

In this paper, we highlight the effectiveness and flexibility of SiGe BiCMOS as a technology platform over a wide range of performance and applications. The bandgap-engineered SiGe heterojunction bipolar transistors (HBTs) continue to be the workhorse of the technology, while the CMOS offering is fully foundry compatible for maximizing IP sharing. Process customization is done to provide high-quality passives, which greatly enables fully integrated single-chip solutions. Product examples include 40-Gb/s (OC768) components using high-speed SiGe HBTs, power amplifiers compatible for cellular applications, integrated voltage-controlled oscillators, and very high-level mixed-signal integration. It is argued that such key enablements along with the lower cost and higher yields attainable by SiGe BiCMOS technologies will provide competitive solutions for the communication marketplace.

Silicon–germanium (SiGe) heterojunction bipolar transistor (HBT) BICMOS technology is a stable, ultra-high performance, semiconductor technology capable of supporting mixed-signal, very large-scale integration (VLSI) circuit designs for a variety of emerging communication applications. This technology is supported by a computer-aided design (CAD) system that supports a variety of high-performance circuit designs, mixed-signal circuit block reuse, and the ability to accurately predict circuit performance at the highest frequencies. This paper summarizes the progress this technology has made in recent years in moving from the research laboratory to a production environment. We also specifically address performance, operating voltage, reliability and integration considerations for using 100–200 GHz SiGe HBTs in high-speed (10–40 Gb/s) network ICs, an application space previously only addressed by InP technology. All indications are that SiGe will be very successful at addressing this new application space, and all facets of the networking IC market.

Experimental results are presented on microwave inductors, transformers, and transmission lines fabricated in an Si/SiGe heterojunction-bipolar-transistor process with standard metallization and a thick polyimide dielectric. Microstrip transmission lines with characteristic impedances from 44 to 73 /spl Omega/, Q's from 10 to 14, and insertion losses from 0.11 to 0.16 dB/mm at 10 GHz are presented. Conventional planar inductors with inductances from 0.5 to 15 nH and with peak Q's up to 22 are presented. Lateral transformers with a maximum available gain of better than -5 dB and a measured coupling coefficient (k) of 0.6 at 5.5 GHz and 0.4 up to 12.5 GHz are also discussed.

Differential thermal expansion mismatch between Cu and Si along with high aspect ratios required for TSV pose unique challenges to the integration and reliability of Cu TSV. A TSV structure that successfully mitigates these concerns has been integrated into CMOS with high K/metal gates. Data from test structures demonstrate no ‘Cu pumping’ or other deleterious effects to neighboring devices or interconnects. Functional 3D prototypes utilizing stacked embedded DRAMs were demonstrated showing no impact from TSV processing.

Node-agnostic Cu TSVs integrated with high-K/metal gate and embedded DRAM were used in functional 3D modules. Thermal cycling and stress results show no degradation of TSV or BEOL structures, and device and functional data indicate that there is no significant impact from TSV processing and/or proximity.

With the emergence of wired and wireless communication technologies, on-chip inductors find applications in a variety of high performance radio frequency (RF) circuits. In this work, we present two approaches for high-performance copper inductors in an RF technology. In the first approach (Type I), we lower ohmic losses to realize a high Q-factor. This is achieved by using, for the first time in a manufacturable technology, 4 μm thick copper spirals along with a 4 μm thick copper underpass on high-resistivity substrates (75 Ω-cm). The underpass is connected to the spirals with a 4 μm tall copper via, which lowers spiral to underpass capacitance. For further lowering the capacitive losses, an additional 6.1 μm thick interlayer dielectric separates the underpass from the substrate. In the second approach (Type II), we utilize a novel one-mask CMOS-compatible micromachining scheme to eliminate substrate losses. This is achieved by completely removing the silicon substrate from directly below the inductors. For a 1.1nH inductor, peak-Q shows an impressive two-fold improvement from 26.6 at 3.8 GHz for Type I inductor to 52.8 at 8.2 GHz for Type II inductor after silicon micromachining. The resonant frequency increases from 18 GHz to 27 GHz after substrate micromachining.

This work reports on SiGe HBTs with f/sub T/ of 350 GHz. This is the highest reported f/sub T/ for any Si-based transistor as well as any bipolar transistor. Associated f/sub max/ is 170 GHz, and BV/sub CEO/ and BV/sub CBO/ are measured to be 1.4 V and 5.0 V, respectively. Also achieved was the simultaneous optimization of f/sub T/ and f/sub max/ resulting in 270 GHz and 260 GHz, with BV/sub CEO/ and BV/sub CBO/ of 1.6 V and 5.5 V, respectively. The dependence of device performance on bias condition and device dimension has been investigated. Considerations regarding the extraction of such high f/sub T/ and f/sub max/ values are also discussed.

State of the art passive devices have been developed for optimum RF circuit performance. These devices include a hyperabrupt junction varactor with tunability (Cmax/Cmin) of 3.3, an accumulation mode MOS varactor, high capacitance nitride metal-insulator-metal capacitors, a BEOL TaN resistor and very high Q inductors with a peak Q of 28 at 3.5 GHz. VCO simulations using several of these elements show a significant reduction in VCO gain variation, phase noise, and power consumption.

SiGe BiCMOS technology is well suited for both wired and wireless communication areas. For the wired space, the key requirements are very high speed active devices, extremely accurate interconnect modeling (lumped elements and transmission lines), and the ability to do very highly integrated analog and mixed signal chips. With data rates at 40 Gb/s, the distinction between digital and analog circuits becomes blurred and low frequency models are no longer adequate. RF/Analog layouts and models are needed for all active devices. SiGe BiCMOS satisfies all these requirements.

The 0.18 /spl mu/m SiGe HBT BiCMOS technology we have developed has found a variety of uses in high-speed digital applications, up to 50 Gb/s (Freeman et al, 2001). This paper focuses on the use and applicability of this mainstream HBT BiCMOS technology for microwave applications, particularly X-band, satellite, and LMDS (20-30 GHz). We discuss the pros and cons relative to the well-known III-V MMIC technology, as well as Si microwave circuits on high-resistivity substrates (SIMMWICs) (Russer, 1998). It is shown that the SiGe BiCMOS technology is widely applicable to microwave technology, with examples such as filters, switches, and VCOs. We also review new technology developments that can be applied to the SiGe BiCMOS technology.

We present a self-aligned, 0.18 /spl mu/m emitter width SiGe HBT with f/sub T/ of 90 GHz, f/sub MAX/ of 90 GHz (both at V/sub CB/=0.5 V), NF/sub MIN/ of 0.4 dB, and BV/sub CEO/ of 2.7 V. We also demonstrate that this device is integrable with IBM's 0.18 /spl mu/m, 1.8/3.3 V copper metallization CMOS technology with little effect on the CMOS device properties and design rules.

Design tradeoffs for the optimization of inductor Q have been analyzed, and thick metallization has been identified as the most promising technology enhancement. Peak Qs approaching 19 have been demonstrated using thick metal.

Experimental results are presented on a set of microwave inductors and transformers fabricated in a lateral spiral design utilizing two metal layers rather than a single metal layer as used in conventional planar magnetic devices. The fabrication process utilizes a production Si-SiGe HBT technology with standard metallization and a thick polyimide dielectric. Inductors with peak Q's between 2.6-5 and inductance values between 1-3 nH are presented. Transformers with a loss of less than 5 dB when corrected for impedance mismatch and a measured coupling coefficient (k) of 0.6 at 5.5 GHz and 0.4 up to 12.5 GHz are also discussed.

Experimental results are presented on a set of microwave transmission line structures and planar inductors fabricated on a thick polyimide dielectric in a production Si/SiGe HBT technology using standard metallization. Microstrip transmission lines with characteristic impedances between 44-73 ohms, with losses at 10 GHz of 0.15 dB/mm and Q's between 10-14 are presented. Inductances between 0.5-15 nH with Q's up to 22 are also presented.

Silicon-germanium (SiGe) heterojunction bipolar transistor (HBT) BiCMOS technology has developed into a production manufacturing technology that replaces and extends the performance of silicon-based BiCMOS technology. The market impetus for this development has been the insatiable requirement for bandwidth in network communication at speeds up to 40 Gbit/s and the rapid growth of the global cellular and wireless LAN markets. There has also been much work on the use of silicon-based structures for microwave frequencies. This paper focuses on a review of the status of our SiGe BiCMOS technology, based on four generations of scaling CMOS-compatible SiGe. We also show in principle how techniques commonly used in Ill-V semiconductor technology and microwave systems can also be applied to SiGe chips, along with silicon-on-insulator (SOI) and other existing technology, to provide a possible further extension in SiGe performance, for 50+ GHz circuits.

We describe a manufacturable process for the fabrication of microwave passive circuits on a high loss silicon substrate. This process, known as "Topside" allows for the fabrication of high frequency microwave transmission lines and inductors over the typical final metal layer of an integrated circuit. This process has been implemented on 200 mm (8 inch) silicon wafers with SiGe HBT's and CMOS devices. We describe for the first time the process details, as well as microstrip data on different thicknesses of metal.