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We present a systematic study of the dependence of gap mode tip-enhanced Raman scattering (TERS) of mono- and bi-layer WS$_2$ and MoS$_2$ as a function of excitation laser energy. We collected consecutive TERS maps of mono-and bi-layer regions with 6 different excitation lasers. To decrease the acquisition time, we used for the first time concurrent excitation and collection with two lasers simultaneously. We found that the E$_{2g}$/A$_{1g}$ peak intensity ratio for bilayer WS$_2$@Ag and the A'/A$_{1g}$ peak intensity ratio of the out-of-plane modes for mono- and bilayer change in a significantly non-monotonous way with excitation laser energies from 1.58 to 2.62 eV. The former ratio increases at energies corresponding to A and B excitons in bilayer WS$_2$. The intensity of the A peak in the monolayer, and hence the A/A$_{1g}$ ratio, is surprisingly high at low excitation energies, dips dramatically at energy corresponding to the A exciton, and is restored partially in between A and B excitons, though still showing a descending trend with increasing energy. A similar picture was observed in mono- and bi-layer MoS$_2$, though the existing set of lasers did not match its excitonic profile as nicely as for WS$_2$. We attribute the observed behavior to intermediate (Fano resonance) or strong (Rabi splitting) coupling between the excitons in transition metal dichalcogenides (TMDs) and the plasmons in the tip-substrate nanocavity. This is akin to the so-called Fano (Rabi) transparency experimentally observed in far field scattering from TMDs between two plasmonic metals. The possibility of intermediate/strong coupling between excitonic resonances in TMDs and the nanocavity re-evaluates the role of resonances in gap-mode TERS and should become an important factor to be considered by TERS practitioners when planning experiments. Finally, we propose the ideal substrate for efficient TERS and tip enhanced photoluminescence measurements., Comment: 21 pages, 10 figures

Strain engineering has played a key role in modern silicon electronics, having been introduced as a mobility booster in the 1990s and commercialized in the early 2000s. Achieving similar advances with two-dimensional (2D) semiconductors in a CMOS (complementary metal oxide semiconductor) compatible manner would radically improve the industrial viability of 2D transistors. Here, we show silicon nitride capping layers can impart strain to monolayer MoS2 transistors on conventional silicon substrates, enhancing their electrical performance with a low thermal budget (350 {\deg}C), CMOS-compatible approach. Strained back-gated and dual-gated MoS2 transistors demonstrate median increases up to 60% and 45% in on-state current, respectively. The greatest improvements are found when both transistor channels and contacts are reduced to ~200 nm, reaching saturation currents of 488 uA/um, higher than any previous reports at such short contact pitch. Simulations reveal that most benefits arise from tensile strain lowering the contact Schottky barriers, and that further reducing device dimensions (including contacts) will continue to offer increased strain and performance improvements.

The mobility of emerging (e.g., two-dimensional, oxide, organic) semiconductors is commonly estimated from transistor current-voltage measurements. However, such devices often experience contact gating, i.e., electric fields from the gate modulate the contact resistance during measurements, which can lead conventional extraction techniques to estimate mobility incorrectly even by a factor >2. This error can be minimized by measuring transistors at high gate-source bias, |$V_\mathrm{gs}$|, but this regime is often inaccessible in emerging devices that suffer from high contact resistance or early gate dielectric breakdown. Here, we propose a method of extracting mobility in transistors with gate-dependent contact resistance that does not require operation at high |$V_\mathrm{gs}$|, enabling accurate mobility extraction even in emerging transistors with strong contact gating. Our approach relies on updating the transfer length method (TLM) and can achieve <10% error even in regimes where conventional techniques overestimate mobility by >2$\times$., Comment: Corrected values tabulated in Figure 2d (surrounding discussion/conclusions unchanged); updated discussion surrounding Monte Carlo approach for error propagation; corrected typos

Two-dimensional (2D) semiconducting transition-metal dichalcogenides (TMDCs) are an exciting platform for new excitonic physics and next-generation electronics, creating a strong demand to understand their growth, doping, and heterostructures. Despite significant progress in solid-source (SS-) and metal-organic chemical vapor deposition (MOCVD), further optimization is necessary to grow highly crystalline 2D TMDCs with controlled doping. Here, we report a hybrid MOCVD growth method that combines liquid-phase metal precursor deposition and vapor-phase organo-chalcogen delivery to leverage the advantages of both MOCVD and SS-CVD. Using our hybrid approach, we demonstrate WS$_2$ growth with tunable morphologies - from separated single-crystal domains to continuous monolayer films - on a variety of substrates, including sapphire, SiO$_2$, and Au. These WS$_2$ films exhibit narrow neutral exciton photoluminescence linewidths down to 33 meV and room-temperature mobility up to 34 - 36 cm$^2$V$^-$$^1$s$^-$$^1$). Through simple modifications to the liquid precursor composition, we demonstrate the growth of V-doped WS$_2$, MoxW$_1$$_-$$_x$S$_2$ alloys, and in-plane WS$_2$-MoS$_2$ heterostructures. This work presents an efficient approach for addressing a variety of TMDC synthesis needs on a laboratory scale.

Confinement of monolayers into quasi-one-dimensional atomically-thin nanoribbons could lead to novel quantum phenomena beyond those achieved in their bulk and monolayer counterparts. However, current experimental availability of nanoribbon species beyond graphene has been limited to bottom-up synthesis or top-down patterning. In this study, we introduce a versatile and direct lithography-free approach to exfoliate a variety of bulk van der Waals (vdW) crystals into nanoribbons. Akin to the Scotch tape exfoliation in producing monolayers, this technique provides convenient access to a wide range of nanoribbons derived from their corresponding bulk crystals, including MoS2, WS2, MoSe2, WSe2, MoTe2, WTe2, ReS2, and hBN. The nanoribbons are single-crystalline, parallel-aligned, flat, and have high aspect ratio. We demonstrated the electrical, magnetic, and optical properties from the confinement, strain, and edge configurations of these nanoribbons. This versatile preparation technique will pave the way for future experimental investigation and broad applications in optoelectronic, sensing, electronic and quantum devices., Comment: 18 pages, 5 figures

Semiconducting transition metal dichalcogenides (TMDs) are promising for high-specific-power photovoltaics due to desirable band gaps, high absorption coefficients, and ideally dangling-bond-free surfaces. Despite their potential, the majority of TMD solar cells are fabricated in a non-scalable fashion using exfoliated materials due to the absence of high-quality, large-area, multilayer TMDs. Here, we present the scalable, thickness-tunable synthesis of multilayer tungsten diselenide (WSe$_{2}$) films by selenizing pre-patterned tungsten with either solid source selenium or H$_{2}$Se precursors, which leads to smooth, wafer-scale WSe$_{2}$ films with a layered van der Waals structure. The films have charge carrier lifetimes up to 144 ns, over 14x higher than large-area TMD films previously demonstrated. Such high carrier lifetimes correspond to power conversion efficiency of ~22% and specific power of ~64 W g$^{-1}$ in a packaged solar cell, or ~3 W g$^{-1}$ in a fully-packaged solar module. This paves the way for the mass-production of high-efficiency multilayer WSe$_{2}$ solar cells at low cost.

Strain engineering can modulate the material properties of two-dimensional (2D) semiconductors for electronic and optoelectronic applications. Recent theory and experiments have found that uniaxial tensile strain can improve the electron mobility of monolayer MoS$_2$, a 2D semiconductor, but the effects of biaxial strain on charge transport are not well-understood in 2D semiconductors. Here, we use biaxial tensile strain on flexible substrates to probe the electron mobility in monolayer WS$_2$ and MoS$_2$ transistors. This approach experimentally achieves ~2x higher on-state current and mobility with ~0.3% applied biaxial strain in WS$_2$, the highest mobility improvement at the lowest strain reported to date. We also examine the mechanisms behind this improvement through density functional theory simulations, concluding that the enhancement is primarily due to reduced intervalley electron-phonon scattering. These results underscore the role of strain engineering 2D semiconductors for flexible electronics, sensors, integrated circuits, and other optoelectronic applications., Comment: Corrected author list

Transition metal dichalcogenides (TMDs) show great promise as absorber materials in high-specific-power (i.e. high-power-per-weight) solar cells, due to their high optical absorption, desirable band gaps, and self-passivated surfaces. However, the ultimate performance limits of TMD solar cells remain unknown today. Here, we establish the efficiency limits of multilayer MoS2, MoSe2, WS2, and WSe2 solar cells under AM 1.5 G illumination as a function of TMD film thickness and material quality. We use an extended version of the detailed balance method which includes Auger and defect-assisted Shockley-Reed-Hall recombination mechanisms in addition to radiative losses, calculated from measured optical absorption spectra. We demonstrate that single-junction solar cells with TMD films as thin as 50 nm could in practice achieve up to 25% power conversion efficiency with the currently available material quality, making them an excellent choice for high-specific-power photovoltaics., Comment: 24 pages

Free-space modulation of light is crucial for many applications, from light detection and ranging to virtual or augmented reality. Traditional means of modulating free-space light involves spatial light modulators based on liquid crystals and microelectromechanical systems, which are bulky, have large pixel areas (~10 micron x 10 micron), and require high driving voltage. Recent progress in meta-optics has shown promise to circumvent some of the limitations. By integrating active materials with sub-wavelength pixels in a meta-optic, the power consumption can be dramatically reduced while achieving a faster speed. However, these reconfiguration methods are volatile and hence require constant application of control signals, leading to phase jitter and crosstalk. Additionally, to control a large number of pixels, it is essential to implement a memory within each pixel to have a tractable number of control signals. Here, we develop a device with nonvolatile, electrically programmable, phase-only modulation of free-space infrared radiation in transmission using the low-loss phase-change material (PCM) Sb2Se3. By coupling an ultra-thin PCM layer to a high quality (Q)-factor (Q~406) diatomic metasurface, we demonstrate a phase-only modulation of ~0.25pi (~0.2pi) in simulation (experiment), ten times larger than a bare PCM layer of the same thickness. The device shows excellent endurance over 1,000 switching cycles. We then advance the device geometry, to enable independent control of 17 meta-molecules, achieving ten deterministic resonance levels with a 2pi phase shift. By independently controlling the phase delay of pixels, we further show tunable far-field beam shaping. Our work paves the way to realizing non-volatile transmissive phase-only spatial light modulators.

Atomically thin two-dimensional (2D) transition metal dichalcogenides (TMDs), such as MoS$_2$, are promising candidates for nanoscale photonics because of strong-light matter interactions. However, Fermi level pinning due to metal-induced gap (MIGS) states at the metals-monolayer MoS$_2$ interface limits the application of optoelectronic devices based on conventional metals because of the high contact resistance of the Schottky contacts. On the other hand, a semimetal-TMD-semimetal device can overcome this limitation, where the MIGS are sufficiently suppressed and can result in ohmic contacts. Here we demonstrate the optoelectronic performance of a bismuth-monolayer (1L) MoS$_2$-bismuth device with ohmic electrical contacts and extraordinary optoelectronic properties. To address the wafer-scale production, we grew full coverage 1L MoS$_2$ by using chemical vapor deposition method. We measured high photoresponsivity of 300 A/W in the UV regime at 77 K, which translates into an external quantum efficiency (EQE) ~ 1000 or $10^5$%. We found that the 90% rise time of our devices at 77 K is 0.1 ms, which suggests that the current devices can operate at the speed of ~ 10 kHz. The combination of large-array device fabrication, high sensitivity, and high-speed response offers great potential for applications in photonics that includes integrated optoelectronic circuits., Comment: Accepted to Advanced Photonics Research

When transistor gate insulators have nanometer-scale equivalent oxide thickness (EOT), the gate capacitance ($C_\textrm{G}$) becomes smaller than the oxide capacitance ($C_\textrm{ox}$) due to the quantum capacitance and charge centroid capacitance of the channel. Here, we study the capacitance of monolayer MoS$_\textrm{2}$ as a prototypical two-dimensional (2D) channel while considering spatial variations in the potential, charge density, and density of states. At 0.5 nm EOT, the monolayer MoS$_\textrm{2}$ capacitance is smaller than its quantum capacitance, limiting the single-gated $C_\textrm{G}$ of an n-type channel to between 63% and 78% of $C_\textrm{ox}$ for gate overdrive voltages between 0.5 and 1 V. Despite these limitations, for dual-gated devices, the on-state $C_\textrm{G}$ of monolayer MoS$_\textrm{2}$ is 50% greater than that of silicon at 0.5 nm EOT and more than three times that of InGaAs at 1 nm EOT, indicating that 2D semiconductors are promising for nanoscale devices at future technology nodes.

Stateful logic is a digital processing-in-memory technique that could address von Neumann memory bottleneck challenges while maintaining backward compatibility with standard von Neumann architectures. In stateful logic, memory cells are used to perform the logic operations without reading or moving any data outside the memory array. Stateful logic has been previously demonstrated using several resistive memory types, mostly by resistive RAM (RRAM). Here we present a new method to design stateful logic using a different resistive memory - phase change memory (PCM). We propose and experimentally demonstrate four logic gate types (NOR, IMPLY, OR, NIMP) using commonly used PCM materials. Our stateful logic circuits are different than previously proposed circuits due to the different switching mechanism and functionality of PCM compared to RRAM. Since the proposed stateful logic form a functionally complete set, these gates enable sequential execution of any logic function within the memory, paving the way to PCM-based digital processing-in-memory systems.

Four-dimensional scanning transmission electron microscopy (4D-STEM) has recently gained widespread attention for its ability to image atomic electric fields with sub-{\AA}ngstrom spatial resolution. These electric field maps represent the integrated effect of the nucleus, core electrons and valence electrons, and separating their contributions is non-trivial. In this paper, we utilized simultaneously acquired 4D-STEM center of mass (CoM) images and annular dark field (ADF) images to determine the electron charge density in monolayer MoS2. We find that both the core electrons and the valence electrons contribute to the derived electron charge density. However, due to blurring by the probe shape, the valence electron contribution forms a nearly featureless background while most of the spatial modulation comes from the core electrons. Our findings highlight the importance of probe shape in interpreting charge densities derived from 4D STEM.

Strain engineering is an important method for tuning the properties of semiconductors and has been used to improve the mobility of silicon transistors for several decades. Recently, theoretical studies have predicted that strain can also improve the mobility of two-dimensional (2D) semiconductors, e.g. by reducing intervalley scattering or lowering effective masses. Here, we experimentally show strain-enhanced electron mobility in monolayer MoS2 transistors with uniaxial tensile strain, on flexible substrates. The on-state current and mobility are nearly doubled with tensile strain up to 0.7%, and devices return to their initial state after release of strain. We also show a gate-voltage-dependent gauge factor up to 200 for monolayer MoS2, which is higher than previous values reported for sub-1 nm thin piezoresistive films. These results demonstrate the importance of strain engineering 2D semiconductors for performance enhancements in integrated circuits, or for applications such as flexible strain sensors.

The thermal properties of two-dimensional (2D) materials, like MoS$_2$, are known to be affected by interactions with their environment, but this has primarily been studied only with SiO$_2$ substrates. Here, we compare the thermal conductivity (TC) and thermal boundary conductance (TBC) of monolayer MoS$_2$ on amorphous (a-) and crystalline (c-) SiO$_2$, AlN, Al$_2$O$_3$, and $\textit{h}$-BN monolayers using molecular dynamics. The room temperature TC of MoS$_2$ is ~38 Wm$^{-1}$K$^{-1}$ on amorphous substrates and up to ~68 Wm$^{-1}$K$^{-1}$ on crystalline substrates, with most of the difference due to substrate interactions with long-wavelength MoS$_2$ phonons (< 2 THz). An $\textit{h}$-BN monolayer used as a buffer between MoS$_2$ and the substrate causes the MoS$_2$ TC to increase by up to 50%. Length-dependent calculations reveal TC size effects below ~2 $\mu$m and show that the MoS$_2$ TC is size- but not substrate-limited below ~100 nm. We also find that the TBC of MoS$_2$ with c-Al$_2$O$_3$ is over twice that with c-AlN despite a similar MoS$_2$ TC on both, indicating that the TC and TBC could be tuned independently. Finally, we compare the thermal resistance of MoS$_2$ transistors on all substrates to show that MoS$_2$ TBC is the most important parameter for heat removal for long-channel (> 150 nm) devices, while TBC and TC are equally important for short channels. This work provides important insights for electro-thermal applications of 2D materials on various substrates., Comment: 16 Pages, 6 Figures, Supplementary Information

Accurate measurements and physical understanding of thermal boundary resistance (R) of two-dimensional (2D) materials are imperative for effective thermal management of 2D electronics and photonics. In previous studies, heat dissipation from 2D material devices was presumed to be dominated by phonon transport across the interfaces. In this study, we find that in addition to phonon transport, thermal resistance between non-equilibrium phonons in the 2D materials could play a critical role too when the 2D material devices are internally self-heated, either optically or electrically. We accurately measure R of oxide/MoS2/oxide and oxide/graphene/oxide interfaces for three oxides (SiO2, HfO2, Al2O3) by differential time-domain thermoreflectance (TDTR). Our measurements of R across these interfaces with external heating are 2-to-4 times lower than previously reported R of the similar interfaces measured by Raman thermometry with internal self-heating. Using a simple model, we show that the observed discrepancy can be explained by an additional internal thermal resistance (Rint) between non-equilibrium phonons present during Raman measurements. We subsequently estimate that for MoS2 and graphene, Rint is about 31 and 22 m2 K/GW, respectively. The values are comparable to the thermal resistance due to finite phonon transmission across interfaces of 2D materials and thus cannot be ignored in the design of 2D material devices. Moreover, the non-equilibrium phonons also lead to a different temperature dependence than that by phonon transport. As such, our work provides important insights into physical understanding of heat dissipation in 2D material devices.

Emerging low-dimensional nanomaterials have been studied for decades in device applications as field-effect transistors (FETs). However, properly reporting and comparing device performance has been challenging due to the involvement and interlinking of multiple device parameters. More importantly, the interdisciplinarity of this research community results in a lack of consistent reporting and benchmarking guidelines. Here we report a consensus among the authors regarding guidelines for reporting and benchmarking important FET parameters and performance metrics. We provide an example of this reporting and benchmarking process for a two-dimensional (2D) semiconductor FET. Our consensus will help promote an improved approach for assessing device performance in emerging FETs, thus aiding the field to progress more consistently and meaningfully., Comment: 15 pages, 3 figures

Gradual switching between multiple resistance levels is desirable for analog in-memory computing using resistive random-access memory (RRAM). However, the filamentary switching of $HfO_x$-based conventional RRAM often yields only two stable memory states instead of gradual switching between multiple resistance states. Here, we demonstrate that a thermal barrier of $Ge_2Sb_2Te_5$ (GST) between $HfO_x$ and the bottom electrode (TiN) enables wider and weaker filaments, by promoting heat spreading laterally inside the $HfO_x$. Scanning thermal microscopy suggests that $HfO_x+GST$ devices have a wider heating region than control devices with only $HfO_x$, indicating the formation of a wider filament. Such wider filaments can have multiple stable conduction paths, resulting in a memory device with more gradual and linear switching. The thermally-enhanced $HfO_x+GST$ devices also have higher on/off ratio ($>10^3$) than control devices ($<10^2$), and a median set voltage lower by approximately 1 V (~35%), with a corresponding reduction of the switching power. Our $HfO_x+GST$ RRAM shows 2x gradual switching range using fast (~ns) identical pulse trains with amplitude less than 2 V.

Achieving good electrical contacts is one of the major challenges in realizing devices based on atomically thin two-dimensional (2D) semiconductors. Several studies have examined this hurdle, but a universal understanding of the contact resistance and an underlying approach to its reduction are currently lacking. In this work we expose the shortcomings of the classical contact resistance model in describing contacts to 2D materials, and offer a correction based on the addition of a lateral pseudo-junction resistance component (Rjun). We use a combination of unique contact resistance measurements to experimentally characterize Rjun for Ni contacts to monolayer MoS2. We find that Rjun is the dominating component of the contact resistance in undoped 2D devices and show that it is responsible for most of the back-gate bias and temperature dependence. Our corrected model and experimental results help understand the underlying physics of state-of-the-art contact engineering approaches in the context of minimizing Rjun.

Two-dimensional (2D) semiconductors have been proposed for heterogeneous integration with existing silicon technology; however, their chemical vapor deposition (CVD) growth temperatures are often too high. Here, we demonstrate direct CVD solid-source precursor synthesis of continuous monolayer (1L) MoS$_2$ films at 560 C in 50 min, within the 450-to-600 C, 2 h thermal budget window required for back-end-of-the-line compatibility with modern silicon technology. Transistor measurements reveal on-state current up to ~140 $\mathrm{{\mu}A/{\mu}m}$ at 1 V drain-to-source voltage for 100 nm channel lengths, the highest reported to date for 1L MoS$_2$ grown below 600 C using solid-source precursors. The effective mobility from transfer length method test structures is $\mathrm{29 \pm 5\ cm^2V^{-1}s^{-1}}$ at $\mathrm{6.1 \times 10^{12}\ cm^{-2}}$ electron density, which is comparable to mobilities reported from films grown at higher temperatures. The results of this work provide a path toward the realization of high-quality, thermal-budget-compatible 2D semiconductors for heterogeneous integration with silicon manufacturing.

Layering two-dimensional van der Waals materials provides unprecedented control over atomic placement, which could enable tailoring of vibrational spectra and heat flow at the sub-nanometer scale. Here, using spatially-resolved ultrafast thermoreflectance and spectroscopy, we uncover the design rules governing cross-plane heat transport in superlattices assembled from monolayers of graphene (G) and MoS2 (M). Using a combinatorial experimental approach, we probe nine different stacking sequences: G, GG, MG, GGG, GMG, GGMG, GMGG, GMMG, GMGMG and identify the effects of vibrational mismatch, interlayer adhesion, and junction asymmetry on thermal transport. Pure G sequences display signatures of quasi-ballistic transport, whereas adding even a single M layer strongly disrupts heat conduction. The experimental data are described well by molecular dynamics simulations which include thermal expansion, accounting for the effect of finite temperature on the interlayer spacing. The simulations show that a change of only 1.5% in the layer separation can lead to a nearly 100% increase of the thermal resistance. Using these design rules, we experimentally demonstrate a 5-layer GMGMG superlattice with an ultralow effective cross-plane thermal conductivity comparable to air, paving the way for a new class of thermal metamaterials with extreme properties.

Structural colors generated due to light scattering from static all-dielectric metasurfaces have successfully enabled high-resolution, high-saturation, and wide-gamut color printing applications. Despite recent advances, most demonstrations of these structure-dependent colors lack post-fabrication tunability. This hinders their applicability for front-end dynamic display technologies. Phase-change materials (PCMs), with significant contrast of their optical properties between their amorphous and crystalline states, have demonstrated promising potentials in reconfigurable nanophotonics. Herein, we leverage tunable all-dielectric reflective metasurfaces made of newly emerged classes of low-loss optical PCMs, i.e., antimony trisulphide (Sb$_2$S$_3$) and antimony triselenide (Sb$_2$Se$_3$), with superb characteristics to realize switchable, high-saturation, high-efficiency and high-resolution dynamic meta-pixels. Exploiting polarization-sensitive building blocks, the presented meta-pixel can generate two different colors when illuminated by either one of two orthogonally polarized incident beams. Such degrees of freedom (i.e., material phase and polarization state) enable a single reconfigurable metasurface with fixed geometrical parameters to generate four distinct wide-gamut colors. We experimentally demonstrate, for the first time, an electrically-driven micro-scale display through the integration of phase-change metasurfaces with an on-chip heater formed by transparent conductive oxide. Our experimental findings enable a versatile platform suitable for a wide range of applications, including tunable full-color printing, enhanced dynamic displays, information encryption, and anti-counterfeiting., Comment: arXiv admin note: substantial text overlap with arXiv:2105.01313

Investigating lateral electrical transport in p-type thin film chalcogenides is important to evaluate their potential for field-effect transistors (FETs) and phase-change memory applications. For instance, p-type FETs with sputtered materials at low temperature (<= 250 C) could play a role in flexible electronics or back-end-of-line (BEOL) silicon-compatible processes. Here, we explore lateral transport in chalcogenide films (Sb2Te3, Ge2Sb2Te5, Ge4Sb6Te7) and multilayers, with Hall measurements (in <= 50 nm thin films) and with p-type transistors (in <= 5 nm ultrathin films). The highest Hall mobilities are measured for Sb2Te3/GeTe superlattices (~18 cm2/V/s at room temperature), over 2-3x higher than the other films. In ultrathin p-type FETs with Ge2Sb2Te5, we achieve field-effect mobility up to ~5.5 cm2/V/s with current on/off ratio ~10000, the highest for Ge2Sb2Te5 transistors to date. We also explore process optimizations (e.g., AlOx capping layer, type of developer for lithography) and uncover their trade-offs towards the realization of p-type transistors with acceptable mobility and on/off current ratio. Our study provides essential insights into the optimization of electronic devices based on p-type chalcogenides.

We present vibrational properties of Franckeite, which is a naturally occurring van der Waals heterostructure consisting of two different semiconducting layers. Franckeite is a complex layered crystal composed of alternating SnS$_2$ like pseudohexagonal and PbS-like pseudotetragonal layers stacked on top of each other, providing a unique platform to study vibrational properties and thermal transport across layers with mass density and phonon mismatches. By using micro-Raman spectroscopy and first-principles Raman simulations, we found that the PbS-like pseudotetragonal structure is mostly composed of Pb$_3$SbS$_4$. We also discovered several low-frequency Raman modes that originate from the intralayer vibrations of the pseudotetragonal layer. Using density functional theory, we determined all vibrational patterns of Franckeite, whose signatures are observed in the Raman spectrum. By studying temperature dependent Raman spectroscopy (300 K - 500 K), we have found different temperature coefficients for both pseudotetragonal and pseudohexagonal layers. We believe that our study will help understand the vibration modes of its complex heterostructure and the thermal properties at the nanoscale., Comment: 15 pages, 10 figures

Semiconducting transition metal dichalcogenides (TMDs) are promising for flexible high-specific-power photovoltaics due to their ultrahigh optical absorption coefficients, desirable band gaps and self-passivated surfaces. However, challenges such as Fermi-level pinning at the metal contact-TMD interface and the inapplicability of traditional doping schemes have prevented most TMD solar cells from exceeding 2% power conversion efficiency (PCE). In addition, fabrication on flexible substrates tends to contaminate or damage TMD interfaces, further reducing performance. Here, we address these fundamental issues by employing: 1) transparent graphene contacts to mitigate Fermi-level pinning, 2) $\rm{MoO}_\it{x}$ capping for doping, passivation and anti-reflection, and 3) a clean, non-damaging direct transfer method to realize devices on lightweight flexible polyimide substrates. These lead to record PCE of 5.1% and record specific power of $\rm{4.4\ W\,g^{-1}}$ for flexible TMD ($\rm{WSe_2}$) solar cells, the latter on par with prevailing thin-film solar technologies cadmium telluride, copper indium gallium selenide, amorphous silicon and III-Vs. We further project that TMD solar cells could achieve specific power up to $\rm{46\ W\,g^{-1}}$, creating unprecedented opportunities in a broad range of industries from aerospace to wearable and implantable electronics., Comment: 39 pages; v2: some references reformatted

We present a scaling theory of two-dimensional (2D) field effect transistors (FETs). For devices with channel thickness less than 4 nm, the device electrostatics is dominated by the physical gate oxide thickness and not the effective oxide thickness. Specifically, for symmetric double gate (DG) FETs the scale length ({\Lambda}) varies linearly with the gate oxide thickness(t_{ox}) as {\Lambda} ~ 3/4t_{ox}. The gate oxide dielectric permittivity and the semiconductor channel thickness do not affect the device electrostatics for such device geometries. For an asymmetric device such as single gate (SG) FETs, the fringing fields have a second order effect on the scale length. However, like symmetric DG FETs, the scale length in asymmetric FETs is also ultimately limited by the physical gate oxide thickness. We compare our theoretical predictions for scaled monolayer MoS2 DG FETs.

Electrical contact resistance to two-dimensional (2D) semiconductors such as monolayer MoS_{2} is a key bottleneck in scaling the 2D field effect transistors (FETs). The 2D semiconductor in contact with three-dimensional metal creates unique current crowding that leads to increased contact resistance. We developed a model to separate the contribution of the current crowding from the intrinsic contact resistivity. We show that current crowding can be alleviated by doping and contact patterning. Using Landauer-B\"uttiker formalism, we show that van der Waals (vdW) gap at the interface will ultimately limit the electrical contact resistance. We compare our models with experimental data for doped and undoped MoS_{2} FETs. Even with heavy charge-transfer doping of > 2x10^{13} cm^{-2}, we show that the state-of-the-art contact resistance is 100 times larger than the ballistic limit. Our study highlights the need to develop efficient interface to achieve contact resistance of < 10 {\Omega}.{\mu}m, which will be ideal for extremely scaled devices.

Phase change memory (PCM) is one of the leading candidates for neuromorphic hardware and has recently matured as a storage class memory. Yet, energy and power consumption remain key challenges for this technology because part of the PCM device must be self-heated to its melting temperature during reset. Here, we show that this reset energy can be reduced by nearly two orders of magnitude by minimizing the pulse width. We utilize a high-speed measurement setup to probe the energy consumption in PCM cells with varying pulse width (0.3 to 40 nanoseconds) and uncover the power dissipation dynamics. A key finding is that the switching power (P) remains unchanged for pulses wider than a short thermal time constant of the PCM ($\tau$$_t$$_h$ < 1 ns in 50 nm diameter device), resulting in a decrease of energy (E=P$\tau$) as the pulse width $\tau$ is reduced in that range. In other words, thermal confinement during short pulses is achieved by limiting the heat diffusion time. Our improved programming scheme reduces reset energy density below 0.1 nJ/$\mu$m$^2$, over an order of magnitude lower than state-of-the-art PCM, potentially changing the roadmap of future data storage technology and paving the way towards energy-efficient neuromorphic hardware

Despite recent advances in active metaoptics, wide dynamic range combined with high-speed reconfigurable solutions is still elusive. Phase-change materials (PCMs) offer a compelling platform for metasurface optical elements, owing to the large index contrast and fast yet stable phase transition properties. Here, we experimentally demonstrate an in situ electrically-driven reprogrammable metasurface by harnessing the unique properties of a phase-change chalcogenide alloy, Ge$_{2}$Sb$_{2}$Te$_{5}$ (GST), in order to realize fast, non-volatile, reversible, multilevel, and pronounced optical modulation in the near-infrared spectral range. Co-optimized through a multiphysics analysis, we integrate an efficient heterostructure resistive microheater that indirectly heats and transforms the embedded GST film without compromising the optical performance of the metasurface even after several reversible phase transitions. A hybrid plasmonic-PCM meta-switch with a record electrical modulation of the reflectance over eleven-fold (an absolute reflectance contrast reaching 80%), unprecedented quasi-continuous spectral tuning over 250 nm, and switching speed that can potentially reach a few kHz is presented. Our work represents a significant step towards the development of fully integrable dynamic metasurfaces and their potential for beamforming applications.

Superlattice-like phase change memory (SL-PCM) promises lower switching current than conventional PCM based on Ge2Sb2Te5 (GST). However, a fundamental understanding of SL-PCM requires detailed characterization of the interfaces within such a SL. Here, we explore the electrical and thermal transport of SLs with deposited Sb2Te3 and GeTe alternating layers of various thicknesses. We find up to ~4X reduction of the effective cross-plane thermal conductivity of the SL stack (as-deposited polycrystalline) compared to polycrystalline GST (as-deposited amorphous and later annealed) due to the thermal interface resistances within the SL. Thermal measurements with varying periods of our SLs show a signature of phonon coherence with a transition from wave-like to particle-like phonon transport, further described by our modeling. Electrical resistivity measurements of such SLs reveal strong anisotropy (~2000X) between the in-plane and cross-plane directions due to the weakly interacting van der Waals gaps. This work uncovers electro-thermal transport in SLs based on Sb2Te3 and GeTe, for improved design of low-power PCM.

The design of new applications, especially those based on heterogeneous integration, must rely on detailed knowledge of material properties, such as thermal conductivity (TC). To this end, multiple methods have been developed to study TC as a function of vibrational frequency. Here, we compare three spectral TC methods based on velocity decomposition in homogenous molecular dynamics simulations: Green-Kubo modal analysis (GKMA), the spectral heat current (SHC) method, and a method we propose called homogeneous nonequilibrium modal analysis (HNEMA). First, we derive a convenient per-atom virial expression for systems described by general many-body potentials, enabling compact representations of the heat current, each velocity decomposition method, and other related quantities. Next, we evaluate each method by calculating the spectral TC for carbon nanotubes, graphene, and silicon. We show that each method qualitatively agrees except at optical phonon frequencies, where a combination of mismatched eigenvectors and a large density of states produces artificial TC peaks for modal analysis methods. Our calculations also show that the HNEMA and SHC methods converge much faster than the GKMA method, with the SHC method being the most computationally efficient. Finally, we demonstrate that our single-GPU modal analysis implementation in GPUMD (Graphics Processing Units Molecular Dynamics) is over 1000 times faster than the existing LAMMPS (Large-scale Atomic/Molecular Massively Parallel Simulator) implementation on one CPU., Comment: 19 Pages, 8 Figures

The inferior electrical contact to two-dimensional (2D) materials is a critical challenge for their application in post-silicon very large-scale integrated circuits. Electrical contacts were generally related to their resistive effect, quantified as contact resistance. With a systematic investigation, this work demonstrates a capacitive metal-insulator-semiconductor (MIS) field-effect at the electrical contacts to 2D materials: the field-effect depletes or accumulates charge carriers, redistributes the voltage potential, and give rise to abnormal current saturation and nonlinearity. On the one hand, the current saturation hinders the devices' driving ability, which can be eliminated with carefully engineered contact configurations. On the other hand, by introducing the nonlinearity to monolithic analog artificial neural network circuits, the circuits' perception ability can be significantly enhanced, as evidenced using a COVID-19 critical illness prediction model. This work provides a comprehension of the field-effect at the electrical contacts to 2D materials, which is fundamental to the design, simulation, and fabrication of electronics based on 2D material.

Semiconductors require stable doping for applications in transistors, optoelectronics, and thermoelectrics. However, this has been challenging for two-dimensional (2D) materials, where existing approaches are either incompatible with conventional semiconductor processing or introduce time-dependent, hysteretic behavior. Here we show that low temperature (< 200$^\circ$ C) sub-stoichiometric AlO$_x$ provides a stable n-doping layer for monolayer MoS$_2$, compatible with circuit integration. This approach achieves carrier densities > 2x10$^{13}$ 1/cm$^2$, sheet resistance as low as ~7 kOhm/sq, and good contact resistance ~480 Ohm.um in transistors from monolayer MoS$_2$ grown by chemical vapor deposition. We also reach record current density of nearly 700 uA/um (>110 MA/cm$^2$) in this three-atom-thick semiconductor while preserving transistor on/off current ratio > $10^6$. The maximum current is ultimately limited by self-heating and could exceed 1 mA/um with better device heat sinking. With their 0.1 nA/um off-current, such doped MoS$_2$ devices approach several low-power transistor metrics required by the international technology roadmap, Comment: To appear in ACS Nano (2021)

Traditional electronic devices are well-known to improve in speed and energy-efficiency as their dimensions are reduced to the nanoscale. However, this scaling behavior remains unclear for nonlinear dynamical circuit elements, such as Mott neuron-like spiking oscillators, which are of interest for bio-inspired computing. Here we show that shrinking micrometer-sized VO2 oscillators to sub-100 nm effective sizes, achieved using a nanogap cut in a metallic carbon nanotube (CNT) electrode, does not guarantee faster spiking. However, an additional heat source such as Joule heating from the CNT, in combination with small size and heat capacity (defined by the narrow volume of VO2 whose insulator-metal transition is triggered by the CNT), can increase the spiking frequency by ~1000x due to an electro-thermal bifurcation in the nonlinear dynamics. These results demonstrate that nonlinear dynamical switches operate in a complex phase space which can be controlled by careful electro-thermal design, offering new tuning parameters for designing future biomimetic electronics.

Hexagonal boron nitride (h-BN) is unique among two-dimensional materials, with a large band gap (~6 eV) and high thermal conductivity (>400 W/m/K), second only to diamond among electrical insulators. Most electronic studies to date have relied on h-BN exfoliated from bulk crystals; however, for scalable applications the material must be synthesized by methods such as chemical vapor deposition (CVD). Here, we demonstrate single- and few-layer h-BN synthesized by CVD on single crystal platinum and on carbon nanotube (CNT) substrates, also comparing these films with h-BN deposited on the more commonly used polycrystalline Pt and Cu growth substrates. The h-BN film grown on single crystal Pt has a lower surface roughness and is more spatially homogeneous than the film from a polycrystalline Pt foil, and our electrochemical transfer process allows for these expensive foils to be reused with no measurable degradation. In addition, we demonstrate monolayer h-BN as an ultrathin, 3.33 $\unicode{x212B}$ barrier protecting MoS2 from damage at high temperatures and discuss other applications that take advantage of the conformal h-BN deposition on various substrates demonstrated in this work.

Thermal management is an important challenge in modern electronics, avionics, automotive, and energy storage systems. While passive thermal solutions (like heat sinks or heat spreaders) are often used, actively modulating heat flow (e.g. via thermal switches or diodes) would offer additional degrees of control over the management of thermal transients and system reliability. Here we report the first thermal switch based on a flexible, collapsible graphene membrane, with low operating voltage, < 2 V. We also employ active-mode scanning thermal microscopy (SThM) to measure the device behavior and switching in real time. A compact analytical thermal model is developed for the general case of a thermal switch based on a double-clamped suspended membrane, highlighting the thermal and electrical design challenges. System-level modeling demonstrates the thermal trade-offs between modulating temperature swing and average temperature as a function of switching ratio. These graphene-based thermal switches present new opportunities for active control of fast (even nanosecond) thermal transients in densely integrated systems.

Two-dimensional (2D) semiconducting transition metal dichalcogenides (TMDs) are good candidates for high-performance flexible electronics. However, most demonstrations of such flexible field-effect transistors (FETs) to date have been on the micron scale, not benefitting from the short-channel advantages of 2D-TMDs. Here, we demonstrate flexible monolayer MoS2 FETs with the shortest channels reported to date (down to 50 nm) and remarkably high on-current (up to 470 uA/um at 1 V drain-to-source voltage) which is comparable to flexible graphene or crystalline silicon FETs. This is achieved using a new transfer method wherein contacts are initially patterned on the rigid TMD growth substrate with nanoscale lithography, then coated with a polyimide (PI) film which becomes the flexible substrate after release, with the contacts and TMD. We also apply this transfer process to other TMDs, reporting the first flexible FETs with MoSe2 and record on-current for flexible WSe2 FETs. These achievements push 2D semiconductors closer to a technology for low-power and high-performance flexible electronics.

The expected high performance of graphene-based electronics is often hindered by lack of adequate doping, which causes low carrier density and large sheet resistance. Many reported graphene doping schemes also suffer from instability or incompatibility with existing semiconductor processing. Here we report ultrahigh and stable p-type doping up to ~7x10^13 1/cm^2 (~2x10^21 1/cm^3}) of monolayer graphene grown by chemical vapor deposition. This is achieved by direct polycrystalline MoO3 growth on graphene using a rapid flame synthesis technique. With this approach, the metal-graphene contact resistance for holes is reduced to ~200 Ohm-um. We also demonstrate that flame-deposited MoO3 provides over 5x higher doping of graphene, as well as superior thermal and long-term stability, compared to electron-beam deposited MoO3., Comment: 4 pages, 3 figures

Efficient hybrid plasmonic-photonic metasurfaces that simultaneously take advantage of the potential of both pure metallic and all-dielectric nanoantennas are identified as an emerging technology in flat optics. Nevertheless, post-fabrication tunable hybrid metasurfaces are still elusive. Here, we present a reconfigurable hybrid metasurface platform by incorporating the phase-change material Ge$_{2}$Sb$_{2}$Te$_{5}$ (GST) into metal-dielectric meta-atoms for active and non-volatile tuning of properties of light. We systematically design a reduced-dimension meta-atom, which selectively controls the fundamental hybrid plasmonic-photonic resonances of the metasurface via the dynamic change of optical constants of GST without compromising the scattering efficiency. As a proof-of-concept, we experimentally demonstrate miniaturized tunable metasurfaces that control the amplitude and phase of incident light necessary for high-contrast optical switching and anomalous to specular beam deflection, respectively. Finally, we leverage a deep learning-based approach to present an intuitive low-dimensional visualization of the enhanced range of response reconfiguration enabled by the addition of GST. Our findings further substantiate dynamically tunable hybrid metasurfaces as promising candidates for the development of small-footprint energy harvesting, imaging, and optical signal processing devices.

Metal contacts are a key limiter to the electronic performance of two-dimensional (2D) semiconductor devices. Here we present a comprehensive study of contact interfaces between seven metals (Y, Sc, Ag, Al, Ti, Au, Ni, with work functions from 3.1 to 5.2 eV) and monolayer MoS2 grown by chemical vapor deposition. We evaporate thin metal films onto MoS2 and study the interfaces by Raman spectroscopy, X-ray photoelectron spectroscopy, X-ray diffraction, transmission electron microscopy, and electrical characterization. We uncover that, 1) ultrathin oxidized Al dopes MoS2 n-type (> 2x10^12 1/cm^2) without degrading its mobility, 2) Ag, Au, and Ni deposition causes varying levels of damage to MoS2 (broadening Raman E' peak from <3 1/cm to >6 1/cm), and 3) Ti, Sc, and Y react with MoS2. Reactive metals must be avoided in contacts to monolayer MoS2, but control studies reveal the reaction is mostly limited to the top layer of multilayer films. Finally, we find that 4) thin metals do not significantly strain MoS2, as confirmed by X-ray diffraction. These are important findings for metal contacts to MoS2, and broadly applicable to many other 2D semiconductors.

Electrical and thermal properties of atomically thin two-dimensional (2D) materials are affected by their environment, e.g. through remote phonon scattering or dielectric screening. However, while it is known that mobility and thermal conductivity (TC) of graphene are reduced on a substrate, these effects are much less explored in 2D semiconductors such as MoS$_2$. Here, we use molecular dynamics to understand TC changes in monolayer (1L) and bilayer (2L) MoS$_2$ by comparing suspended, supported, and encased structures. The TC of monolayer MoS$_2$ is reduced from ~117 Wm$^{-1}$K$^{-1}$ when suspended, to ~31 Wm$^{-1}$K$^{-1}$ when supported by SiO$_2$, at 300 K. Encasing 1L MoS$_2$ in SiO$_2$ further reduces its TC down to ~22 Wm$^{-1}$K$^{-1}$. In contrast, the TC of 2L MoS$_2$ is not as drastically reduced, being >50% higher than 1L both when supported and encased. These effects are due to phonon scattering with remote vibrational modes of the substrate, which are partly screened in 2L MoS$_2$. We also examine the TC of 1L MoS$_2$ across a wide range of temperatures (300 to 700 K) and defect densities (up to 5$\times$10$^{13}$ cm$^{-2}$), finding that the substrate reduces the dependence of TC on these factors. Taken together, these are important findings for all applications which will use 2D semiconductors supported or encased by insulators, instead of freely suspended., Comment: 19 Pages, 7 Figures, Supplementary Information

Reconfigurability of photonic integrated circuits (PICs) has become increasingly important due to the growing demands for electronic-photonic systems on a chip driven by emerging applications, including neuromorphic computing, quantum information, and microwave photonics. Success in these fields usually requires highly scalable photonic switching units as essential building blocks. Current photonic switches, however, mainly rely on materials with weak, volatile thermo-optic or electro-optic modulation effects, resulting in a large footprint and high energy consumption. As a promising alternative, chalcogenide phase-change materials (PCMs) exhibit strong modulation in a static, self-holding fashion. Here, we demonstrate nonvolatile electrically reconfigurable photonic switches using PCM-clad silicon waveguides and microring resonators that are intrinsically compact and energy-efficient. With phase transitions actuated by in-situ silicon PIN heaters, near-zero additional loss and reversible switching with high endurance are obtained in a complementary metal-oxide-semiconductor (CMOS)-compatible process. Our work can potentially enable very large-scale general-purpose programmable integrated photonic processors.