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1. On the Low-Frequency Noise Characterization of Z2-FET Devices

Author

Carlos Marquez, Carlos Navarro, Santiago Navarro, Jose L. Padilla, Luca Donetti, Carlos Sampedro, Philippe Galy, Yong-Tae Kim, and Francisco Gamiz

Subjects
1T-DRAM, noise measurement, p-i-n diodes, semiconductor device reliability, silicon on insulator technology, Z²-FET, Electrical engineering. Electronics. Nuclear engineering, TK1-9971
Abstract

This paper addresses the low-frequency noise characterization of Z2-FET structures. These double-gated p-i-n diode devices have been fabricated at STMicroelectronics in an ultrathin body and box (UTBB) 28-nm FDSOI technology and designed to operate as 1T-DRAM memory cells, although other applications, as for example electro static discharge (ESD) protection, have been reported. The experimentally extracted power spectral density of current reveals that the high-diode series resistance, carrier number fluctuations due to oxide traps, and gate leakage current are the main noise contributors at high-current regimes. These mechanisms are expected to contribute to the degradation of cell variability and retention time. Higher flicker noise levels have been reported when increasing the vertical electric field. A simple model considering the contribution of the main noise sources is proposed.

Published
2019
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27. Study of threshold voltage extraction from room temperature down to 4.2 K on 28 nm FD-SOI CMOS technology

Author

Quentin Berlingard, Jose Lugo-Alvarez, Maryline Bawedin, Lauriane Contamin, Philippe Galy, Silvano De Franceschi, Tristan Meunier, Maud Vinet, Fred Gaillard, Mikaël Cassé, Commissariat à l'énergie atomique et aux énergies alternatives - Laboratoire d'Electronique et de Technologie de l'Information (CEA-LETI), Direction de Recherche Technologique (CEA) (DRT (CEA)), Commissariat à l'énergie atomique et aux énergies alternatives (CEA)-Commissariat à l'énergie atomique et aux énergies alternatives (CEA), Institut de Microélectronique, Electromagnétisme et Photonique - Laboratoire d'Hyperfréquences et Caractérisation (IMEP-LAHC), Université Savoie Mont Blanc (USMB [Université de Savoie] [Université de Chambéry])-Centre National de la Recherche Scientifique (CNRS)-Université Grenoble Alpes (UGA)-Institut polytechnique de Grenoble - Grenoble Institute of Technology (Grenoble INP ), Université Grenoble Alpes (UGA), STMicroelectronics [Crolles] (ST-CROLLES), Laboratoire de Transport Electronique Quantique et Supraconductivité (LaTEQS), PHotonique, ELectronique et Ingénierie QuantiqueS (PHELIQS), Institut de Recherche Interdisciplinaire de Grenoble (IRIG), Direction de Recherche Fondamentale (CEA) (DRF (CEA)), Commissariat à l'énergie atomique et aux énergies alternatives (CEA)-Commissariat à l'énergie atomique et aux énergies alternatives (CEA)-Direction de Recherche Fondamentale (CEA) (DRF (CEA)), Commissariat à l'énergie atomique et aux énergies alternatives (CEA)-Commissariat à l'énergie atomique et aux énergies alternatives (CEA)-Université Grenoble Alpes (UGA)-Institut de Recherche Interdisciplinaire de Grenoble (IRIG), Commissariat à l'énergie atomique et aux énergies alternatives (CEA)-Commissariat à l'énergie atomique et aux énergies alternatives (CEA)-Université Grenoble Alpes (UGA), Circuits électroniques quantiques Alpes (NEEL - QuantECA), Institut Néel (NEEL), Centre National de la Recherche Scientifique (CNRS)-Université Grenoble Alpes (UGA)-Institut polytechnique de Grenoble - Grenoble Institute of Technology (Grenoble INP ), and Université Grenoble Alpes (UGA)-Centre National de la Recherche Scientifique (CNRS)-Université Grenoble Alpes (UGA)-Institut polytechnique de Grenoble - Grenoble Institute of Technology (Grenoble INP )

Subjects
[PHYS]Physics [physics], [SPI]Engineering Sciences [physics], Materials Chemistry, Electrical and Electronic Engineering, Condensed Matter Physics, Electronic, Optical and Magnetic Materials
Abstract

International audience

Published
2022

28. RF performances at cryogenic temperature of inductors integrated in a FDSOI technology

Author

Quentin Berlingard, Jose Lugo-Alvarez, Lauriane Contamin, Cédric Durand, Philippe Galy, Andre Juge, Silvano De Franceschi, Maud Vinet, Tristan Meunier, Mikaël Cassé, Fred Gaillard, Commissariat à l'énergie atomique et aux énergies alternatives - Laboratoire d'Electronique et de Technologie de l'Information (CEA-LETI), Direction de Recherche Technologique (CEA) (DRT (CEA)), Commissariat à l'énergie atomique et aux énergies alternatives (CEA)-Commissariat à l'énergie atomique et aux énergies alternatives (CEA), Institut de Microélectronique, Electromagnétisme et Photonique - Laboratoire d'Hyperfréquences et Caractérisation (IMEP-LAHC), Université Savoie Mont Blanc (USMB [Université de Savoie] [Université de Chambéry])-Centre National de la Recherche Scientifique (CNRS)-Université Grenoble Alpes (UGA)-Institut polytechnique de Grenoble - Grenoble Institute of Technology (Grenoble INP ), Université Grenoble Alpes (UGA), STMicroelectronics [Crolles] (ST-CROLLES), STMicroelectronics, Laboratoire de Transport Electronique Quantique et Supraconductivité (LaTEQS), PHotonique, ELectronique et Ingénierie QuantiqueS (PHELIQS), Institut de Recherche Interdisciplinaire de Grenoble (IRIG), Direction de Recherche Fondamentale (CEA) (DRF (CEA)), Commissariat à l'énergie atomique et aux énergies alternatives (CEA)-Commissariat à l'énergie atomique et aux énergies alternatives (CEA)-Direction de Recherche Fondamentale (CEA) (DRF (CEA)), Commissariat à l'énergie atomique et aux énergies alternatives (CEA)-Commissariat à l'énergie atomique et aux énergies alternatives (CEA)-Université Grenoble Alpes (UGA)-Institut de Recherche Interdisciplinaire de Grenoble (IRIG), Commissariat à l'énergie atomique et aux énergies alternatives (CEA)-Commissariat à l'énergie atomique et aux énergies alternatives (CEA)-Université Grenoble Alpes (UGA), Circuits électroniques quantiques Alpes (NEEL - QuantECA), Institut Néel (NEEL), Centre National de la Recherche Scientifique (CNRS)-Université Grenoble Alpes (UGA)-Institut polytechnique de Grenoble - Grenoble Institute of Technology (Grenoble INP ), and Université Grenoble Alpes (UGA)-Centre National de la Recherche Scientifique (CNRS)-Université Grenoble Alpes (UGA)-Institut polytechnique de Grenoble - Grenoble Institute of Technology (Grenoble INP )

Subjects
[PHYS]Physics [physics], [SPI]Engineering Sciences [physics], Materials Chemistry, Electrical and Electronic Engineering, Condensed Matter Physics, Electronic, Optical and Magnetic Materials
Abstract

International audience

Published
2022

29. Understanding conditions for the single electron regime in 28 nm FD-SOI quantum dots: Interpretation of experimental data with 3D quantum TCAD simulations

Author

Ioanna Kriekouki, Félix Beaudoin, Pericles Philippopoulos, Chenyi Zhou, Julien Camirand Lemyre, Sophie Rochette, Claude Rohrbacher, Salvador Mir, Manuel J. Barragan, Michel Pioro-Ladrière, and Philippe Galy

Subjects
Materials Chemistry, Electrical and Electronic Engineering, Condensed Matter Physics, Electronic, Optical and Magnetic Materials
Published
2023

39. RF performances at cryogenic temperatures of inductances integrated in a FDSOI technology

Author

Maud Vinet, Andre Juge, Lauriane Contamin, Fred Gaillard, Silvano De Franceschi, Jose Lugo-Alvarez, Mikael Casse, Philippe Galy, Cedric Durand, Tristan Meunier, and Quentin Berlingard

Subjects
Materials science, business.industry, Silicon on insulator, Integrated circuit, Cryogenics, Inductor, law.invention, CMOS, Electromagnetic coil, law, Q factor, Optoelectronics, Radio frequency, business
Abstract

This paper investigates the RF performances of octagonal inductances integrated in a Fully Depleted Silicon On Insulator (FD-SOI) technology. 0.5nH to 4 nH inductors were first characterized vs frequency down to 4.2K and then modelled thanks to lumped elements including induction, coil proximity and skin effects. At low temperature, the quality factor is improved by a factor two because of the metal resistivity reduction, in agreement with DC measurements. Such performances and RF characterizations are mandatory to enable cryogenic CMOS RF integrated circuits design.

Published
2021

45. GDNMOS and GDBIMOS devices for high voltage ESD protection in thin film advanced FD-SOI technology

Author

Maud Vinet, Philippe Galy, Louise De Conti, Sorin Cristoloveanu, Thomas Bedecarrats, STMicroelectronics, Institut de Microélectronique, Electromagnétisme et Photonique - Laboratoire d'Hyperfréquences et Caractérisation (IMEP-LAHC ), Institut polytechnique de Grenoble - Grenoble Institute of Technology (Grenoble INP )-Université Savoie Mont Blanc (USMB [Université de Savoie] [Université de Chambéry])-Centre National de la Recherche Scientifique (CNRS)-Université Grenoble Alpes [2016-2019] (UGA [2016-2019]), Commissariat à l'énergie atomique et aux énergies alternatives - Laboratoire d'Electronique et de Technologie de l'Information (CEA-LETI), Direction de Recherche Technologique (CEA) (DRT (CEA)), and Commissariat à l'énergie atomique et aux énergies alternatives (CEA)-Commissariat à l'énergie atomique et aux énergies alternatives (CEA)

Subjects
Materials science, Silicon on insulator, Hardware_PERFORMANCEANDRELIABILITY, 02 engineering and technology, 01 natural sciences, [SPI]Engineering Sciences [physics], 0103 physical sciences, MOSFET, Hardware_INTEGRATEDCIRCUITS, Materials Chemistry, Hardware_ARITHMETICANDLOGICSTRUCTURES, Electrical and Electronic Engineering, Metal gate, NMOS logic, 010302 applied physics, business.industry, High voltage, 021001 nanoscience & nanotechnology, Condensed Matter Physics, Electronic, Optical and Magnetic Materials, Anode, CMOS, Optoelectronics, 0210 nano-technology, business, Hardware_LOGICDESIGN, Voltage
Abstract

GDNMOS (Gated Diode merged NMOS) and GDBIMOS (Gated Diode merged BIMOS) were fabricated using the 28 nm node ultra-thin film UTBB FD-SOI high-k metal gate CMOS technology. The anode current and voltage were measured and simulated for a high number of variants with different connectivity conditions on the terminals. The devices are reconfigurable and promising for high voltage ESD protection applications.

Published
2019

46. Robust technology computer-aided design of gated quantum dots at cryogenic temperature

Author

Félix Beaudoin, Pericles Philippopoulos, Chenyi Zhou, Ioanna Kriekouki, Michel Pioro-Ladrière, Hong Guo, and Philippe Galy

Subjects
Physics and Astronomy (miscellaneous)
Abstract

We present non-linear Poisson and Schrödinger simulations of an industrially fabricated gated quantum dot device at 100 mK using the Quantum-Technology Computer-Aided Design (QTCAD) software [see https://nanoacademic.com/solutions/qtcad/ “QTCAD: A Computer-Aided Design Tool for Quantum-Technology Hardware, Nanoacademic Technologies Inc.” (2022)]. Using automatic adaptive meshing, the 3D conduction band edge profile of an ultra-thin body and buried oxide fully-depleted silicon-on-insulator field-effect transistor is calculated under steady-state and isothermal conditions. This profile is shown to display potential wells consistent with the experimental observation of side-gate-activated corner quantum dots. The electronic structure of these dots is investigated as a function of applied gate bias within the effective mass theory. Crucially, convergence at 100 mK is shown to be a robust feature of QTCAD's non-linear Poisson solver; convergence is consistently achieved without user intervention for 10 out of 10 random gate bias configurations.

Published
2022

47. Electrostatics and channel coupling on 28 nm FD-SOIfor cryogenic applications

Author

Silvano De Franceschi, Maud Vinet, Mikael Casse, Bruna Cardoso Paz, Fred Gaillard, Tristan Meunier, Franck Arnaud, Emmanuel Vincent, Gerard Ghibaudo, Philippe Galy, Sebastien Haendler, and Andre Juge

Subjects
010302 applied physics, Materials science, Silicon, business.industry, Transistor, Front (oceanography), chemistry.chemical_element, 02 engineering and technology, Cryogenics, Atmospheric temperature range, 021001 nanoscience & nanotechnology, Electrostatics, 01 natural sciences, law.invention, chemistry, law, Logic gate, 0103 physical sciences, Optoelectronics, 0210 nano-technology, business, Channel coupling
Abstract

28 nm FD-SOI technology is electrically characterized aiming at cryogenic applications. Electrostatics and transport are evaluated and compared while lowering temperature from 300 K down to 4.2 K. FD-SOI versatility is shown over a wide temperature range of operation, as the back gate tuning efficiency is preserved at low temperatures. Insights on back gate bias behavior at room and low temperatures are obtained and the electrostatic coupling between front and back channels can be successfully modelled by using 1D Poisson-Schrodinger calculation from 300 K down to 4.2 K.

Published
2020

48. Integrated Variability Measurements of 28 nm FDSOI MOSFETs down to 4.2 K for Cryogenic CMOS Applications

Author

Mikael Casse, Tristan Meunier, Maud Vinet, L. Le Guevel, Gerard Ghibaudo, Bruna Cardoso Paz, Fred Gaillard, Sebastien Haendler, Gerard Billiot, Silvano De Franceschi, Emmanuel Vincent, Philippe Galy, A. G. M. Jansen, Andre Juge, Gael Pillonnet, Commissariat à l'énergie atomique et aux énergies alternatives - Laboratoire d'Electronique et de Technologie de l'Information (CEA-LETI), Direction de Recherche Technologique (CEA) (DRT (CEA)), Commissariat à l'énergie atomique et aux énergies alternatives (CEA)-Commissariat à l'énergie atomique et aux énergies alternatives (CEA), Laboratoire de Transport Electronique Quantique et Supraconductivité (LaTEQS), PHotonique, ELectronique et Ingénierie QuantiqueS (PHELIQS), Institut de Recherche Interdisciplinaire de Grenoble (IRIG), Direction de Recherche Fondamentale (CEA) (DRF (CEA)), Commissariat à l'énergie atomique et aux énergies alternatives (CEA)-Commissariat à l'énergie atomique et aux énergies alternatives (CEA)-Direction de Recherche Fondamentale (CEA) (DRF (CEA)), Commissariat à l'énergie atomique et aux énergies alternatives (CEA)-Commissariat à l'énergie atomique et aux énergies alternatives (CEA)-Université Grenoble Alpes (UGA)-Institut de Recherche Interdisciplinaire de Grenoble (IRIG), Commissariat à l'énergie atomique et aux énergies alternatives (CEA)-Commissariat à l'énergie atomique et aux énergies alternatives (CEA)-Université Grenoble Alpes (UGA), Circuits électroniques quantiques Alpes (QuantECA), Institut Néel (NEEL), Centre National de la Recherche Scientifique (CNRS)-Université Grenoble Alpes (UGA)-Institut polytechnique de Grenoble - Grenoble Institute of Technology (Grenoble INP ), Université Grenoble Alpes (UGA)-Centre National de la Recherche Scientifique (CNRS)-Université Grenoble Alpes (UGA)-Institut polytechnique de Grenoble - Grenoble Institute of Technology (Grenoble INP ), Université Grenoble Alpes (UGA), STMicroelectronics, Institut de Microélectronique, Electromagnétisme et Photonique - Laboratoire d'Hyperfréquences et Caractérisation (IMEP-LAHC), Université Savoie Mont Blanc (USMB [Université de Savoie] [Université de Chambéry])-Centre National de la Recherche Scientifique (CNRS)-Université Grenoble Alpes (UGA)-Institut polytechnique de Grenoble - Grenoble Institute of Technology (Grenoble INP ), and Circuits électroniques quantiques Alpes (NEEL - QuantECA)

Subjects
010302 applied physics, Transistor channel, Materials science, Dopant, business.industry, Circuit design, Transistor, 02 engineering and technology, 021001 nanoscience & nanotechnology, 01 natural sciences, [SPI.TRON]Engineering Sciences [physics]/Electronics, law.invention, Threshold voltage, [PHYS.QPHY]Physics [physics]/Quantum Physics [quant-ph], CMOS, law, 0103 physical sciences, Optoelectronics, 0210 nano-technology, business, ComputingMilieux_MISCELLANEOUS
Abstract

Mismatch performance of 28 nm FDSOI technology is electrically characterized at low temperatures using integrated on-chip addressing for a matrix of transistors. The first statistical results ever published on FDSOI variability at 4.2 K provide valuable information for future compact transistor modeling in cryogenic circuit design. Slight increase of the threshold voltage mismatch is observed at low temperature. Nevertheless, the suppression of fluctuations in the random distribution of dopants for the fully-depleted transistor channel leads to a smaller threshold voltage variability for FDSOI at 4.2 K compared to advanced Bulk technology at room temperature.

Published
2020

49. Simulation, characterization and implementation of a new SCR-based device with a turn-off capability for EOS-immune ESD power supply clamps in advanced CMOS technology nodes

Author

Nicolas Guitard, Philippe Galy, Blaise Jacquier, Bruno Allard, Luong Viet Phung, Jorge Loayza, Ampère, Département Energie Electrique (EE), Ampère (AMPERE), École Centrale de Lyon (ECL), Université de Lyon-Université de Lyon-Université Claude Bernard Lyon 1 (UCBL), Université de Lyon-Institut National des Sciences Appliquées de Lyon (INSA Lyon), Université de Lyon-Institut National des Sciences Appliquées (INSA)-Institut National des Sciences Appliquées (INSA)-Centre National de la Recherche Scientifique (CNRS)-Institut National de Recherche pour l’Agriculture, l’Alimentation et l’Environnement (INRAE)-École Centrale de Lyon (ECL), Université de Lyon-Institut National des Sciences Appliquées (INSA)-Institut National des Sciences Appliquées (INSA)-Centre National de la Recherche Scientifique (CNRS)-Institut National de Recherche pour l’Agriculture, l’Alimentation et l’Environnement (INRAE), and STMicroelectronics [Crolles] (ST-CROLLES)

Subjects
Test bench, Computer science, Hardware_PERFORMANCEANDRELIABILITY, 02 engineering and technology, 01 natural sciences, 0103 physical sciences, Hardware_INTEGRATEDCIRCUITS, 0202 electrical engineering, electronic engineering, information engineering, Electrical and Electronic Engineering, Safety, Risk, Reliability and Quality, 010302 applied physics, Flexibility (engineering), Hardware_MEMORYSTRUCTURES, business.industry, [SPI.NRJ]Engineering Sciences [physics]/Electric power, Electrical engineering, Condensed Matter Physics, Chip, Atomic and Molecular Physics, and Optics, 020202 computer hardware & architecture, Surfaces, Coatings and Films, Electronic, Optical and Magnetic Materials, Anode, Power (physics), CMOS, Turn off, business, Voltage
Abstract

International audience; A new SCR-based device for ESD protection is presented through TCAD simulation and experimental results on a standalone configuration and for a power supply ESD clamp strategy. The new device can turn-off even if the voltage power supply is applied at its Anode. We use 3D TCAD simulation for understanding its turn-on and turn-off behavior. At the same time, the flexibility of the EOS test bench allows for standalone and power supply clamp characterizations at chip level at ambient and high temperature.

Published
2018

50. Ultracompact ESD Protection With BIMOS-Merged Dual Back-to-Back SCR in Hybrid Bulk 28-nm FD-SOI Advanced CMOS Technology

Author

D. Marin-Cudraz, Charles-Alexandre Legrand, Jean-Daniel Lise, Johan Bourgeat, Philippe Galy, and Nicolas Guitard

Subjects
010302 applied physics, Engineering, Electrostatic discharge, business.industry, Transistor, Electrical engineering, Silicon on insulator, 020206 networking & telecommunications, Hardware_PERFORMANCEANDRELIABILITY, 02 engineering and technology, 01 natural sciences, Electronic, Optical and Magnetic Materials, law.invention, CMOS, Overvoltage, law, Logic gate, 0103 physical sciences, Hardware_INTEGRATEDCIRCUITS, 0202 electrical engineering, electronic engineering, information engineering, System on a chip, Electrical and Electronic Engineering, business, Technology CAD, Hardware_LOGICDESIGN
Abstract

The main purpose of this paper is to introduce an ultracompact device for electrostatic discharge (ESD) protection based on a bipolar metal oxide silicon (BIMOS) transistor merged with a dual back-to-back silicon-controlled rectifier (SCR) for bulk and for ultrathin body box fully depleted (FD)-silicon on insulator (SOI) advanced CMOS technologies in the hybrid bulk thanks to process co-integration. It is well known that ESD protection is a challenge for IC in advanced CMOS technology. In this paper, an optimized solution is described through the concept, design, 3-D technology computer aided design (TCAD) simulation, and silicon characterization in 28-nm FD-SOI in hybrid bulk. Measurements are done thanks to transmission line pulsed (TLP), very fast TLP and dc behavior. Moreover, the overvoltage is investigated through very fast transient characterization system measurements. It demonstrates a promising candidate to protect against ESD event and to develop new ESD network dedicated to system on chip.

Published
2017

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