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Research describing the characteristics of metal oxide semiconductor capacitors is presented. In particular bulk charges, interface traps and gate oxide reliability are investigated.

Excess Si effects on the C54 transformation and thermal stability of the silicide TiSi2 thin film are reported.

A unique metal-insulator-semiconductor (MIS) structure with a pseudomorphic In0.05Ga0.95As layer on GaAs with interface state densities in the low 10(super 11)/eV-sq.cm. is presented. The structure was grown by a combination of molecular beam epitaxy and chemical vapor deposition techniques. The hysteresis and frequency dispersion of the MIS capacitor were lower than 100 mV. The 150-angstrom-thick In0.05Ga0.95As channel between Si and GaAs was observed to cause a change in the minority carrier recombination behavior of the GaAs channel, in the same way as done by In0.53Ga0.47As channel MIS structures.

We have investigated the thermal stability of n[sup +] polycrystalline-Si(poly-Si)/ZrO[sub 2](50–140 Å)/SiO[sub 2](7 Å)/p-Si metal–oxide–semiconductor (MOS) capacitors via electrical and material characterization. The ZrO[sub 2] gate dielectric was prepared by atomic layer chemical vapor deposition using ZrCl[sub 4] and H[sub 2]O vapor. Capacitance–voltage hysteresis as small as ∼12 mV with the flatband voltage of -0.5 V and the interface trap density of ∼5×10[sup 10] cm[sup -2] eV[sup -1] were attained with activation anneal at 750 °C. A high level of gate leakage current was observed at the activation temperatures over 750 °C and attributed to the interfacial reaction of poly-Si and ZrO[sub 2] during the poly-Si deposition and the following high temperature anneal. Because of this, the ZrO[sub 2] gate dielectric is incompatible with the conventional poly-Si gate process. In the MOS capacitors having a smaller active area (<50×50 μm[sup 2]), fortunately, the electrical degradation by further severe silicidation does not occur up to an 800 °C anneal in N[sub 2] for 30 min. © 2002 American Institute of Physics. [ABSTRACT FROM AUTHOR]

We report boron penetration and thermal instability of p[sup +] polycrystalline-Si (poly-Si)/ZrO[sub 2] (100 Å)/SiO[sub 2] (∼7 Å)/n-Si metal-oxide-semiconductor (MOS) structures. The flatband voltage shift (ΔV[sub FB]) of the p[sup +] poly-Si/ZrO[sub 2]/SiO[sub 2]/n-Si MOS capacitor as determined by capacitance–voltage measurement was ∼0.18 V, corresponding to a p-type dopant level of 1.1×10[sup 12] B ions/cm[sup 2] as the activation temperature increased from 800 to 850 °C. Additional ΔV[sub FB] of ∼0.24 V was measured after the anneal from 850 to 900 °C. Noticeable boron penetration into the n-type Si channel as observed by secondary ion mass spectroscopy also confirmed the V[sub FB] instability with activation annealing above 850 °C. An abnormal decrease of accumulation capacitance was also found after anneal at 900 °C due to an excessive leakage current which was attributed to the formation of ZrSi[sub x] nodules at the poly-Si/ZrO[sub 2] interface. We observed 4–5 orders of magnitude lower leakage current from the small-size capacitors (<50×50 μm[sup 2]) up to the activation anneal of 850 °C for 30 min, while the formation of interfacial ZrSi[sub x] nodules at 900 °C cannot be avoidable even at 0.6-μm-wide gate lines. © 2002 American Institute of Physics. [ABSTRACT FROM AUTHOR]

We report interface and dielectric reliability characteristics of n[sup +] polycrystalline-silicon (poly-Si)/Al[sub 2]O[sub 3]/Si metal-oxide-semiconductor (MOS) capacitors. Al[sub 2]O[sub 3] films were prepared by atomic layer chemical vapor deposition using Al(CH[sub 3])[sub 3] and H[sub 2]O vapor. Interface state density (D[sub it]) and dielectric reliability properties of n[sup +] poly-Si/Al[sub 2]O[sub 3]/Si MOS structures were examined by capacitance-voltage, conductance, current-voltage, and time-dependent dielectric breakdown measurements. The D[sub it] of the n[sup +] poly-Si/Al[sub 2]O[sub 3]/Si MOS system near the Si midgap is approximately 8x10[sup 10] eV[sup -1] cm[sup -2] as determined by the conductance method. Frequency dispersion as small as ∼20 mV and hysteresis of ∼15 mV were attained under the electric field of ±8 MV/cm. The gate leakage current of ∼36 Å effective thickness Al[sub 2]O[sub 3] dielectric measured at the gate vo! ltage of -2.5 V is ∼-5 nA/cm2, which is approximately three orders of magnitude lower than that of a controlled oxide (SiO[sub 2]). Time-dependent dielectric breakdown data of Al[sub 2]O[sub 3]/Si MOS capacitors under the constant current/voltage stress reveal excellent charge-to-breakdown characteristics over controlled oxide. Reliable gate oxide integrity of Al[sub 2]O[sub 3] gate dielectric is manifested by the excellent distribution of gate oxide breakdown voltage on 128 million MOS capacitors having isolation edges. Extracted time constant and capture cross section of the Al[sub 2]O[sub 3]/Si junction are discussed. © 2001 American Institute of Physics. [ABSTRACT FROM AUTHOR]

The electrical characteristics and thermal stability of n(super +) polycrystalline-Si/ZrO2/SiO2/Si MOS structures were investigated. Capacitors with the smaller gate line width show the suppressed dielectric degradation due to further silicidation.

The boron penetration and thermal stability of the p(super +) poly-Si/ZrO2/SiO2/n-Si metal oxide semiconductor (MOS) structures are investigated. The path of B penetration in the p(super +) poly-Si/ZrO2/SiO2/n-Si MOS structure is thought to be the grain boundaries of the polycrystalline ZrO2 and/or ZiSi(sub x) phases.