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2. First principles investigation of charge transition levels in monoclinic, orthorhombic, tetragonal, and cubic crystallographic phases of HfO2.

3. Bias Temperature Instability (BTI) of High-Voltage Devices for Memory Periphery

5. Impact of Charge Trapping and Depolarization on Data Retention Using Simultaneous P–V and I–V in HfO₂-Based Ferroelectric FET

7. Thermal recovery from stress-induced high-[kappa] dielectric film degradation

9. Defect profiling in FEFET Si:HfO2 layers

10. Investigation of Imprint in FE-HfO₂ and Its Recovery

13. Impact of Dimensions of Memory Periphery FinFETs on Bias Temperature Instability

14. Impact of Charge trapping on Imprint and its Recovery in HfO2 based FeFET

16. Impact of Fin Height on Bias Temperature Instability of Memory Periphery FinFETs

18. Deep-level transient spectroscopy of Al/a-Si:H/c-Si structures for heterojunction solar cell applications.

20. Impact of self-heating on reliability predictions in STT-MRAM

23. Quantification of metal oxide semiconductor field effect transistor device reliability with low-Vt lanthanum-incorporated high permittivity dielectrics.

24. Thermally stable high effective work function TaCN thin films for metal gate electrode applications.

25. Reliability study of La2O3 capped HfSiON high-permittivity n-type metal-oxide-semiconductor field-effect transistor devices with tantalum-rich electrodes.

26. Thermal recovery from stress-induced high-κ dielectric film degradation.

29. Irish Paediatric Association: Proceedings of the annual clinical meeting, Dublin, May 20th – 21st 1988

30. Analysis of P[sub b] centers at the Si(111)/SiO[sub 2] interface following rapid thermal annealing.

32. Strain enhanced low-VT CMOS featuring La/Al-doped HfSiO/TaC and 10ps invertor delay

38. Quantification of metal oxide semiconductor field effect transistor device reliability with low-Vt lanthanum-incorporated high permittivity dielectrics

41. Reliability study of La2O3 capped HfSiON high-permittivity n-type metal-oxide-semiconductor field-effect transistor devices with tantalum-rich electrodes

43. Low VT CMOS using doped Hf-based oxides, TaC-based Metals and Laser-only Anneal

44. Achieving Low-$V_{T}$ Ni-FUSI CMOS by Ultra-Thin $\hbox{Dy}_{2}\hbox{O}_{3}$ Capping of Hafnium Silicate Dielectrics

46. Strain enhanced FUSI/HfSiON Technology with optimized CMOS Process Window

47. Nitrogen Profile and Dielectric Cap Layer (Al2O3, Dy2O3, La2O3) Engineering on Hf-Silicate

49. A Dy2O3-capped HfO2 Dielectric and TaCx-based Metals Enabling Low-Vt Single-Metal-Single-Dielectric Gate Stack

50. Achieving low VT Ni-FUSI CMOS via lanthanide incorporation in the gate stack

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