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1. Pushing the boundaries of random logic metal patterning with low-n EUV single exposure

2. Advanced processes in metal-oxide resists for high-NA EUV lithography

3. Holistic litho-etch approach towards high NA EUV challenges

6. Advanced development methods for high-NA EUV lithography

7. Recent advances in EUV patterning in preparation towards high-NA EUV

8. EUV Metal Oxide Resist Development Technology for Improved Sensitivity, Roughness and Pattern Collapse Margin for High Volume Manufacturing

9. Holistic litho-etch development to address patterning challenges towards high NA EUV

12. Outlook for high-NA EUV patterning: a holistic patterning approach to address upcoming challenges

13. Approaches to enable patterning of tight pitches towards high NA EUV

15. Addressing EUV patterning challenges towards the limits of NA 0.33 EUV exposure

16. Recent advances in EUV patterning in preparation towards high-NA EUV

18. EUV resist performance enhancement by UV flood exposure for high NA EUV lithography

19. EUV defect reduction activities using coater/developer and etching technique

20. EUV resist chemical gradient enhancement by UV flood exposure for improvement in EUV resist resolution, process control, roughness, sensitivity and stochastic defectivity

22. Outlook for high-NA EUV patterning: a holistic patterning approach to address upcoming challenges

23. Approaches to enable patterning of tight pitches towards high NA EUV

25. PSCAR optimization to reduce EUV resist roughness with sensitization using Resist Formulation Optimizer (RFO) (Conference Presentation)

26. Novel technologies in coater/developer to enhance the CD stability and to improve the defectivity toward N7 and smaller nodes

27. Calibrated PSCAR stochastic simulation

30. Advanced processes in metal-oxide resists for high-NA EUV lithography

32. EUV pupil optimization for 32nm pitch logic structures

33. EUV resist sensitization and roughness improvement by PSCAR with in-line flood exposure system (Conference Presentation)

34. Constructing a robust PSCARTM process for EUV (Conference Presentation)

35. Single Exposure EUV of 32nm pitch logic structures: Patterning performance on BF and DF masks

40. PSCARTM optimization to reduce EUV resist roughness with sensitization using Resist Formulation Optimizer (RFO).

41. Calibrated PSCARTM stochastic simulation.

46. Self-aligned block technology: a step toward further scaling

49. Photosensitized Chemically Amplified Resist (PSCAR) 2.0 for high-throughput and high-resolution EUV lithography: dual photosensitization of acid generation and quencher decomposition by flood exposure

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