1. CMOS device optimization for mixed-signal technologies
- Author
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Jeroen Croon, E. Augendre, F.R.J. Huisman, R.M.D.A. Velghe, K.N. Sreerambhatla, Youri Victorovitch Ponomarev, L.P. Bellefroid, M.N. Webster, M. Da Rold, E. Seevinck, Ray Duffy, M.J.B. Bolt, R.F.M. Roes, A.T.A. Zegers-van Duijnhoven, R. Surdeanu, M. Vertregt, Hans Tuinhout, A.J. Moonen, Peter Stolk, N.K.J. van Winkelhoff, and C.J.J. Dachs
- Subjects
Engineering ,FO4 ,business.industry ,Transistor ,Process (computing) ,Electrical engineering ,Mixed-signal integrated circuit ,Hardware_PERFORMANCEANDRELIABILITY ,Process control monitoring ,law.invention ,Integrated injection logic ,CMOS ,law ,Hardware_INTEGRATEDCIRCUITS ,Electronic engineering ,business ,Metal gate - Abstract
This paper studies the suitability of CMOS device technology for mixed-signal applications. The currently proposed scaling scenario's for CMOS technologies lead to strong degradation of analog transistor performance. As a result the combined optimization of digital and analog devices for system-on-a-chip applications will require increasingly elaborate process modifications. New device solutions such as metal gate integration and asymmetric (source-side-only) workfunction modification offer process options for future mixed-signal CMOS applications.
- Published
- 2002
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