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Herein, we report structural, computational, and conductivity studies on urea-directed self-assembled iodinated triphenylamine (TPA) derivatives. Despite numerous reports of conductive TPAs, the challenges of correlating their solid-state assembly with charge transport properties hinder the efficient design of new materials. In this work, we compare the assembled structures of a methylene urea bridged dimer of di-iodo TPA (1) and the corresponding methylene urea di-iodo TPA monomer (2) with a di-iodo mono aldehyde (3) control. These modifications lead to needle shaped crystals for 1 and 2 that are organized by urea hydrogen bonding, π⋯π stacking, I⋯I, and I⋯π interactions as determined by SC-XRD, Hirshfeld surface analysis, and X-ray photoelectron spectroscopy (XPS). The long needle shaped crystals were robust enough to measure the conductivity by two contact probe methods with 2 exhibiting higher conductivity values (∼6 × 10

Adder circuits play a remarkable role in modern microprocessor. Adders are widely used in critical paths of arithmetic operation such as multiplication and subtraction. A Carry Select Adder (CSA) design methodology using a modified 4-bit Carry Look-Ahead (CLA) Adder has been proposed in this research. The proposed 4-bit CLA used hybrid logic style based logic circuits for Carry Generate (Gi) and Carry Propagate (Pi) functions in order to improve performance and reduce the number of transistor used. The modified 4-bit CLA is used as the basic unit for implementation of 32-bit CSA. The proposed design of hybrid CLA based 32-bit CSA has been compared with conventional static CMOS based 32-bit CSA and 32-bit Ripple Cary Adder (RCA) by conducting simulation using Cadence Virtuoso. Power consumption and delay in the proposed 32-bit CSA found 322.6 (uW) and 0.556 (ns) whereas power and delay in the conventional 32-bit CSA was 455.4 (uW) and 0.667 (ns) respectively. We have done all the simulation using Cadence Virtuoso 90 nm tool.

Absorption of electronic acceptors in the accessible channels of an assembled triphenylamine (TPA) bis-urea macrocycle 1 enabled the study of electron transfer from the walls of the TPA framework to the encapsulated guests. The TPA host is isoskeletal in all host–guest structures analyzed with guests 2,1,3-benzothiadiazole, 2,5-dichlorobenzoquinone and I2 loading in single-crystal-to-single-crystal transformations. Analysis of the crystal structures highlights how the spatial proximity and orientation of the TPA host and the entrapped guests influence their resulting photophysical properties and allow direct comparison of the different donor–acceptor complexes. Diffuse reflectance spectroscopy shows that upon complex formation 1·2,5-dichlorobenzoquinone exhibits a charge transfer (CT) transition. Whereas, the 1·2,1,3-benzothiadiazole complex undergoes a photoinduced electron transfer (PET) upon irradiation with 365 nm LEDs. The CT absorptions were also identified with the aid of time dependent density functional theory (TD-DFT) calculations. Cyclic voltammetry experiments show that 2,1,3-benzothiadiazole undergoes reversible reduction within the host–guest complex. Moreover, the optical band gaps of the host 1·2,5-dichlorobenzoquinone (1.66 eV), and host 1·2,1,3-benzothiadiazole (2.15 eV) complexes are significantly smaller as compared to the free host 1 material (3.19 eV). Overall, understanding this supramolecular electron transfer strategy should pave the way towards designing lower band gap inclusion complexes.

Herein, we present a strategy to enable a maintained emissive behavior in the self-assembled state by enforcing an anti-cooperative self-assembly involving weak intermolecular dye interactions. To achieve this goal, we designed a conformationally flexible monomer unit 1 with a central 1,3-substituted (diphenyl)urea hydrogen bonding synthon that is tethered to two BODIPY dyes featuring sterically bulky trialkoxybenzene substituents at the meso-position. The competition between attractive forces (H-bonding and aromatic interactions) and destabilizing effects (steric and competing conformational effects) limits the assembly, halting the supramolecular growth at the stage of small oligomers. Given the presence of weak dye-dye interactions, the emission properties of molecularly dissolved 1 are negligibly affected upon aggregation. Our findings contribute to broadening the scope of emissive supramolecular assemblies and controlled supramolecular polymerization.

Absorption of electronic acceptors in the accessible channels of an assembled triphenylamine (TPA)

This paper presents a method towards the improved performance parameters of conventional CMOS based 4-bit carry look-ahead adder. Conventional CLA adder has high numbers of transistors and high input impedance due to which various performance aspects are affected. Due to high input impedance, its delay and power consumption are high. Therefore, to increase the performance and to reduce delay, we have proposed an advanced version of CLA adder where hybrid logic based XOR gate and GDI AND gates have been used as input to reduce the transistor count as well as to improve performance. Finally, performance of modified adder has been compared with the conventional CLA adder. We have noticed that modified CLA adder showed better performance than the conventional CLA adder. Simulation has been done with Cadence virtuoso 90nm technology.

This research proposes a hybrid Full Adder (FA) cell using a combination of Gate Diffusion Input (GDI) technique, Transmission Gate (TG) and conventional Static CMOS (C-CMOS) logic. To test performance parameters, simulation has been conducted using Cadence Virtuoso in 65 nm technology. Moreover, a comparative analysis of the proposed design with 13 existing state of art FAs has been presented in this research to observe the performance improvements obtained by the proposed FA. In addition, the proposed and existing FAs have been cascaded to implement 4-bit, 8-bit, 16-bit and 32-bit adder to test their performance and feasibility in large structures. The proposed design exhibited remarkable performance both as single cell and cascaded mode. Besides, the proposed technique for FA design removes the defect of voltage degradation in GDI technique and low drivability of TG based design by utilizing C-CMOS logic in the output terminals.

Binary magnitude comparator is considered as an elementary apparatus in Arithmetic Logic Unit. Due to increased use of portable devices nowadays, energy efficient designs having less delay have become essential. This research introduces a new two-bit binary magnitude comparator consisting 46 transistors. To analyze performance, simulation of the proposed design has been conducted using Cadence Computer Aided Design apparatus in 90 nm Technology. To analyze design feasibility, the proposed design has been compared with the existing two-bit binary magnitude comparator design. According to simulation result, the proposed design displayed 9.865 $\mu$ W average power consumption, 0.193 ns delay and 1.904 fJ Power Delay Product which was significantly less than the existing two-bit magnitude comparator designs.

A 4-bit Carry Look-Ahead (CLA) architecture for carry-generation process is proposed. CLA architecture proposed in this work uses complex CLA circuits for carry-generation rather than using carry-generate and carry-propagate functions which are used in the conventional process of 4-bit CLA architecture. Performance of the proposed CLA architecture is validated by performing simulation utilizing Cadence tools in standard 45 ​nm CMOS process. In order to prove effectiveness, performance of the proposed 4-bit CLA design is compared with existing 4-bit CLA designs. Moreover, as a possible application of the proposed design and to inspect performance in wide word length adder structure, the 4-bit CLA architectures (proposed and existing) are extended to 16-bits using Carry-Select Adder (CSA) architecture. Both as 4-bit cell and extended 16-bit structure, the proposed 4-bit CLA shows remarkable improvement in speed while maintaining quite acceptable level of power consumption. As a result, the proposed 4-bit CLA can be utilized as a highly suitable substitution of the existing 4-bit CLA architectures in high-speed microprocessor design.